Product Sample & Technical Tools & Support & Folder Buy Documents Software Community SN74AUP1G34 SCES603K–AUGUST2004–REVISEDOCTOBER2014 SN74AUP1G34 Low-Power Single Buffer Gate 1 Features 2 Applications • AvailableintheUltraSmall0.64mm2Package • ATCASolutions 1 (DPW)with0.5-mmPitch • ActiveNoiseCancellation(ANC) • LowStatic-PowerConsumption; • BarcodeScanner I =0.9μAMax CC • BloodPressureMonitor • LowDynamic-PowerConsumption; • CPAPMachine C =4.1pFTypat3.3V pd • CableSolutions • LowInputCapacitance;C =1.5pFTyp i • DLP3DMachineVision,HyperspectralImaging, • LowNoise-OvershootandUndershoot< OpticalNetworking,andSpectroscopy 10%ofV CC • E-Book • I SupportsLiveInsertion,PartialPowerDown off • EmbeddedPC Mode,andBackDriveProtection • FieldTransmitter:TemperatureorPressure • InputHysteresisAllowsSlowInputTransitionand Sensor BetterSwitchingNoiseImmunityattheInput • FingerprintBiometrics (V =250mVTypat3.3V) hys • HVAC:Heating,Ventilating,andAirConditioning • WideOperatingV Rangeof0.8Vto3.6V CC • Network-AttachedStorage(NAS) • Optimizedfor3.3-VOperation • ServerMotherboardandPSU • 3.6-VI/OToleranttoSupportMixed-Mode SignalOperation • SoftwareDefinedRadio(SDR) • t =4.1nsMaxat3.3V • TV:High-Definition(HDTV),LCD,andDigital pd • SuitableforPoint-to-PointApplications • VideoCommunicationsSystem • Latch-UpPerformanceExceeds100mAPer • WirelessDataAccessCard,Headset,Keyboard, JESD78,ClassII Mouse,andLANCard • ESDPerformanceTestedPerJESD22 • X-ray:BaggageScanner,Medical,andDental – 2000-VHuman-BodyModel 3 Description (A114-B,ClassII) This single buffer gate performs the Boolean function – 1000-VCharged-DeviceModel(C101) Y=Ainpositivelogic. DeviceInformation(1) PARTNUMBER PACKAGE BODYSIZE(NOM) SOT(5) 1.60mm×1.20mm USON(6) 1.45mm×1.00mm SN74AUP1G34 X2SON(4) 0.80mm×0.80mm DSBGA(4) 0.79mm×0.79mm (1) For all available packages, see the orderable addendum at theendofthedatasheet. 4 Simplifed Schematic A Y 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

SN74AUP1G34 SCES603K–AUGUST2004–REVISEDOCTOBER2014 www.ti.com Table of Contents 1 Features.................................................................. 1 PulseWidth................................................................8 2 Applications........................................................... 1 8.2 EnableandDisableTimes.......................................9 3 Description............................................................. 1 9 DetailedDescription............................................ 10 4 SimplifedSchematic.............................................. 1 9.1 Overview.................................................................10 9.2 FunctionalBlockDiagram.......................................10 5 RevisionHistory..................................................... 2 9.3 FeatureDescription.................................................10 6 PinConfigurationandFunction........................... 3 9.4 DeviceFunctionalModes........................................10 7 Specifications......................................................... 3 10 ApplicationandImplementation........................ 11 7.1 AbsoluteMaximumRatings .....................................3 10.1 ApplicationInformation..........................................11 7.2 HandlingRatings.......................................................4 10.2 TypicalApplication ...............................................11 7.3 RecommendedOperatingConditions......................4 11 PowerSupplyRecommendations..................... 12 7.4 ThermalInformation..................................................4 12 Layout................................................................... 12 7.5 ElectricalCharacteristics...........................................5 7.6 SwitchingCharacteristics,C =5pF........................5 12.1 LayoutGuidelines.................................................12 L 7.7 SwitchingCharacteristics,C =10pF......................6 12.2 LayoutExample....................................................12 L 7.8 SwitchingCharacteristics,C =15pF......................6 13 DeviceandDocumentationSupport................. 13 L 7.9 SwitchingCharacteristics,C =30pF......................6 13.1 Trademarks...........................................................13 L 7.10 OperatingCharacteristics........................................6 13.2 ElectrostaticDischargeCaution............................13 7.11 TypicalCharacteristics............................................7 13.3 Glossary................................................................13 8 ParameterMeasurementInformation..................8 14 Mechanical,Packaging,andOrderable Information........................................................... 13 8.1 PropagationDelays,SetupandHoldTimes,and 5 Revision History ChangesfromRevisionJ(June2014)toRevisionK Page • UpdatedDeviceInformationtable. ........................................................................................................................................ 1 ChangesfromRevisionI(November2012)toRevisionJ Page • UpdateddocumenttonewTIdatasheetformat.................................................................................................................... 1 • DeletedOrderingInformationtable. ...................................................................................................................................... 1 • UpdatedDescription. ............................................................................................................................................................. 1 • AddedDeviceInformationtable. ........................................................................................................................................... 1 • AddedHandlingRatingstable................................................................................................................................................ 4 • AddedThermalInformationtable........................................................................................................................................... 4 • AddedTypicalCharacteristics................................................................................................................................................ 7 ChangesfromRevisionH(October2012)toRevisionI Page • ChangedDPWpackagepinout.............................................................................................................................................. 3 2 SubmitDocumentationFeedback Copyright©2004–2014,TexasInstrumentsIncorporated ProductFolderLinks:SN74AUP1G34

SN74AUP1G34 www.ti.com SCES603K–AUGUST2004–REVISEDOCTOBER2014 6 Pin Configuration and Function DBV PACKAGE DCK PACKAGE DRLPACKAGE DRYPACKAGE (TOPVIEW) (TOPVIEW) (TOPVIEW) (TOPVIEW) N.C. 1 5 V N.C. 1 5 VCC N.C. 1 5 VCC N.C. 1 6 VCC CC A 2 A 2 A 2 5 N.C. A 2 GND 3 4 Y GND 3 4 Y GND 3 4 Y GND 3 4 Y DSF PACKAGE YZPPACKAGE YFPPACKAGE DPW PACKAGE (TOPVIEW) (TOPVIEW) (TOPVIEW) (TOPVIEW) N.C. 1 6 VCC N.C. A11 5A2 VCC A A11 4A2 VCC GNDN.C. 1 3 5 VCC A 2 5 N.C. A B12 GND B12 3B2 Y A 2 4 Y GND C13 4C2 Y GND 3 4 Y N.C.–Nointernalconnection Seemechanicaldrawingsfordimensions. PinFunctions PIN DBV, DSF, I/O DESCRIPTION NAME DCK, YFP DPW YFP DRY DRL NC 1 1,5 – 1 – Noconnect A 2 2 A1 2 A1 I InputA GNY 3 3 B1 3 B1 – Ground Y 4 4 B2 4 B2 O OutputY VCC 5 6 A2 5 A2 – PowerPin 7 Specifications 7.1 Absolute Maximum Ratings(1) overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT V Supplyvoltagerange –0.5 4.6 V CC V Inputvoltagerange(2) –0.5 4.6 V I V Voltagerangeappliedtoanyoutputinthehigh-impedanceorpower-offstate(2) –0.5 4.6 V O V Outputvoltagerangeinthehighorlowstate(2) –0.5 V +0.5 V O CC I Inputclampcurrent V <0 –50 mA IK I I Outputclampcurrent V <0 –50 mA OK O I Continuousoutputcurrent ±20 mA O ContinuouscurrentthroughV orGND ±50 mA CC (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommendedOperating Conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Theinputandoutputnegative-voltageratingsmaybeexceedediftheinputandoutputcurrentratingsareobserved. Copyright©2004–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:SN74AUP1G34

SN74AUP1G34 SCES603K–AUGUST2004–REVISEDOCTOBER2014 www.ti.com 7.2 Handling Ratings MIN MAX UNIT T Storagetemperaturerange –65 150 °C stg Humanbodymodel(HBM),perANSI/ESDA/JEDECJS-001,all pins(1) 0 2000 V Electrostaticdischarge V (ESD) Chargeddevicemodel(CDM),perJEDECspecification JESD22-C101,allpins(2) 0 1000 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 7.3 Recommended Operating Conditions(1) MIN MAX UNIT V Supplyvoltage 0.8 3.6 V CC V =0.8V V CC CC V =1.1Vto1.95V 0.65×V CC CC V High-levelinputvoltage V IH V =2.3Vto2.7V 1.6 CC V =3Vto3.6V 2 CC V =0.8V 0 CC V =1.1Vto1.95V 0.35×V CC CC V Low-levelinputvoltage V IL V =2.3Vto2.7V 0.7 CC V =3Vto3.6V 0.9 CC V Inputvoltage 0 3.6 V I V Outputvoltage 0 V V O CC V =0.8V –20 µA CC V =1.1V –1.1 CC V =1.4V –1.7 I (2) High-leveloutputcurrent CC OH V =1.65V –1.9 mA CC V =2.3V –3.1 CC V =3V -4 CC V =0.8V 20 µA CC V =1.1V 1.1 CC V =1.4V 1.7 I (2) Low-leveloutputcurrent CC OL V =1.65V 1.9 mA CC V =2.3V 3.1 CC V =3V 4 CC Δt/Δv Inputtransitionriseorfallrate V =0.8Vto3.6V 200 ns/V CC T Operatingfree-airtemperature –40 85 °C A (1) AllunusedinputsofthedevicemustbeheldatV orGNDtoensureproperdeviceoperation.RefertotheTIapplicationreport, CC ImplicationsofSloworFloatingCMOSInputs,literaturenumberSCBA004. (2) Definedbythesignalintegrityrequirementsanddesigngoalpriorities 7.4 Thermal Information DBV DCK DRL DSF DRY THERMALMETRIC(1) UNIT 5PINS 5PINS 5PINS 6PINS 6PINS RθJA Junction-to-ambientthermalresistance 271.4 338.4 349.7 407.1 554.9 RθJC(top) Junction-to-case(top)thermalresistance 213.5 110.6 120.5 232.0 385.4 RθJB Junction-to-boardthermalresistance 108.2 118.8 171.4 306.9 388.2 °C/W ψJT Junction-to-topcharacterizationparameter 89.3 3.0 10.8 40.3 159.0 ψJB Junction-to-boardcharacterizationparameter 107.6 117.8 169.4 306.0 384.1 (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheICPackageThermalMetricsapplicationreport,SPRA953. 4 SubmitDocumentationFeedback Copyright©2004–2014,TexasInstrumentsIncorporated ProductFolderLinks:SN74AUP1G34

SN74AUP1G34 www.ti.com SCES603K–AUGUST2004–REVISEDOCTOBER2014 7.5 Electrical Characteristics overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted) T =25°C T =–40°Cto85°C A A PARAMETER TESTCONDITIONS V UNIT CC MIN TYP MAX MIN MAX I =–20µA 0.8Vto3.6V V –0.1 V –0.1 OH CC CC I =–1.1mA 1.1V 0.75×V 0.7×V OH CC CC I =–1.7mA 1.4V 1.11 1.03 OH I =–1.9mA 1.65V 1.32 1.3 OH V V OH I =–2.3mA 2.3V 2.05 1.97 OH I =–3.1mA 1.9 1.85 OH I =–2.7mA 3V 2.72 2.67 OH I =–4mA 2.6 2.55 OH I =20µA 0.8Vto3.6V 0.1 0.1 OL I =1.1mA 1.1V 0.3×V 0.3×V OL CC CC I =1.7mA 1.4V 0.31 0.37 OL I =1.9mA 1.65V 0.31 0.35 OL V V OL I =2.3mA 0.31 0.33 OL 2.3V I =3.1mA 0.44 0.45 OL I =2.7mA 0.31 0.33 OL 3V I =4mA 0.44 0.45 OL I Ainput V =GNDto3.6V 0Vto3.6V 0.1 0.5 μA I I V orV =0Vto I I O 0V 0.2 0.6 μA off 3.6V V orV =0Vto ΔI I O 0Vto0.2V 0.2 0.6 μA off 3.6V V =GNDor I I I =0 0.8Vto3.6V 0.5 0.9 μA CC (V to3.6V) O CC ΔI V =V –0.6V I =0 3.3V 40 50 μA CC I CC O 0V 1.5 C V =V orGND pF i I CC 3.6V 1.5 C V =GND 0V 2.5 pF o O 7.6 Switching Characteristics, C = 5 pF L overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted)(seeFigure3andFigure4) FROM TO TA=25°C TA=–40°Cto85°C PARAMETER V UNIT (INPUT) (OUTPUT) CC MIN TYP MAX MIN MAX 0.8V 1.8 14.5 27.4 1.2V±0.1V 3 5.6 11.2 0.4 13.9 1.5V±0.1V 2.5 4 7.2 0.7 9.2 t A Y ns pd 1.8V±0.15V 2.2 3.2 6 0.8 7.3 2.5V±0.2V 1.8 2.4 3.9 0.6 5.1 3.3V±0.3V 1.4 2 3.2 0.6 4.1 Copyright©2004–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:SN74AUP1G34

SN74AUP1G34 SCES603K–AUGUST2004–REVISEDOCTOBER2014 www.ti.com 7.7 Switching Characteristics, C = 10 pF L overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted)(seeFigure3andFigure4 FROM TO TA=25°C TA=–40°Cto85°C PARAMETER V UNIT (INPUT) (OUTPUT) CC MIN TYP MAX MIN MAX 0.8V 2.7 16.6 28.2 1.2V±0.1V 3.6 6.6 12.7 0.3 15.4 1.5V±0.1V 3 4.8 8.3 1.2 10.3 t A Y ns pd 1.8V±0.15V 2.7 3.9 6.9 1.3 8.3 2.5V±0.2V 2.3 2.9 4.5 1.2 5.8 3.3V±0.3V 2 2.4 3.8 1.1 4.8 7.8 Switching Characteristics, C = 15 pF L overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted)(seeFigure3andFigure4 FROM TO TA=25°C TA=–40°Cto85°C PARAMETER V UNIT (INPUT) (OUTPUT) CC MIN TYP MAX MIN MAX 0.8V 5.1 18.6 30.2 1.2V±0.1V 4.3 7.5 13.6 1.3 16.5 1.5V±0.1V 3.6 5.5 9 1.9 11.2 t A Y ns pd 1.8V±0.15V 3.2 4.5 7.5 1.9 8.9 2.5V±0.2V 2.6 3.4 5.2 1.7 6.5 3.3V±0.3V 2.3 2.9 4.2 1.5 5 7.9 Switching Characteristics, C = 30 pF L overrecommendedoperatingfree-airtemperaturerange(unlessotherwisenoted)(seeFigure3andFigure4 FROM TO TA=25°C TA=–40°Cto85°C PARAMETER V UNIT (INPUT) (OUTPUT) CC MIN TYP MAX MIN MAX 0.8V 9.9 24.2 36.3 1.2V±0.1V 6.3 10.1 16.3 3.6 18.9 1.5V±0.1V 5.1 7.4 11 3.4 13 t A Y ns pd 1.8V±0.15V 4.5 6.1 9.3 3.2 10.6 2.5V±0.2V 3.7 4.7 6.4 2.7 7.8 3.3V±0.3V 3.3 4 5.3 2.5 6.5 7.10 Operating Characteristics T =25°C A PARAMETER TESTCONDITIONS V TYP UNIT CC 0.8V 3.8 1.2V±0.1V 3.8 1.5V±0.1V 3.8 C Powerdissipationcapacitance f=10MHz pF pd 1.8V±0.15V 3.8 2.5V±0.2V 3.9 3.3V±0.3V 4.1 6 SubmitDocumentationFeedback Copyright©2004–2014,TexasInstrumentsIncorporated ProductFolderLinks:SN74AUP1G34

SN74AUP1G34 www.ti.com SCES603K–AUGUST2004–REVISEDOCTOBER2014 7.11 Typical Characteristics 20 6 TPD in ns TPD in ns 5 15 4 s) s) n n D ( 10 D ( 3 P P T T 2 5 1 0 0 0 1 2 3 4 -50 0 50 100 150 VCC (V) D001 Temperature (°C) D001 Figure1.TPDvsV 15pFLoad Figure2.TPDvsTemperature15pFLoad CC Copyright©2004–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:SN74AUP1G34

SN74AUP1G34 SCES603K–AUGUST2004–REVISEDOCTOBER2014 www.ti.com 8 Parameter Measurement Information 8.1 Propagation Delays, Setup and Hold Times, and Pulse Width From Output Under Test CL 1 MW (see NoteA) LOAD CIRCUIT V = 1.2 V V = 1.5 V V = 1.8 V V = 2.5 V V = 3.3 V V = 0.8 V CC CC CC CC CC CC ±0.1 V ±0.1 V ±0.15 V ±0.2 V ±0.3 V C 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF L V V /2 V /2 V /2 V /2 V /2 V /2 M CC CC CC CC CC CC V V V V V V V I CC CC CC CC CC CC t w V CC Input V /2 V /2 CC CC V I 0 V Input VM VM 0 V VOLTAGE WAVEFORMS PULSE DURATION t t PLH PHL V OH V Output VM VM Timing Input V /2 CC V CC OL 0 V t t PHL PLH t t V su h OH Output VM VM VCC V Data Input V /2 V /2 OL CC CC 0 V VOLTAGE WAVEFORMS PROPAGATION DELAYTIMES VOLTAGE WAVEFORMS INVERTINGAND NONINVERTING OUTPUTS SETUPAND HOLD TIMES NOTES: A. C includes probe and jig capacitance. L B. All input pulses are supplied by generators having the following characteristics: PRR£10 Mhz, Z = 50W, t/t = 3 ns. O r f C. The outputs are measured one at a time, with one transition per measurement. D. t and t are the same as t . PLH PHL pd E. All parameters and waveforms are not applicable to all devices. Figure3. LoadCircuitandVoltageWaveforms 8 SubmitDocumentationFeedback Copyright©2004–2014,TexasInstrumentsIncorporated ProductFolderLinks:SN74AUP1G34

SN74AUP1G34 www.ti.com SCES603K–AUGUST2004–REVISEDOCTOBER2014 8.2 Enable and Disable Times 2´V CC 5 kW S1 From Output Under Test GND TEST S1 C t /t 2´V L 5 kW PLZ PZL CC (see NoteA) t /t GND PHZ PZH LOAD CIRCUIT V = 1.2 V V = 1.5 V V = 1.8 V V = 2.5 V V = 3.3 V V = 0.8 V CC CC CC CC CC CC ±0.1 V ±0.1 V ±0.15 V ±0.2 V ±0.3 V C 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF L V V /2 V /2 V /2 V /2 V /2 V /2 M CC CC CC CC CC CC V V V V V V V I CC CC CC CC CC CC V 0.1 V 0.1 V 0.1 V 0.15 V 0.15 V 0.3 V D V Output CC V /2 V /2 Control CC CC 0 V t t PZL PLZ Output V Waveform 1 CC V /2 S1 at 2´VCC CC VOL+ VD V (see Note B) OL t t PZH PHZ Output V Waveform 2 V -V OH V /2 OH D S1 at GND CC »0 V (see Note B) VOLTAGE WAVEFORMS ENABLEAND DISABLE TIMES LOW-AND HIGH-LEVELENABLING NOTES: A. CLincludes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR£10 MHz, Z = 50W, t/t = 3 ns. O r f D. The outputs are measured one at a time, with one transition per measurement. E. t and t are the same as t . PLZ PHZ dis F. t and t are the same as t . PZL PZH en G. All parameters and waveforms are not applicable to all devices. Figure4. LoadCircuitandVoltageWaveforms Copyright©2004–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:SN74AUP1G34

SN74AUP1G34 SCES603K–AUGUST2004–REVISEDOCTOBER2014 www.ti.com 9 Detailed Description 9.1 Overview This single buffer gate operates from 0.8 V to 3.6 V and performs the Boolean function Y = A in positive logic. The AUP family of devices has quiescent power consumption less than 1 µA and comes in the ultra small DPW package. The DPW package technology is a major breakthrough in IC packaging. Its tiny 0.64 mm square footprint saves significant board space over other package options while still retaining the traditional manufacturingfriendlyleadpitchof0.5mm. This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs, off off preventing damaging current back-flow through the device when it is powered. The I feature also allows for live off insertion. 9.2 Functional Block Diagram A Y 9.3 Feature Description • WideoperatingV rangeof0.8Vto3.6V CC • 3.6-VI/Otoleranttosupportdowntranslation • Inputhysteresisallowsslowinputtransitionandbetterswitchingnoiseimmunityattheinput • I featureallowsvoltagesontheinputsandoutputswhenV is0V off CC • Lownoiseduetosloweredgerates 9.4 Device Functional Modes Table1.FunctionTable INPUT OUTPUT A Y H H L L 10 SubmitDocumentationFeedback Copyright©2004–2014,TexasInstrumentsIncorporated ProductFolderLinks:SN74AUP1G34

SN74AUP1G34 www.ti.com SCES603K–AUGUST2004–REVISEDOCTOBER2014 10 Application and Implementation 10.1 Application Information The AUP family is TI's premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static and dynamic power consumption across the entire V range CC of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity. It has a small amount of hysteresis built in allowing for slower or noisy input signals. The lowered drive produces sloweredgesandpreventsovershootandundershootontheoutputs. The AUP family of single gate logic makes excellent translators for the new lower voltage Micro- processors that typically are powered from 0.8 V to 1.2 V. They can drop the voltage of peripheral drivers and accessories that arestillpoweredby3.3VtothenewuCpowerlevels. 10.2 Typical Application 3.3-V Bus driver VCC 1 V regulated 0.1 µF 1-V Micro Processor Driver µC Figure5. TypicalApplication 10.2.1 DesignRequirements This device uses CMOS technology and has balanced output drive. Care should be taken to avoid bus contentionbecauseitcandrivecurrentsthatwouldexceedmaximumlimits. 10.2.2 DetailedDesignProcedure 1. RecommendedInputconditions – Risetimeandfalltimespecifications.See(Δt/ΔV)inRecommendedOperatingConditionstable. – Specifiedhighandlowlevels.See(V andV )inRecommendedOperatingConditions table. IH IL – Inputsareovervoltagetolerantallowingthemtogoashighas3.6VatanyvalidV CC 2. Recommendoutputconditions – Loadcurrentsshouldnotexceed20mAontheoutputand50mAtotalforthepart – OutputsshouldnotbepulledaboveV CC Copyright©2004–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:SN74AUP1G34

SN74AUP1G34 SCES603K–AUGUST2004–REVISEDOCTOBER2014 www.ti.com Typical Application (continued) 10.2.3 ApplicationCurves Switching Characteristics at25MHz† 3.5 3 2.5 V Input Output − 2 e g 1.5 a olt 1 V 0.5 0 −0.5 0 5 10 15 20 25 30 35 40 45 Time−ns † AUP1G08dataatCL=15pF Figure6.AUP–TheLowest-PowerFamily Figure7.ExcellentSignalIntegrity 11 Power Supply Recommendations The power supply can be any voltage between the Min and Max supply voltage rating located in the RecommendedOperatingConditionstable. Each V terminal should have a good bypass capacitor to prevent power disturbance. For devices with a single CC supply, 0.1 μF is recommended and if there are multiple V terminals then .01 μF or .022 μF is recommended CC for each power terminal. It is ok to parallel multiple bypass caps to reject different frequencies of noise. A 0.1 μF and 1 μF are commonly used in parallel. The bypass capacitor should be installed as close to the power terminal aspossibleforbestresults. 12 Layout 12.1 Layout Guidelines Whenusingmultiplebitlogicdevicesinputsshouldnoteverfloat. In many cases, functions or parts of functions of digital logic devices are unused, for example, when only two inputs of a triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such input pins should not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. Specified below are the rules that must be observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that should be applied to any particular unused input depends on the function of the device. Generally they will be tied to GND or V whichever make more sense or is more convenient. It is generally OK to float outputs unless the CC partisatransceiver.Ifthetransceiverhasanoutputenablepinitwilldisabletheoutputssectionofthepartwhen asserted.ThiswillnotdisabletheinputsectionoftheI.O’ssotheyalsocannotfloatwhendisabled. 12.2 Layout Example VCC Input Unused Input Output Unused Input Output Input 12 SubmitDocumentationFeedback Copyright©2004–2014,TexasInstrumentsIncorporated ProductFolderLinks:SN74AUP1G34

SN74AUP1G34 www.ti.com SCES603K–AUGUST2004–REVISEDOCTOBER2014 13 Device and Documentation Support 13.1 Trademarks Alltrademarksarethepropertyoftheirrespectiveowners. 13.2 Electrostatic Discharge Caution Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 13.3 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 14 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. Copyright©2004–2014,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:SN74AUP1G34

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN74AUP1G34DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 H34R & no Sb/Br) SN74AUP1G34DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 H34R & no Sb/Br) SN74AUP1G34DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 (H95, H9F, H9K, H9 & no Sb/Br) R) SN74AUP1G34DCKT ACTIVE SC70 DCK 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 (H95, H9R) & no Sb/Br) SN74AUP1G34DPWR ACTIVE X2SON DPW 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 G4 & no Sb/Br) SN74AUP1G34DRLR ACTIVE SOT-5X3 DRL 5 4000 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 85 (H97, H9R) & no Sb/Br) SN74AUP1G34DRYR ACTIVE SON DRY 6 5000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 H9 & no Sb/Br) SN74AUP1G34DSFR ACTIVE SON DSF 6 5000 Green (RoHS NIPDAU | NIPDAUAG Level-1-260C-UNLIM H9 & no Sb/Br) SN74AUP1G34YFPR ACTIVE DSBGA YFP 4 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM H9 & no Sb/Br) N SN74AUP1G34YZPR ACTIVE DSBGA YZP 5 3000 Green (RoHS SNAGCU Level-1-260C-UNLIM -40 to 85 H9N & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 2-Feb-2020 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN74AUP1G34DBVR SOT-23 DBV 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 SN74AUP1G34DBVT SOT-23 DBV 5 250 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3 SN74AUP1G34DCKR SC70 DCK 5 3000 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3 SN74AUP1G34DCKR SC70 DCK 5 3000 180.0 8.4 2.47 2.3 1.25 4.0 8.0 Q3 SN74AUP1G34DCKT SC70 DCK 5 250 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3 SN74AUP1G34DPWR X2SON DPW 5 3000 178.0 8.4 0.91 0.91 0.5 2.0 8.0 Q3 SN74AUP1G34DRLR SOT-5X3 DRL 5 4000 180.0 8.4 1.98 1.78 0.69 4.0 8.0 Q3 SN74AUP1G34DRLR SOT-5X3 DRL 5 4000 180.0 9.5 1.78 1.78 0.69 4.0 8.0 Q3 SN74AUP1G34DRYR SON DRY 6 5000 180.0 9.5 1.15 1.6 0.75 4.0 8.0 Q1 SN74AUP1G34DSFR SON DSF 6 5000 180.0 9.5 1.16 1.16 0.5 4.0 8.0 Q2 SN74AUP1G34YFPR DSBGA YFP 4 3000 178.0 9.2 0.89 0.89 0.58 4.0 8.0 Q1 SN74AUP1G34YZPR DSBGA YZP 5 3000 178.0 9.2 1.02 1.52 0.63 4.0 8.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 2-Feb-2020 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN74AUP1G34DBVR SOT-23 DBV 5 3000 202.0 201.0 28.0 SN74AUP1G34DBVT SOT-23 DBV 5 250 202.0 201.0 28.0 SN74AUP1G34DCKR SC70 DCK 5 3000 180.0 180.0 18.0 SN74AUP1G34DCKR SC70 DCK 5 3000 202.0 201.0 28.0 SN74AUP1G34DCKT SC70 DCK 5 250 180.0 180.0 18.0 SN74AUP1G34DPWR X2SON DPW 5 3000 205.0 200.0 33.0 SN74AUP1G34DRLR SOT-5X3 DRL 5 4000 202.0 201.0 28.0 SN74AUP1G34DRLR SOT-5X3 DRL 5 4000 184.0 184.0 19.0 SN74AUP1G34DRYR SON DRY 6 5000 184.0 184.0 19.0 SN74AUP1G34DSFR SON DSF 6 5000 184.0 184.0 19.0 SN74AUP1G34YFPR DSBGA YFP 4 3000 220.0 220.0 35.0 SN74AUP1G34YZPR DSBGA YZP 5 3000 220.0 220.0 35.0 PackMaterials-Page2

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GENERIC PACKAGE VIEW DRY 6 USON - 0.6 mm max height PLASTIC SMALL OUTLINE - NO LEAD Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4207181/G

PACKAGE OUTLINE DRY0006A USON - 0.6 mm max height SCALE 8.500 PLASTIC SMALL OUTLINE - NO LEAD B 1.05 A 0.95 PIN 1 INDEX AREA 1.5 1.4 0.6 MAX C SEATING PLANE 0.05 0.00 0.08 C 3X 0.6 SYMM (0.127) TYP (0.05) TYP 3 4 4X 0.5 SYMM 2X 1 6 1 0.25 6X 0.15 0.4 0.3 0.1 C A B 0.05 C PIN 1 ID (OPTIONAL) 0.35 5X 0.25 4222894/A 01/2018 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. www.ti.com

EXAMPLE BOARD LAYOUT DRY0006A USON - 0.6 mm max height PLASTIC SMALL OUTLINE - NO LEAD SYMM (0.35) 5X (0.3) 1 6 6X (0.2) SYMM 4X (0.5) 4 3 (R0.05) TYP (0.6) LAND PATTERN EXAMPLE 1:1 RATIO WITH PKG SOLDER PADS EXPOSED METAL SHOWN SCALE:40X 0.05 MAX 0.05 MIN ALL AROUND ALL AROUND EXPOSED EXPOSED METAL METAL SOLDER MASK METAL METAL UNDER SOLDER MASK OPENING SOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DETAILS 4222894/A 01/2018 NOTES: (continued) 3. For more information, see QFN/SON PCB application report in literature No. SLUA271 (www.ti.com/lit/slua271). www.ti.com

EXAMPLE STENCIL DESIGN DRY0006A USON - 0.6 mm max height PLASTIC SMALL OUTLINE - NO LEAD SYMM (0.35) 5X (0.3) 1 6 6X (0.2) SYMM 4X (0.5) 4 3 (R0.05) TYP (0.6) SOLDER PASTE EXAMPLE BASED ON 0.075 - 0.1 mm THICK STENCIL SCALE:40X 4222894/A 01/2018 NOTES: (continued) 4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com

PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 0.1 C 1.75 1.45 1.45 B A 0.90 PIN 1 INDEX AREA 1 5 2X 0.95 3.05 2.75 1.9 1.9 2 4 3 0.5 5X 0.3 0.15 0.2 C A B (1.1) TYP 0.00 0.25 GAGE PLANE 0.22 TYP 0.08 8 TYP 0.6 0 0.3 TYP SEATING PLANE 4214839/E 09/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. 4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. www.ti.com

EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK SOLDER MASK METAL UNDER METAL OPENING OPENING SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MAX 0.07 MIN ARROUND ARROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4214839/E 09/2019 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM 2 (1.9) 2X(0.95) 3 4 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/E 09/2019 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. www.ti.com

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PACKAGE OUTLINE DPW0005A X2SON - 0.4 mm max height SCALE 12.000 PLASTIC SMALL OUTLINE - NO LEAD B 0.85 A 0.75 PIN 1 INDEX AREA 0.85 0.75 0.4 MAX C SEATING PLANE NOTE 3 (0.1) 0.05 (0.25) 4X (0.05) 0.00 0.25 0.1 2 4 NOTE 3 2X 3 2X (0.26) 0.48 5 1 0.27 0.27 4X 0.17 0.17 0.1 C A B (0.06) 0.05 C 0.32 3X 0.23 4223102/B 09/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The size and shape of this feature may vary. www.ti.com

EXAMPLE BOARD LAYOUT DPW0005A X2SON - 0.4 mm max height PLASTIC SMALL OUTLINE - NO LEAD (0.78) SYMM ( 0.1) 4X (0.42) VIA 0.05 MIN ALL AROUND 1 TYP 5 4X (0.22) SYMM 4X (0.26) (0.48) 3 2 4 (R0.05) TYP SOLDER MASK 4X (0.06) OPENING, TYP ( 0.25) (0.21) TYP METAL UNDER EXPOSED METAL SOLDER MASK CLEARANCE TYP LAND PATTERN EXAMPLE SOLDER MASK DEFINED SCALE:60X 4223102/B 09/2017 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, refer to QFN/SON PCB application note in literature No. SLUA271 (www.ti.com/lit/slua271). www.ti.com

EXAMPLE STENCIL DESIGN DPW0005A X2SON - 0.4 mm max height PLASTIC SMALL OUTLINE - NO LEAD 4X (0.42) 4X (0.06) 5 4X (0.22) 1 ( 0.24) 4X (0.26) SYMM (0.21) (0.48) TYP SOLDER MASK 3 EDGE 2 4 (R0.05) TYP SYMM (0.78) SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL EXPOSED PAD 92% PRINTED SOLDER COVERAGE BY AREA SCALE:100X 4223102/B 09/2017 NOTES: (continued) 5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com

PACKAGE OUTLINE YZP0005 DSBGA - 0.5 mm max height SCALE 8.000 DIE SIZE BALL GRID ARRAY B E A BALL A1 CORNER D C 0.5 MAX SEATING PLANE 0.19 0.05 C 0.15 BALL TYP 0.5 TYP C SYMM 1 B D: Max = 1.418 mm, Min =1 .358 mm TYP 0.5 TYP E: Max = 0.918 mm, Min =0 .858 mm A 0.25 5X 1 2 0.21 0.015 C A B SYMM 4219492/A 05/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. www.ti.com

EXAMPLE BOARD LAYOUT YZP0005 DSBGA - 0.5 mm max height DIE SIZE BALL GRID ARRAY (0.5) TYP 5X ( 0.23) 1 2 A (0.5) TYP SYMM B C SYMM LAND PATTERN EXAMPLE SCALE:40X SOLDER MASK 0.05 MAX 0.05 MIN ( 0.23) OPENING SOLDER MASK OPENING ( 0.23) METAL METAL UNDER SOLDER MASK NON-SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS NOT TO SCALE 4219492/A 05/2017 NOTES: (continued) 3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. For more information, see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009). www.ti.com

EXAMPLE STENCIL DESIGN YZP0005 DSBGA - 0.5 mm max height DIE SIZE BALL GRID ARRAY (0.5) TYP 5X ( 0.25) (R0.05) TYP 1 2 A (0.5) TYP B SYMM C METAL SYMM TYP SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL SCALE:40X 4219492/A 05/2017 NOTES: (continued) 4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. www.ti.com

PACKAGE OUTLINE YFP0004 DSBGA - 0.5 mm max height SCALE 10.000 DIE SIZE BALL GRID ARRAY B E A BALL A1 CORNER D C 0.5 MAX SEATING PLANE 0.19 0.13 BALL TYP 0.05 C 0.4 TYP B D: Max = 0.79 mm, Min = 0.73 mm SYMM 0.4 E: Max = 0.79 mm, Min = 0.73 mm TYP A 0.25 4X 0.21 1 2 0.015 C A B SYMM 4223507/A 01/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. www.ti.com

EXAMPLE BOARD LAYOUT YFP0004 DSBGA - 0.5 mm max height DIE SIZE BALL GRID ARRAY (0.4) TYP 4X ( 0.23) 1 2 A SYMM (0.4) TYP B SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:50X ( 0.23) 0.05 MAX 0.05 MIN METAL UNDER METAL SOLDER MASK EXPOSED SOLDER MASK EXPOSED ( 0.23) METAL OPENING METAL SOLDER MASK OPENING NON-SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS NOT TO SCALE 4223507/A 01/2017 NOTES: (continued) 3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. For more information, see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009). www.ti.com

EXAMPLE STENCIL DESIGN YFP0004 DSBGA - 0.5 mm max height DIE SIZE BALL GRID ARRAY (0.4) TYP 4X ( 0.25) (R0.05) TYP 1 2 A SYMM (0.4) TYP B METAL TYP SYMM SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL SCALE:50X 4223507/A 01/2017 NOTES: (continued) 4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. www.ti.com

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PACKAGE OUTLINE DSF0006A X2SON - 0.4 mm max height SCALE 10.000 PLASTIC SMALL OUTLINE - NO LEAD 1.05 B A 0.95 PIN 1 INDEX AREA 1.05 0.95 0.4 MAX C SEATING PLANE 0.05 C (0.11) TYP SYMM 0.05 0.00 3 4 2X SYMM 0.7 4X 0.35 6 1 0.22 6X 0.12 (0.1) PIN 1 ID 0.45 0.07 C B A 6X 0.35 0.05 C 4220597/A 06/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Reference JEDEC registration MO-287, variation X2AAF. www.ti.com

EXAMPLE BOARD LAYOUT DSF0006A X2SON - 0.4 mm max height PLASTIC SMALL OUTLINE - NO LEAD 6X (0.6) (R0.05) TYP 1 6X (0.17) 6 SYMM 4X (0.35) 4 3 SYMM (0.8) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:40X 0.07 MIN 0.07 MAX EXPOSED METAL ALL AROUND ALL AROUND EXPOSED METAL SOLDER MASK SOLDER MASK METAL METAL UNDER OPENING OPENING SOLDER MASK NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4220597/A 06/2017 NOTES: (continued) 4. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). www.ti.com

EXAMPLE STENCIL DESIGN DSF0006A X2SON - 0.4 mm max height PLASTIC SMALL OUTLINE - NO LEAD 6X (0.6) (R0.05) TYP 1 6X (0.17) 6 SYMM 4X (0.35) 4 3 SYMM (0.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SCALE:40X 4220597/A 06/2017 4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com

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