SN65HVD1050-EP www.ti.com SLLS772A–DECEMBER2006–REVISEDOCTOBER2009 EMC OPTIMIZED CAN TRANSCEIVER CheckforSamples:SN65HVD1050-EP FEATURES 1 DPACKAGE • ControlledBaseline (TOPVIEW) 2 – OneAssembly/TestSite,OneFabrication Site TXD 1 8 S GND 2 7 CANH • EnhancedDiminishingManufacturingSources (DMS)Support VCC 3 6 CANL RXD 4 5 V • EnhancedProduct-ChangeNotification ref • QualificationPedigree (1) • ImprovedReplacementfortheTJA1050 DESCRIPTION/ ORDERING INFORMATION • HighElectromagneticImmunity(EMI) • VeryLowElectromagneticEmissions(EME) The SN65HVD1050 meets or exceeds the specifications of the ISO 11898 standard for use in • MeetsorExceedstheRequirementsof applications employing a controller area network ISO11898-2 (CAN). The device is also qualified for use in • Bus-FaultProtectionof–27Vto40V automotive applications in accordance with • DominantTime-OutFunction AEC-Q100.(2) • ThermalShutdownProtection AsaCANtransceiver,thisdeviceprovidesdifferential • Power-Up/DownGlitch-FreeBusInputsand transmit capability to the bus and differential receive Outputs capability to a CAN controller at signaling rates up to 1megabitpersecond(Mbps)(3). – HighInputImpedanceWithLowV CC – MonotonicOutputsDuringPowerCycling Designed for operation in especially harsh environments, the SN65HVD1050 features cross-wire, overvoltage, and loss of ground protection APPLICATIONS from –27 V to 40 V, overtemperature protection, a • IndustrialAutomation –12-V to 12-V common-mode range, and withstands – DeviceNET™DataBuses(VendorID#806) voltage transients from –200 V to 200 V, according to • SAEJ2284High-SpeedCANforAutomotive ISO7637. Applications Pin 8 provides for two different modes of operation: • SAEJ1939StandardDataBusInterface high-speed or silent mode. The high-speed mode of • ISO11783StandardDataBusInterface operation is selected by connecting S (pin 8) to • NMEA2000StandardDataBusInterface ground. (1) ComponentqualificationinaccordancewithJEDECand industrystandardstoensurereliableoperationoveran extendedtemperaturerange.Thisincludes,butisnotlimited to,HighlyAcceleratedStressTest(HAST)orbiased85/85, (2) ThedeviceisavailablewithQ100qualificationasthe temperaturecycle,autoclaveorunbiasedHAST, SN65HVD1050Q(ProductPreview). electromigration,bondintermetalliclife,andmoldcompound (3) Thesignalingrateofalineisthenumberofvoltage life.Suchqualificationtestingshouldnotbeviewedas transitionsthataremade,persecond,expressedintheunits justifyinguseofthiscomponentbeyondspecified bps(bitspersecond). performanceandenvironmentallimits. blk blk ORDERINGINFORMATION PARTNUMBER PACKAGE MARKEDAS ORDERINGNUMBER SN65HVD1050M SOIC-8 1050EP SN65HVD1050MDREP(reel) 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexas Instrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. DeviceNETisatrademarkofOpenDevicenetVendorsAssociation,Inc. 2 PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2006–2009,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

SN65HVD1050-EP SLLS772A–DECEMBER2006–REVISEDOCTOBER2009 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriateprecautions.Failuretoobserveproperhandlingandinstallationprocedurescancausedamage. ESDdamagecanrangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmaybemore susceptibletodamagebecauseverysmallparametricchangescouldcausethedevicenottomeetitspublishedspecifications. DESCRIPTION/ORDERING INFORMATION (CONTINUED) If a high logic level is applied to the S pin of the SN65HVD1050, the device enters a listen-only silent mode, duringwhichthedriverisswitchedoffwhilethereceiverremainsfullyfunctional. In silent mode, all bus activity is passed by the receiver output to the local protocol controller. When data transmission is required, the local protocol controller reverses this low-current silent mode by placing a logic low ontheSpintoresumefulloperation. A dominant-time-out circuit in the SN65HVD1050 prevents the driver from blocking network communication with a hardware or software failure. The time-out circuit is triggered by a falling edge on TXD (pin 1). If no rising edge is seen before the time-out constant of the circuit expires, the driver is disabled. The circuit is then reset by the nextrisingedgeonTXD. V (pin5)isavailableasaV /2voltagereference. ref CC TheSN65HVD1050Mischaracterizedforoperationfrom–55°Cto125°C. FUNCTIONBLOCKDIAGRAM 8 Silent Mode S VCC VCC 3 30 (cid:1)A 5 Dominant Temperature VCC/2 Vref Time-Out Protection 30 (cid:1)A 7 1 CANH TXD Driver 6 CANL 2 4 RXD Absolute Maximum Ratings(1) UNIT V Supplyvoltage(2) –0.3Vto7V CC Voltagerangeatanybusterminal(CANH,CANL,V ) –27Vto40V ref I Receiveroutputcurrent 20mA O V Voltageinput,transientpulse(3)(CANH,CANL) –200Vto200V I V Voltageinputrange(TXD,S) –0.5Vto6V I T Junctiontemperature –55°Cto170°C J (1) Stressesbeyondthoselistedunder"absolutemaximumratings"maycausepermanentdamagetothedevice.Thesearestressratings only,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunder"recommendedoperating conditions"isnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Allvoltagevalues,exceptdifferentialI/Obusvoltages,arewithrespecttonetworkgroundterminal. (3) TestedinaccordancewithISO7637,testpulses1,2,3a,3b,5,6,and7 2 SubmitDocumentationFeedback Copyright©2006–2009,TexasInstrumentsIncorporated ProductFolderLink(s):SN65HVD1050-EP

SN65HVD1050-EP www.ti.com SLLS772A–DECEMBER2006–REVISEDOCTOBER2009 Electrostatic Discharge Protection overoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS UNIT BusterminalsandGND ±8kV Human-BodyModel(2) Allpins ±4kV Electrostaticdischarge(1) Charged-DeviceModel(3) Allpins ±1.5kV MachineModel ±200V (1) Alltypicalvaluesat25°C (2) TestedinaccordancewithJEDECStandard22,TestMethodA114-A (3) TestedinaccordancewithJEDECStandard22,TestMethodC101 Recommended Operating Conditions MIN MAX UNIT V Supplyvoltage 4.75 5.25 V CC V orV Voltageatanybusterminal(separatelyorcommonmode) –12 12 V I IC V High-levelinputvoltage TXD,S 2 5.25 V IH V Low-levelinputvoltage TXD,S 0 0.8 V IL V Differentialinputvoltage –6 6 V ID Driver –70 I High-leveloutputcurrent mA OH Receiver –2 Driver 70 I Low-leveloutputcurrent mA OL Receiver 2 SeeThermalCharacteristicstable, T Junctiontemperature 150 °C J 1-MbpsminimumsignalingratewithR =54Ω L Supply Current overrecommendedoperatingconditions(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT Silentmode SatV ,V =V 6 10 CC I CC I 5-Vsupplycurrent Dominant V =0V,60-Ωload,Sat0V 50 70 mA CC I Recessive V =V ,Noload,Sat0V 6 10 I CC Device Switching Characteristics overoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN MAX UNIT Totalloopdelay,driverinputtoreceiveroutput,recessiveto t 90 230 d(LOOP1) dominant Sat0V,SeeFigure9 ns Totalloopdelay,driverinputtoreceiveroutput,dominantto t 90 230 d(LOOP2) recessive Copyright©2006–2009,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLink(s):SN65HVD1050-EP

SN65HVD1050-EP SLLS772A–DECEMBER2006–REVISEDOCTOBER2009 www.ti.com Driver Electrical Characteristics overrecommendedoperatingconditions(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT (1) CANH V =0V,Sat0V,R =60Ω, 2.9 3.4 4.5 V Busoutputvoltage(dominant) I L V O(D) CANL SeeFigure1andFigure2 0.8 1.5 V =3V,Sat0V,R =60Ω, V Busoutputvoltage(recessive) I L 2 2.3 3 V O(R) SeeFigure1andFigure2 V =0V,R =60Ω,Sat0V, I L 1.5 3 SeeFigure1,Figure2,andFigure3 V Differentialoutputvoltage(dominant) V OD(D) V =0V,R =45Ω,Sat0V, I L 1.4 3 SeeFigure1,Figure2,andFigure3 V =3V,Sat0V, I –0.012 0.012 V Differentialoutputvoltage(recessive) SeeFigure1andFigure2 V OD(R) V =3V,Sat0V,Noload –0.5 0.05 I V Steady-statecommon-modeoutputvoltage 2 2.3 3 V OC(ss) Changeinsteady-statecommon-mode Sat0V,SeeFigure8 ΔV 30 mV OC(ss) outputvoltage I High-levelinputcurrent,TXDinput V atV –2 2 IH I CC I Low-levelinputcurrent,TXDinput V at0V –50 –10 μA IL I I Power-offTXDoutputcurrent V at0V,TXDat5V 1 O(off) CC V =–12V,CANLopen,SeeFigure11 –105 –72 CANH V =12V,CANLopen,SeeFigure11 0.36 1 CANH I Short-circuitsteady-stateoutputcurrent mA OS(ss) V =–12V,CANHopen,SeeFigure11 –1 –0.5 CANL V =12V,CANHopen,SeeFigure11 71 105 CANL C Outputcapacitance Seereceiverinputcapacitance O (1) Alltypicalvaluesareat25°C,witha5-Vsupply. Driver Switching Characteristics overrecommendedoperatingconditions(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT t Propagationdelaytime,low-tohigh-leveloutput 25 65 120 PLH Sat0V,SeeFigure4 ns t Propagationdelaytime,high-tolow-leveloutput 25 45 120 PHL t Differentialoutputsignalrisetime 25 r Sat0V,SeeFigure4 ns t Differentialoutputsignalfalltime 50 f t Enabletimefromsilentmodetodominant SeeFigure7 1 μs en t Dominanttime-out ↓V,SeeFigure10 300 450 700 μs (dom) I 4 SubmitDocumentationFeedback Copyright©2006–2009,TexasInstrumentsIncorporated ProductFolderLink(s):SN65HVD1050-EP

SN65HVD1050-EP www.ti.com SLLS772A–DECEMBER2006–REVISEDOCTOBER2009 Receiver Electrical Characteristics overrecommendedoperatingconditions(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP (1) MAX UNIT V Positive-goinginputthresholdvoltage Sat0V,SeeTable3 800 900 mV IT+ V Negative-goinginputthresholdvoltage Sat0V,SeeTable3 500 650 mV IT– V Hysteresisvoltage(V –V ) 100 125 mV hys IT+ IT– V High-leveloutputvoltage I =–2mA,SeeFigure6 4 4.6 V OH O V Low-leveloutputvoltage I =2mA,SeeFigure6 0.2 0.4 V OL O CANHorCANL=5V, I Power-offbusinputcurrent Otherpinat0V, 165 250 μA I(off) V at0V,TXDat0V CC I Power-offRXDleakagecurrent V at0V,RXDat5V 20 μA O(off) CC TXDat3V, C Inputcapacitancetoground(CANHorCANL) 13 pF I V =0.4sin(4E6πt)+2.5V I C Differentialinputcapacitance TXDat3V,V =0.4sin(4E6πt) 5 pF ID I R Differentialinputresistance TXDat3V,Sat0V 30 80 kΩ ID R Inputresistance(CANHorCANL) TXDat3V,Sat0V 15 30 40 kΩ IN Inputresistancematching R V =V –3% 0% 3% I(m) [1–(R /R )]×100% O(CANH) O(CANL) IN(CANH) IN(CANL) (1) Alltypicalvaluesareat25 Cwitha5-Vsupply. Receiver Switching Characteristics overrecommendedoperatingconditions(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT t Propagationdelaytime,low-tohigh-leveloutput 60 100 130 PLH Sat0VorV ,SeeFigure6 ns CC t Propagationdelaytime,high-tolow-leveloutput 45 70 130 PHL t Outputsignalrisetime 8 r Sat0VorV ,SeeFigure6 ns CC t Outputsignalfalltime 8 f S-Pin Characteristics overrecommendedoperatingconditions(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT I High-levelinputcurrent Sat2V 20 40 70 μA IH I Low-levelinputcurrent Sat0.8V 5 20 30 μA IL V -PIN Characteristics ref overoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT V Referenceoutputvoltage –50μA<I <50μA 0.4V 0.5V 0.6V V O O CC CC CC Thermal Characteristics overoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT Low-Kthermalresistance(1) 211 θ JunctiontoAir °C/W JA High-Kthermalresistance 131 θ Junction-to-boardthermalresistance 53 °C/W JB θ Junction-to-casethermalresistance 79 °C/W JC (1) TestedinaccordancewiththeLow-KorHigh-KthermalmetricdefinitionsofEIA/JESD51-3forleadedsurface-mountpackages Copyright©2006–2009,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLink(s):SN65HVD1050-EP

SN65HVD1050-EP SLLS772A–DECEMBER2006–REVISEDOCTOBER2009 www.ti.com Thermal Characteristics (continued) overoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER TESTCONDITIONS MIN TYP MAX UNIT V =5V,T =27°C,R =60Ω,Sat0V, CC J L InputtoTXDa500-kHz,50%duty-cyclesquarewave, 112 C atRXD=15pF L P Averagepowerdissipation mW D V =5.5V,T =130°C,R =45Ω,Sat0V, CC j L InputtoTXDa500-kHz,50%duty-cyclesquarewave, 170 C atRXD=15pF L Thermalshutdowntemperature 190 °C FUNCTION TABLES Table1.DRIVER INPUTS OUTPUTS BUSSTATE TXD (1) S (1) CANH (1) CANL (1) L LorOpen H L Dominant H X Z Z Recessive Open X Z Z Recessive X H Z Z Recessive (1) H=highlevel,L=lowlevel,X=irrelevant,Z=highimpedance Table2.RECEIVER DIFFERENTIALINPUTS OUTPUTRXD (1) BUSSTATE V =V –V ID (CANH) (CANL) V ≥0.9V L Dominant ID 0.5V<V <0.9V ? ? ID V ≤0.5V H Recessive ID Open H Recessive (1) H=highlevel,L=lowlevel,X=irrelevant,?=indeterminate 6 SubmitDocumentationFeedback Copyright©2006–2009,TexasInstrumentsIncorporated ProductFolderLink(s):SN65HVD1050-EP

SN65HVD1050-EP www.ti.com SLLS772A–DECEMBER2006–REVISEDOCTOBER2009 PARAMETER MEASUREMENT INFORMATION IO(CANH) TXD VO(CANH) II VOD RL VO(CANH) +VO(CANL) 2 VI S II(S) VOC + IO(CANL) V_I(S) VO(CANL) Figure1. DriverVoltage,Current,andTestDefinition Dominant (cid:2) 3.5 V VO(CANH) Recessive (cid:2) 2.5 V (cid:2) 1.5 V VO(CANL) Figure2. BusLogicStateVoltageDefinitions 330 (cid:1) (cid:1)1% CANH TXD 0V VOD RL +_ −2 V (cid:2) VTEST (cid:2) 7 V S CANL 330 (cid:1) (cid:1)1% Figure3. DriverV TestCircuit OD CANH VCC VI VCC/2 VCC/2 TXD R = 60W 0 V L ±1% VO tPLH tPHL VI (sCeLe= N 1o0t0e pBF) 0.9 V 90% VO(D) VO 0.5 V 10% (See NoteA) S CANL tr tf VO(R) Figure4. DriverTestCircuitandVoltageWaveforms Copyright©2006–2009,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLink(s):SN65HVD1050-EP

SN65HVD1050-EP SLLS772A–DECEMBER2006–REVISEDOCTOBER2009 www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) CANH VI(CANH) RXD IO V VIC= VI(CANH)2+ VI(CANL) ID VO CANL VI(CANL) Figure5. ReceiverVoltageandCurrentDefinitions CANH 3.5 V VI 2 V 2.4 V V RXD IO 1.5 V I tPLH tPHL (See Note A) 1.5 VCANL S CL = (1S5e ep FN (cid:1)o t2e0 B%) VO VO 0.7 VCC 90% 0.3 VCCVOH 10% VOL tr tf A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 125 kHz, 50% duty cycle, t ≤6ns,t ≤6ns,Z =50Ω. r f O B. C includesinstrumentationandfixturecapacitancewithin±20%. L Figure6. ReceiverTestCircuitandVoltageWaveforms Table3.DifferentialInputVoltageThresholdTest INPUT OUTPUT V V |V | R CANH CANL ID –11.1V –12V 900mV L 12V 11.1V 900mV L V OL –6V –12V 6V L 12V 6V 6V L –11.5V –12V 500mV H 12V 11.5V 500mV H –12V –6V 6V H V OH 6V 12V 6V H Open Open X H 8 SubmitDocumentationFeedback Copyright©2006–2009,TexasInstrumentsIncorporated ProductFolderLink(s):SN65HVD1050-EP

SN65HVD1050-EP www.ti.com SLLS772A–DECEMBER2006–REVISEDOCTOBER2009 DUT CANH VCC TXD VI 50 % 0 V CL 60 (cid:1) 0 V (cid:1)1% VI S CANL VOH 50 % RXD NiinnOcsltTurudEme: seCnLt a=t i1o0n0 pF VO ten VOL + and fixture capacitance within ±20% NOTE: All VI input pulses are supplied by a generator having the VO following characteristics: tr or tf ≤ 6 ns, Pulse Repetition Rate _ 15 pF (cid:1)20% (PRR) = 25 kHz, 50% duty cycle Figure7. t TestCircuitandWaveforms en 27 (cid:2) (cid:1)1% CANH (cid:1)VOC(SS) TXD VI VOC CANL S 27 (cid:2) (cid:1)1% 4(cid:1)72 0n%F VOC = VO(CANH) +2 VO(CANL) NOTE: AllV inputpulsesarefrom0VtoV andsuppliedbyageneratorhavingthefollowingcharacteristics:t ort ≤6ns. I CC r f PulseRepetitionRate(PRR)=125kHz,50%dutycycle. Figure8. Common-ModeOutputVoltageTestandWaveform DUT CANH VCC TXD Input 50% TXD 60W VI CL ±1% 0 V t t loop2 loop1 S CANL VOH 50% 50% RXD Output RXD NinOclTuEd:e CsL i=n s1t0r0u mpFentation VOL and fixture capacitance + within±20% VO _ 15 pF ±20% A. AllV inputpulsesarefrom0VtoV andsuppliedbyageneratorhavingthefollowingcharacteristics:t ort ≤6ns. I CC r f PulseRepetitionRate(PRR)=125kHz,50%dutycycle. Figure9. t TestCircuitandWaveform (LOOP) Copyright©2006–2009,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLink(s):SN65HVD1050-EP

SN65HVD1050-EP SLLS772A–DECEMBER2006–REVISEDOCTOBER2009 www.ti.com VCC VI TXD RL = 6(cid:1)01 %(cid:1) VOD 0 V VI (See Note CBL) VOD(D) VOD 900 mV S 500 mV (See Note A) CANH 0 V tdom A. AllV inputpulsesarefrom0VtoV andsuppliedbyageneratorhavingthefollowingcharacteristics:t ort ≤6ns. I CC r f PulseRepetitionRate(PRR)=500Hz,50%dutycycle. B. C =100pFincludesinstrumentationandfixturecapacitancewithin±20%. L Figure10. DominantTime-OutTestCircuitandWaveforms | IOS(SS) | IOS | IOS(P) | CANH 200 (cid:1)s TXD 0 V 0 V or VCC 12 V S CANL VIN −12 V or 12 V Vin 0 V or 10 (cid:1)s 0 V Vin −12 V Figure11. DriverShort-CircuitCurrentTestandWaveforms 10 SubmitDocumentationFeedback Copyright©2006–2009,TexasInstrumentsIncorporated ProductFolderLink(s):SN65HVD1050-EP

SN65HVD1050-EP www.ti.com SLLS772A–DECEMBER2006–REVISEDOCTOBER2009 DEVICE INFORMATION Table4.ParametricCross-ReferenceWiththeTJA1050 TJA1050 (1) PARAMETER HVD1050 TransmitterSection V High-levelinputvoltage RecommendedV IH IH V Low-levelinputvoltage RecommendedV IL IL I High-levelinputcurrent DriverI IH IH I Low-levelinputcurrent DriverI IL IL BusSection I Power-offbusinputcurrent ReceiverI LI I(off) I Short-circuitoutputcurrent DriverI O(SC) OS(SS) V Dominantoutputvoltage DriverV O(dom) O(D) V Differentialinputvoltage ReceiverV andrecommendedV i(dif)(th) IT ID V Differentialinputhysteresis ReceiverV i(dif)(hys) hys V Recessiveoutputvoltage DriverV O(reces) O(R) V Differentialbusvoltage DriverV andV O(dif)(bus) OD(D) OD(R) R CANH,CANLinputresistance ReceiverR i(cm) IN R Differentialinputresistance ReceiverR i(dif) ID R Inputresistancematching ReceiverR i(cm)(m) I(m) C Inputcapacitancetoground ReceiverC I I C Differentialinputcapacitance ReceiverC i(dif) ID ReceiverSection I High-leveloutputcurrent RecommendedI OH OH I Low-leveloutputcurrent RecommendedI OL OL V -PinSection ref V Referenceoutputvoltage V ref O TimingSection t DelayTXDtobusactive Drivert d(TXD-BUSon) PLH t DelayTXDtobusinactive Drivert d(TXD-BUSoff) PHL t DelaybusactivetoRXD Receivert d(BUSon-RXD) PHL t DelaybusinactivetoRXD Receivert d(BUSoff-RXD) PLH t +t Devicet d(TXD-BUSon) d(BUSon-RXD) LOOP1 t +t Devicet d(TXD-BUSoff) d(BUSoff-RXD) LOOP2 t Dominanttime-out Drivert dom(TXD) (dom) S-PinSection V High-levelinputvoltage RecommendedV IH IH V Low-levelinputvoltage RecommendedV IL IL I High-levelinputcurrent I IH IH I Low-levelinputcurrent I IL IL (1) FromTJA1050ProductSpecification,PhilipsSemiconductors,2002May16 Copyright©2006–2009,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLink(s):SN65HVD1050-EP

SN65HVD1050-EP SLLS772A–DECEMBER2006–REVISEDOCTOBER2009 www.ti.com Equivalent Input and Output Schematic Diagrams TXD Input RXD Output Vcc Vcc 4.3 kW 25W Input Output 6 V 6 V CANH Input CANLInput Vcc Vcc 10 kW 10 kW 20 kW 20 kW Input Input 10 kW 10 kW 40 V 40 V S Input CANH and CANL Outputs Vcc Vcc 4.3 kW CANH Input CANL 6V 40 kW 40 V 40 V Vref Output Vcc 2 kW Output 2 kW 40 V 12 SubmitDocumentationFeedback Copyright©2006–2009,TexasInstrumentsIncorporated ProductFolderLink(s):SN65HVD1050-EP

SN65HVD1050-EP www.ti.com SLLS772A–DECEMBER2006–REVISEDOCTOBER2009 TYPICAL CHARACTERISTICS RECESSIVE-TO-DOMINANTLOOPTIME DOMINANT-TO-RECESSIVELOOPTIME vs vs FREE-AIRTEMPERATURE(AcrossV ) FREE-AIRTEMPERATURE(AcrossV ) CC CC ns 150 S at 0 V ns 170 S at 0 V me− RCL== 61000W pF −me RL= 60W Ti 145 L Ti 165 CL= 100 pF nt Loop 140 AT50Xir%D F lIDonuwptu yat tCi s7y cacl fe1/m 2P5u-klsHez e Loop 160 AT50Xir%D F lIDonuwptu yat tCi s7y cacl fe1/m 2P5u-klsHez mina VCC= 4.75 V essiv VCC= 5.25 V o c D e sive-to- 135 ant-to-R 155 VCC= 5 V s 130 n 150 ce mi Re VCC= 5 V Do −P1 125 −2 145 VCC= 4.75 V OO VCC= 5.25 V OP L O t L 120 t 140 −40 0 25 70 125 −40 0 25 70 125 TA−Free-Air Temperature−°C TA−Free-Air Temperature−°C Figure12. Figure13. SUPPLYCURRENT(RMS) DRIVERLOW-LEVELOUTPUTVOLTAGE vs vs SIGNALINGRATE LOW-LEVELOUTPUTCURRENT 50 90 TA= 25°C 45 VCC= 5 V 80 S at 0 V A mA 40 RL= 60W −m 70 − RXD = 15 pF nt nt 35 re 60 rre Cur Cu 30 ut 50 y p ppl 25 Out 40 Su el MS 20 Lev 30 −R 15 ow- 20 CC −L TA= 25°C I 10 L 10 VCC= 5 V O S at 0 V I TXD Input is a 125-kHz 5 0 1% Duty Cycle Pulse 0 −10 200 400 500 600 800 1000 0 1 2 3 4 5 Signaling Rate −kbps V −Low-Level Output Voltage–V O(CANL) Figure14. Figure15. Copyright©2006–2009,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLink(s):SN65HVD1050-EP

SN65HVD1050-EP SLLS772A–DECEMBER2006–REVISEDOCTOBER2009 www.ti.com TYPICAL CHARACTERISTICS (continued) DRIVERHIGH-LEVELOUTPUTVOLTAGE DRIVERDIFFERENTIALOUTPUTVOLTAGE vs vs HIGH-LEVELOUTPUTCURRENT FREE-AIRTEMPERATURE(AcrossV ) CC -80 3 TA= 25°C V mA -70 VSC aCt =0 5V V age− 2.5 VCC= 5 V VCC= 5.25 V − TXD Input is a 125-kHz olt rrent -60 1% Duty Cycle Pulse put V Cu ut 2 put -50 al O Out -40 enti 1.5 VCC= 4.75 V evel Differ gh-L -30 ver 1 Hi -20 Dri S at 0 V −H nt RL= 60W O na 0.5 Air Flow at 7 cf/m I -10 mi TXD Input is a 125-kHz o 1% Duty Cycle Pulse D -0 0 0 1 2 3 4 5 −40 0 25 70 125 VO(CANH)−High-Level Output Voltage−V TA−Free-Air Temperature−°C Figure16. Figure17. DRIVEROUTPUTCURRENT RECEIVEROUTPUTVOLTAGE vs vs SUPPLYVOLTAGE DIFFERENTIALINPUTVOLTAGE 50 6 A TA= 25°C m 45 VCC= 5 V VIT+ VIT− − S at 0 V 5 rrent 40 RTXLD= I6n0pWut is a 125-kHz − V VCM = 12 V Cu 35 1% Duty Cycle Pulse ge 4 put olta VCM = 2.5 V Out 30 ut V 3 ver 25 utp VCM = −12 V Dri r O 2 al 20 ve nti cei TA = 25(cid:1)C, re 15 Re 1 VCC = 5 V, Diffe 10 − O SR XaDt 0 = V 1,5 pF V − 0 O 5 I 0 −1 1 2 3 3.5 4 4.5 5 5.25 0 5 0 5 0 5 1 5 0 5 0 5 0 6 6 7 7 8 8 8 8 7 7 6 6 VCC−SupplyVoltage−V 0. 0. 0. 0. 0. 0. 0. 0. 0. 0. 0. 0. VID − Differential Input Voltage − V Figure18. Figure19. 14 SubmitDocumentationFeedback Copyright©2006–2009,TexasInstrumentsIncorporated ProductFolderLink(s):SN65HVD1050-EP

SN65HVD1050-EP www.ti.com SLLS772A–DECEMBER2006–REVISEDOCTOBER2009 TYPICAL CHARACTERISTICS (continued) TYPICALELECTROMAGNETICEMISSIONS TYPICALELECTROMAGNETIC UPTO50MHZ(PeakAmplitude) IMMUNITYPERFORMANCE 80 60 V m m B B 40 D d 20 0 0.1 1 10 100 1000 f − Frequency − MHz Figure20. Figure21. Copyright©2006–2009,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLink(s):SN65HVD1050-EP

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN65HVD1050MDREP ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 1050EP & no Sb/Br) SN65HVD1050MDREPG4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 1050EP & no Sb/Br) V62/07608-01XE ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -55 to 125 1050EP & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN65HVD1050-EP : •Catalog: SN65HVD1050 •Automotive: SN65HVD1050-Q1 NOTE: Qualified Version Definitions: •Catalog - TI's standard catalog product •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 12-Feb-2019 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN65HVD1050MDREP SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 12-Feb-2019 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN65HVD1050MDREP SOIC D 8 2500 350.0 350.0 43.0 PackMaterials-Page2

PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

IMPORTANTNOTICEANDDISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2020, Texas Instruments Incorporated