SN65ELT21 www.ti.com....................................................................................................................................................................................................... SLLS923–JUNE2009 5-V PECL-to-TTL Translator FEATURES 1 • 3ns(TYP)PropagationDelay PIN ASSIGNMENT • OperatingRange:V =4.2Vto5.7Vwith CC DorDGKPACKAGE GND=0V (TOPVIEW) • 24-mATTLOutput • DeterministicOutputValueforOpenInput NC 1 8 VCC ConditionsorWhenInputs<1.3V • Built-InTemperatureCompensation • Drop-InCompatibletotheMC10ELT21, D 2 7 Q MC100ELT21 D 3 6 NC APPLICATIONS • DataandClockTransmissionOverBackplane • SignalingLevelConversionforClockorData VBB 4 5 GND DESCRIPTION The SN65ELT21 is a differential PECL-to-TTL Table1.PinDescriptions translator. It operates on +5-V supply and ground PIN FUNCTION only. The device includes circuitry to maintain Q to a D,D PECLdatainputs low logic level when inputs are in an open condition or<1.3V. Q TTLoutput V Positivesupply The V pin is a reference voltage output for the CC BB device. When the device is used in single-ended VEE Negativesupply mode, the unused input should be tied to VBB. This VBB Referencevoltageoutput reference voltage can also be used to bias the input when it is ac coupled. When it is used, place a 0.01m F decoupling capacitor between V and V . CC BB Also limit the sink/source current to < 0.5 mA to V . BB LeaveV openwhenitisnotused. BB The SN65ELT21 is housed in an industry standard SOIC-8 package and is also available in an optional TSSOP-8package. ORDERINGINFORMATION(1)(2) PARTNUMBER PARTMARKING PACKAGE LEADFINISH SN65ELT21D ELT21 SOIC NiPdAu SN65ELT21DGK SIII SOIC-TSSOP NiPdAu (1) Forthemostcurrentpackageandorderinginformation,seethePackageOptionAddendumattheendofthisdocument,orseetheTI websiteatwww.ti.com. (2) Leadeddeviceoptionsarenotinitiallyavailable;contactasalesrepresentativeforfurtherdetails. 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexas Instrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2009,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

SN65ELT21 SLLS923–JUNE2009....................................................................................................................................................................................................... www.ti.com Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. ABSOLUTE MAXIMUM RATINGS(1) PARAMETER CONDITIONS VALUE UNIT AbsolutePECLmodesupplyvoltage V (GND=0V) 6 V CC Sink/sourcecurrent,V ±0.5 mA BB PECLinputvoltage GND=0V,V ≤V 6 V I CC Operatingtemperaturerange –40to85 °C Storagetemperaturerange –65to150 °C (1) Stressesbeyondthoselistedunderabsolutemaximumratingsmaycausepermanentdamagetothedevice.Thesearestressratings onlyandfunctionaloperationofthedeviceattheseoranyconditionsbeyondthoseindicatedunderrecommendedoperatingconditions isnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. DISSIPATION RATINGS POWERRATING THERMALRESISTANCE, DERATINGFACTOR POWERRATING CIRCUITBOARD PACKAGE T <25°C JUNCTION-TO-AMBIENT T >25°C T =85°C MODEL A A A (mW) NOAIRFLOW (mW/°C) (mW) SOIC Low-K 719 139 7 288 High-K 840 119 8 336 SOIC-TSSOP Low-K 469 213 5 188 High-K 527 189 5 211 THERMAL CHARACTERISTICS overoperatingfree-airtemperaturerange(unlessotherwisenoted) PARAMETER MIN TYP MAX UNIT q Junction-to-boardthermalresistance SOIC 79 °C/W JB SOIC-TSSOP 120 q Junction-to-casethermalresistance SOIC 98 °C/W JC SOIC-TSSOP 74 KEY ATTRIBUTES CHARACTERISTICS VALUE Internalinputpull-downresistor 50kΩ Moisturesensitivitylevel Level1 Flameabilityrating(oxygenindex:28to34) UL94V-0at0.125in Electrostaticdischarge Humanbodymodel 2kV Charged-devicemodel 1.5kV MeetsorexceedsJEDECSpecEIA/JESD78latchuptest 2 SubmitDocumentationFeedback Copyright©2009,TexasInstrumentsIncorporated ProductFolderLink(s):SN65ELT21

SN65ELT21 www.ti.com....................................................................................................................................................................................................... SLLS923–JUNE2009 PECL DC CHARACTERISTICS AtV =5.0V,GND=0.0V(unlessotherwisenoted)(1)(2) CC T =–40°C T =25°C T =85°C A A A PARAMETER TESTCONDITIONS UNIT MIN TYP MAX MIN TYP MAX MIN TYP MAX V High-levelinputvoltage, 3835 4120 3835 4120 3835 4120 mV IH single-ended V Low-leveIinputvoltage, 3190 3525 3190 3525 3190 3525 mV IL single-ended V Outputreferencevoltage 3.62 3.69 3.74 3.62 3.69 3.74 3.62 3.69 3.74 V BB V High-levelinputvoltage, See (3) 2.2 5.0 2.2 5.0 2.2 5.0 V IHCMR common-moderange, differential I High-levelinputcurrent 150 150 150 m A IH I Low-levelinputcurrent 0.5 0.5 0.5 m A IL (1) Thedevicewillmeetthespecificationsafterthermalbalancehasbeenestablishedwhenmountedinasocketorprintedcircuitboard withmaintainedtransverseairflowgreaterthan500lfpm.Electricalparametersareassuredonlyoverthedeclaredoperating temperaturerange.Functionaloperationofthedeviceexceedingtheseconditionsisnotimplied.Devicespecificationlimitvaluesare appliedindividuallyundernormaloperatingconditionsandnotvalidsimultaneously. (2) Inputparametersvary1:1withV .V canvary+0.7V/–0.8V. CC CC (3) V varies1:1withGND,V varies1:1withV . IHCMR(min) IHCMR(max) CC TTL DC CHARACTERISTICS AtV =4.2Vto5.7V,T =–40°Cto85°C(unlessotherwisenoted)(1) CC A PARAMETER TESTCONDITIONS MIN TYP MAX UNIT I Powersupplycurrent 20 mA CCH I Powersupplycurrent 20 mA CCL V High-leveloutputvoltage I =–3.0mA 2.4 See (2) V OH OH V Low-leveloutputvoltage I =24mA 0.5 V OL OL I Outputshortcircuitcurrent –150 –60 mA OS (1) Thedevicewillmeetthespecificationsafterthermalbalancehasbeenestablishedwhenmountedinasocketorprintedcircuitboard withmaintainedtransverseairflowgreaterthan500lfpm.Electricalparametersareassuredonlyoverthedeclaredoperating temperaturerange.Functionaloperationofthedeviceexceedingtheseconditionsisnotimplied.Devicespecificationlimitvaluesare appliedindividuallyundernormaloperatingconditionsandnotvalidsimultaneously. (2) V isV –0.7. OH(max)level CC AC CHARACTERISTICS AtV =4.2Vto5.7V,GND=0.0V(unlessotherwisenoted)(1)(2) CC TEST TA=–40°C TA=25°C TA=85°C PARAMETER UNIT CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX f Maximumswitching AtVol<0.5V 200 200 200 MHz MAX frequency (SeeFigure4) t /t Propagationdelaytimes At1.5V 2 4.5 2 4.5 2 4.5 ns PLH PHL t Randomclockjitter(RMS) 5 20 5 20 5 20 ps JITTER V Inputswing See (3) 200 1000 200 1000 200 1000 mV PP t/t Outputrise/falltimes Q(10%–90%) 750 780 910 ps r f (1) Thedevicewillmeetthespecificationsafterthermalequilibriumhasbeenestablishedwhenmountedinatestsocketorprintedcircuit boardwithmaintainedtransverseairflowgreaterthan500lfpm.Electricalparametersareassuredonlyoverthedeclaredoperating temperaturerange.Functionaloperationofthedeviceexceedingtheseconditionsisnotimplied.Devicespecificationlimitvaluesare appliedindividuallyundernormaloperatingconditionsandnotvalidsimultaneously. (2) R =500ΩtoGNDandC =20pFtoGND.SeeFigure1. L L (3) V isminimuminputswingforwhichacparametersareassured. PP(min) Copyright©2009,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLink(s):SN65ELT21

SN65ELT21 SLLS923–JUNE2009....................................................................................................................................................................................................... www.ti.com TTLOutput C R C IncludesTest L L L Fixture Capacitance AC Test Load GND Figure1.TTLOutputACTestLoadingCondition IN IN 1.5 V 1.5 V OUT t t PLH PHL Figure2.OutputPropagationDelay 90% 10% t t r f Figure3.OutputRiseandFallTimes 4 SubmitDocumentationFeedback Copyright©2009,TexasInstrumentsIncorporated ProductFolderLink(s):SN65ELT21

SN65ELT21 www.ti.com....................................................................................................................................................................................................... SLLS923–JUNE2009 OUTPUTVOLTAGE vs FREQUENCY 5 VOH 85 4 V VOH 25 VOH -40 e - 3 g a olt VOL85 V put 2 VOL25 ut O VOL-40 1 V = 5.0V CC 0 0 50 100 150 200 250 300 350 400 450 500 Frequency - MHz Figure4. Copyright©2009,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLink(s):SN65ELT21

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) SN65ELT21D ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 ELT21 & no Sb/Br) SN65ELT21DGK ACTIVE VSSOP DGK 8 80 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 SIII & no Sb/Br) SN65ELT21DGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 SIII & no Sb/Br) SN65ELT21DR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 85 ELT21 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 3-Aug-2017 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) SN65ELT21DGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 SN65ELT21DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 3-Aug-2017 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) SN65ELT21DGKR VSSOP DGK 8 2500 367.0 367.0 35.0 SN65ELT21DR SOIC D 8 2500 367.0 367.0 35.0 PackMaterials-Page2

PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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