Product Sample & Technical Tools & Support & Reference Folder Buy Documents Software Community Design OPA317,OPA2317,OPA4317 SBOS682B–MAY2013–REVISEDJUNE2016 OPAx317 Zerø-Drift, Low-Offset, Rail-to-Rail I/O Operational Amplifier Precision Catalog 1 Features 3 Description • SupplyVoltage:1.8Vto5.5V The OPA317 series of CMOS operational amplifiers 1 offer precision performance at a very competitive • microPackages: price. These devices are members of the Zerø-Drift – Single:SOT23-5,SC-70,SOIC-8 family of amplifiers that use a proprietary – Dual:VSSOP-8,SOIC-8 autocalibration technique to simultaneously provide low offset voltage (90 μV maximum) and near-zero – Quad:SOIC-14,TSSOP-14 drift over time and temperature at only 35 μA • LowOffsetVoltage:20 μV(Typical) (maximum)ofquiescentcurrent. • CMRR:108-dB(Typical)PSRR The OPA317 family features rail-to-rail input and • QuiescentCurrent:35μA(Maximum) output in addition to near flat 1/f noise, making this • GainBandwidth:300kHz amplifieridealformanyapplications,andmucheasier to design into a system. These devices are optimized • Rail-to-RailInputandOutput for low-voltage operation as low as 1.8 V (±0.9 V) • InternalEMIandRFIFiltering andupto5.5V(±2.75V). 2 Applications The OPA317 (single version) is available in the SC70-5, SOT23-5, and SOIC-8 packages. The • Battery-PoweredInstruments OPA2317 (dual version) is offered in the VSSOP-8 • TemperatureMeasurements and SOIC-8 packages. The OPA4317 is offered in the standard SOIC-14 and TSSOP-14 packages. All • TransducerApplications versions are specified for operation from –40°C to • ElectronicScales +125°C. • MedicalInstrumentation • HandheldTestEquipment DeviceInformation(1) • CurrentSense PARTNUMBER PACKAGE BODYSIZE(NOM) SOIC(8) 3.91mm×4.90mm OPA317 SOT-23(5) 1.60mm×2.90mm SC70(5) 1.25mm×2.00mm SOIC(8) 3.91mm×4.90mm OPA2317 VSSOP(8) 3.00mm×3.00mm SOIC(14) 3.91mm×8.65mm OPA4317 TSSOP(14) 4.40mm×5.00mm (1) For all available packages, see the orderable addendum at theendofthedatasheet. DistributionofOffsetVoltage n o ati ul p Po 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4. 1. 8. 5. 2. 9. 6. 3. 3. 6. 9. 2. 5. 8. 1. 4. 2 2 1 1 1 - - - 1 1 1 2 2 - - - - - Offset Voltage (mV) 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.

OPA317,OPA2317,OPA4317 SBOS682B–MAY2013–REVISEDJUNE2016 www.ti.com Table of Contents 1 Features.................................................................. 1 8.4 DeviceFunctionalModes.......................................14 2 Applications........................................................... 1 9 ApplicationandImplementation........................ 15 3 Description............................................................. 1 9.1 ApplicationInformation............................................15 4 RevisionHistory..................................................... 2 9.2 TypicalApplications................................................16 9.3 SystemExample.....................................................18 5 PinConfigurationandFunctions......................... 3 10 PowerSupplyRecommendations..................... 18 6 Specifications......................................................... 5 11 Layout................................................................... 19 6.1 AbsoluteMaximumRatings......................................5 6.2 ESDRatings..............................................................5 11.1 LayoutGuidelines.................................................19 6.3 RecommendedOperatingConditions......................5 11.2 LayoutExample....................................................19 6.4 ThermalInformation:OPA317..................................6 12 DeviceandDocumentationSupport................. 20 6.5 ThermalInformation:OPA2317................................6 12.1 DocumentationSupport........................................20 6.6 ThermalInformation:OPA4317................................6 12.2 ReceivingNotificationofDocumentationUpdates20 6.7 ElectricalCharacteristics:V =1.8Vto5.5V..........7 12.3 RelatedLinks........................................................20 S 6.8 TypicalCharacteristics..............................................8 12.4 CommunityResources..........................................20 7 ParameterMeasurementInformation................11 12.5 Trademarks...........................................................20 12.6 ElectrostaticDischargeCaution............................20 8 DetailedDescription............................................ 12 12.7 Glossary................................................................20 8.1 Overview ................................................................12 13 Mechanical,Packaging,andOrderable 8.2 FunctionalBlockDiagram ......................................12 Information........................................................... 21 8.3 FeatureDescription.................................................12 4 Revision History NOTE:Pagenumbersforpreviousrevisionsmaydifferfrompagenumbersinthecurrentversion. ChangesfromRevisionA(June2013)toRevisionB Page • AddedESDRatingstable,FeatureDescriptionsection,DeviceFunctionalModes,ApplicationandImplementation section,PowerSupplyRecommendationssection,Layoutsection,DeviceandDocumentationSupportsection,and Mechanical,Packaging,andOrderableInformationsection. ................................................................................................ 1 • DeletedOrderingInformationtable;seePOAattheendofthedatasheet........................................................................... 1 ChangesfromOriginal(May2013)toRevisionA Page • DeletedPSRRFeaturesbullet............................................................................................................................................... 1 • ChangedQuiescentCurrentFeaturesbullet.......................................................................................................................... 1 • ChangedsecondsentenceinDescriptionsection................................................................................................................. 1 • ChangedPSRRmaximumvalue............................................................................................................................................ 7 2 SubmitDocumentationFeedback Copyright©2013–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA317 OPA2317 OPA4317

OPA317,OPA2317,OPA4317 www.ti.com SBOS682B–MAY2013–REVISEDJUNE2016 5 Pin Configuration and Functions OPA317:DBVPackage OPA317:DCKPackage 5-PinSOT-23 5-PinSC70 TopView TopView OUT 1 5 V+ +IN 1 5 V+ V- 2 V- 2 +IN 3 4 -IN -IN 3 4 OUT PinFunctions(5-PinPackages) PIN I/O DESCRIPTION NAME SOT-23 SC70 +IN 3 1 I Noninvertinginput –IN 4 3 I Invertinginput OUT 1 4 O Output V+ 5 5 — Positive(highest)powersupply V– 2 2 — Negative(lowest)powersupply OPA317:DPackage OPA2317:DandDGKPackages 8-PinSOIC 8-PinSOICandVSSOP TopView TopView NC(1) 1 8 NC(1) OUT A 1 8 V+ A -IN 2 7 V+ -IN A 2 7 OUT B B +IN 3 6 OUT +IN A 3 6 -IN B V- 4 5 NC(1) V- 4 5 +IN B (1) NC-Nointernalconnection PinFunctions(8-PinPackages) PIN OPA317 OPA2317 I/O DESCRIPTION NAME SOICand SOIC VSSOP +IN 3 — I Noninvertinginput –IN 2 — I Invertinginput +INA — 3 I Noninvertinginput,channelA –INA — 2 I Invertinginput,channelA +INB — 5 I Noninvertinginput,channelB –INB — 6 I Invertinginput,channelB 1 NC 5 — — Nointernalconnection 8 OUT 6 — O Output OUTA — 1 O Output,channelA OUTB — 7 O Output,channelB V+ 7 8 — Positive(highest)powersupply V– 4 4 — Negative(lowest)powersupply Copyright©2013–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:OPA317 OPA2317 OPA4317

OPA317,OPA2317,OPA4317 SBOS682B–MAY2013–REVISEDJUNE2016 www.ti.com OPA4317:DPackage OPA4317:SWPackage 14-PinSOIC 14-PinTSSOP TopView TopView OUT A 1 14 OUT D OUT A 1 14 OUT D -IN A 2 13 -IN D -IN A 2 13 -IN D A D +IN A 3 12 +IN D +IN A 3 12 +IN D V+ 4 11 V- V+ 4 11 V- +IN B 5 10 +IN C +IN B 5 10 +IN C B C -IN B 6 9 -IN C -IN B 6 9 -IN C OUT B 7 8 OUT C OUT B 7 8 OUT C PinFunctions(14-PinPackages) PIN I/O DESCRIPTION NAME SOIC,TSSOP +INA 3 I Noninvertinginput,channelA –INA 2 I Invertinginput,channelA +INB 5 I Noninvertinginput,channelB –INB 6 I Invertinginput,channelB +INC 10 I Noninvertinginput,channelC –INC 9 I Invertinginput,channelC +IND 12 I Noninvertinginput,channelD –IND 13 I Invertinginput,channelD OUTA 1 O Output,channelA OUTB 7 O Output,channelB OUTC 8 O Output,channelC OUTD 14 O Output,channelD V+ 4 — Positive(highest)powersupply V– 11 — Negative(lowest)powersupply 4 SubmitDocumentationFeedback Copyright©2013–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA317 OPA2317 OPA4317

OPA317,OPA2317,OPA4317 www.ti.com SBOS682B–MAY2013–REVISEDJUNE2016 6 Specifications 6.1 Absolute Maximum Ratings Overoperatingfree-airtemperaturerange,unlessotherwisenoted.(1) MIN MAX UNIT V =(V+)–(V–) Supplyvoltage 7 V S Signalinputterminals (2) (V–)–0.3 (V+)+0.3 V Signalinputterminals(2) –10 10 mA Outputshortcircuit(3) Continuous T Operatingtemperature –40 150 °C A T Junctiontemperature 150 °C J T Storagetemperature –65 150 °C stg (1) StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratings only,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommended OperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability. (2) Inputterminalsarediode-clampedtothepower-supplyrails.Inputsignalsthatcanswingmorethan0.3Vbeyondthesupplyrailsmust becurrent-limitedto10mAorless. (3) Short-circuittoground,oneamplifierperpackage. 6.2 ESD Ratings VALUE UNIT Human-bodymodel(HBM),perANSI/ESDA/JEDECJS-001(1) ±4000 V Electrostaticdischarge Charged-devicemodel(CDM),perJEDECspecificationJESD22-C101(2) ±1000 V (ESD) Machinemodel(MM) ±400 (1) JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess. (2) JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess. 6.3 Recommended Operating Conditions overoperatingfree-airtemperaturerange(unlessotherwisenoted). MIN MAX UNIT (V+–V–) Supplyvoltage 1.8(±0.9) 5.5(±2.25) V T Specifiedtemperature –40 125 °C A Copyright©2013–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:OPA317 OPA2317 OPA4317

OPA317,OPA2317,OPA4317 SBOS682B–MAY2013–REVISEDJUNE2016 www.ti.com 6.4 Thermal Information: OPA317 OPA317 THERMALMETRIC(1) D(SOIC) DBV(SOT-23) DCK(SC70) UNIT 8PINS 5PINS 5PINS R Junction-to-ambientthermalresistance 140.1 220.8 298.4 °C/W θJA R Junction-to-case(top)thermalresistance 89.8 97.5 65.4 °C/W θJC(top) R Junction-to-boardthermalresistance 80.6 61.7 97.1 °C/W θJB ψ Junction-to-topcharacterizationparameter 28.7 7.6 0.8 °C/W JT ψ Junction-to-boardcharacterizationparameter 80.1 61.1 95.5 °C/W JB R Junction-to-case(bottom)thermalresistance — — — °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. 6.5 Thermal Information: OPA2317 OPA2317 THERMALMETRIC(1) D(SOIC) DGK(VSSOP) UNIT 8PINS 8PINS R Junction-to-ambientthermalresistance 124 180.3 °C/W θJA R Junction-to-case(top)thermalresistance 73.7 48.1 °C/W θJC(top) R Junction-to-boardthermalresistance 64.4 100.9 °C/W θJB ψ Junction-to-topcharacterizationparameter 18 2.4 °C/W JT ψ Junction-to-boardcharacterizationparameter 63.9 99.3 °C/W JB R Junction-to-case(bottom)thermalresistance — — °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. 6.6 Thermal Information: OPA4317 OPA4317 THERMALMETRIC(1) D(SOIC) PW(TSSOP) UNIT 14PINS 14PINS R Junction-to-ambientthermalresistance 83.8 120.8 °C/W θJA R Junction-to-case(top)thermalresistance 70.7 34.3 °C/W θJC(top) R Junction-to-boardthermalresistance 59.5 62.8 °C/W θJB ψ Junction-to-topcharacterizationparameter 11.6 1 °C/W JT ψ Junction-to-boardcharacterizationparameter 37.7 56.5 °C/W JB R Junction-to-case(bottom)thermalresistance — — °C/W θJC(bot) (1) Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplication report. 6 SubmitDocumentationFeedback Copyright©2013–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA317 OPA2317 OPA4317

OPA317,OPA2317,OPA4317 www.ti.com SBOS682B–MAY2013–REVISEDJUNE2016 6.7 Electrical Characteristics: V = 1.8 V to 5.5 V S AtT =25°C,R =10kΩconnectedtomidsupply,V =V =midsupply,unlessotherwisenoted. A L CM OUT PARAMETER TESTCONDITIONS MIN TYP MAX UNIT OFFSETVOLTAGE VS=5V 20 ±90 VOS Inputoffsetvoltage μV TA=–40°Cto+125°C,VS=5V ±100 Inputoffsetvoltage dVOS/dT vstemperature TA=–40°Cto+125°C 0.05 μV/°C Inputoffsetvoltage PSRR vspowersupply TA=–40°Cto+125°C,VS=1.8Vto5.5V 1 10 μV/V Long-termstability(1) See(1) Channelseparation,DC 5 μV/V INPUTBIASCURRENT ±275 IB Inputbiascurrent OPA4317 ±155 pA TA=–40°Cto+125°C ±300 ±400 IOS Inputoffsetcurrent pA OPA4317 ±140 NOISE en Inputvoltagenoisedensity f=1kHz 55 nV/√Hz f=0.01Hzto1Hz 0.3 Inputvoltagenoise μVPP f=0.1Hzto10Hz 1.1 in Inputcurrentnoise f=10Hz 100 fA/√Hz INPUTVOLTAGERANGE VCM Common-modevoltage (V–)–0.1 (V+)+0.1 V TA=–40°Cto+125°C 95 108 (V–)–0.1V<VCM<(V+)+0.1V CMRR Common-moderejectionratio OPA4317 dB TA=–40°Cto+125°C 95 108 (V–)–0.1V<VCM<(V+)+0.1V,VS=5.5V INPUTCAPACITANCE Differential 2 pF Common-mode 4 pF OPEN-LOOPGAIN AOL Open-loopvoltagegain T(VA–=)+–4100°0CmtoV+<12V5O°C<,(RV+L)=–1100k0ΩmV 100 110 dB FREQUENCYRESPONSE GBW Gain-bandwidthproduct CL=100pF 300 kHz SR Slewrate G=1 0.15 V/μs OUTPUT Voltageoutputswingfromrail TA=–40°Cto+125°C 30 100 mV ISC Short-circuitcurrent ±5 mA CL Capacitiveloaddrive SeetheTypicalCharacteristicssection Open-loopoutputimpedance f=350kHz,IO=0 2 kΩ POWERSUPPLY VS Specifiedvoltage 1.8 5.5 V IQ Quiescentcurrentperamplifier TA=–40°Cto+125°C,IO=0 21 35 μA Turnontime VS=5V 100 µs (1) 300-hourlifetestat150°Cdemonstratedrandomlydistributedvariationofapproximately1μV. Copyright©2013–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:OPA317 OPA2317 OPA4317

OPA317,OPA2317,OPA4317 SBOS682B–MAY2013–REVISEDJUNE2016 www.ti.com 6.8 Typical Characteristics AtT =25°C,C =0pF,R =10kΩconnectedtomidsupply,V =V =midsupply,unlessotherwisenoted. A L L CM OUT 120 250 B) 100 200 d n ( e Gai 80 Phase 150 Population Loop Voltag 6400 Gain 15000 Phase (°) n- 20 0 e p O 0 -50 -20 -100 10 100 1k 10k 100k 1M 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4. 1. 8. 5. 2. 9. 6. 3. 3. 6. 9. 2. 5. 8. 1. 4. Frequency (Hz) 2 2 1 1 1 - - - 1 1 1 2 2 - - - - - Offset Voltage (mV) Figure1.OffsetVoltageProductionDistribution Figure2.Open-LoopGainvsFrequency 140 120 +PSRR 120 100 100 -PSRR 80 B) B) R (d 80 R (d 60 R R M 60 S C P 40 40 20 20 0 0 1 10 100 1k 10k 100k 1M 1 10 100 1k 10k 100k 1M Frequency (Hz) Frequency (Hz) Figure3.Common-ModeRejectionRatiovsFrequency Figure4.Power-SupplyRejectionRatiovsFrequency 3 210 V =±2.75V S V =±0.9V 205 S 2 200 put Swing (V) 10 +25-°4C0°C +125°C +25°C -40°C Bias Current(pA) -111999005 –IB Out --12 +25°C +125°C Input --210905 +IB -205 -40°C -3 -210 0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 Output Current (mA) Common-Mode Voltage (V) Figure5.OutputVoltageSwingvsOutputCurrent Figure6.InputBiasCurrentvsCommon-ModeVoltage 8 SubmitDocumentationFeedback Copyright©2013–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA317 OPA2317 OPA4317

OPA317,OPA2317,OPA4317 www.ti.com SBOS682B–MAY2013–REVISEDJUNE2016 Typical Characteristics (continued) AtT =25°C,C =0pF,R =10kΩconnectedtomidsupply,V =V =midsupply,unlessotherwisenoted. A L L CM OUT 250 25 –I B 200 V = 5.5 V S –I 150 B 20 A) A) nt (p 100 nt(µ VS= 1.8 V e 50 e 15 Curr 0 VS= 5.5 V Curr Bias -50 VS= 1.8 V cent 10 put -100 uies In -150 +IB Q 5 -200 +I -250 B 0 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 Temperature (°C) Temperature (°C) Figure7.InputBiasCurrentvsTemperature Figure8.QuiescentCurrentvsTemperature v) div) V/di mV/ Voltage (1 oltage (50 Output utput V O Time (50 µs/div) Time (5 µs/div) G=1 R =10kΩ G=1 R =10kΩ L L Figure9.Large-SignalStepResponse Figure10.Small-SignalStepResponse v di V/ 2 0 Input Input v di V/ Output 2 0 v 0 di V/ 1 v 0 Output di V/ 1 Time (50ms/div) Time (50ms/div) SeeFigure18 SeeFigure18 Figure11.PositiveOvervoltageRecovery Figure12.NegativeOvervoltageRecovery Copyright©2013–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:OPA317 OPA2317 OPA4317

OPA317,OPA2317,OPA4317 SBOS682B–MAY2013–REVISEDJUNE2016 www.ti.com Typical Characteristics (continued) AtT =25°C,C =0pF,R =10kΩconnectedtomidsupply,V =V =midsupply,unlessotherwisenoted. A L L CM OUT 600 40 35 500 30 me (µs) 400 ot (%) 25 Ti 300 ho 20 ettling 200 Overs 15 S 0.001% 10 100 5 0.01% 0 0 1 10 100 10 100 1000 Gain (dB) Load Capacitance (pF) 4-VStep Figure13.SettlingTimevsClosed-LoopGain Figure14.Small-SignalOvershootvsLoadCapacitance 1000 1000 )z C 500 nV/div ÖVoltage Noise (nV/H 100 Continues withCV nuoorltr ae1gn/fet ( NfNliocoikisseeer) noise. 100 urrent Noise (fA/)HzÖ 10 10 1 s/div 1 10 100 1k 10k Frequency (Hz) Figure15.0.1-Hzto10-HzNoise Figure16.CurrentandVoltageNoiseSpectralDensityvs Frequency 50 Normal Operating Range 40 30 A) u 20 ent ( 10 Curr 0 s a -10 Bi ut -20 p n I -30 Over-Driven Condition Over-Driven Condition -40 -50 -1V -800 -600 -400 -200 0 200 400 600 800 Input Differential Voltage (mV) SeetheInputDifferentialVoltagesection Figure17.InputBiasCurrentvs InputDifferentialVoltage 10 SubmitDocumentationFeedback Copyright©2013–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA317 OPA2317 OPA4317

OPA317,OPA2317,OPA4317 www.ti.com SBOS682B–MAY2013–REVISEDJUNE2016 7 Parameter Measurement Information 10 kW 2.5 V 1 kW Device -2.5 V Figure18. OvervoltageRecoveryCircuit Copyright©2013–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:OPA317 OPA2317 OPA4317

OPA317,OPA2317,OPA4317 SBOS682B–MAY2013–REVISEDJUNE2016 www.ti.com 8 Detailed Description 8.1 Overview The OPAx317 series is a family of low-power, rail-to-rail input and output operational amplifiers. These devices operate from 1.8 V to 5.5 V, are unity-gain stable, and are suitable for a wide range of general-purpose applications. The class AB output stage is capable of driving ≤ 10-kΩ loads connected to any point between V+ andground.Theinputcommon-modevoltagerangeincludesbothrailsandallowstheOPA317seriestobeused invirtuallyanysingle-supplyapplication.Rail-to-railinputandoutputswingsignificantlyincreasesdynamicrange, especially in low-supply applications, and makes them ideal for driving sampling analog-to-digital converters (ADCs). 8.2 Functional Block Diagram C2 Notch CHOP1 GM1 CHOP2 Filter GM2 GM3 +IN OUT -IN C1 GM_FF Copyright © 2016, Texas Instruments Incorporated 8.3 Feature Description 8.3.1 OperatingVoltage The OPA317 series of operational amplifiers can be used with single or dual supplies from an operating range of V =1.8V(±0.9V)upto5.5V(±2.75V). S CAUTION Supplyvoltagesgreaterthan7Vcanpermanentlydamagethedevice. See the Absolute Maximum Ratings table. Key parameters that vary over the supply voltage or temperature rangeareshownintheTypicalCharacteristicssection. 12 SubmitDocumentationFeedback Copyright©2013–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA317 OPA2317 OPA4317

OPA317,OPA2317,OPA4317 www.ti.com SBOS682B–MAY2013–REVISEDJUNE2016 Feature Description (continued) 8.3.2 InputVoltage The OPA317, OPA2317, and OPA4317 input common-mode voltage range extends 0.1 V beyond the supply rails. The OPA317 device is designed to cover the full range without the troublesome transition region found in someotherrail-to-railamplifiers. Typically, input bias current is about 200 pA; however, input voltages exceeding the power supplies can cause excessive current to flow into or out of the input pins. Momentary voltages greater than the power supply can be tolerated if the input current is limited to 10 mA. This limitation is easily accomplished with an input resistor, as showninFigure19. 5 V I OVERLOAD 10 mAmax Device V OUT V IN 5 kW NOTE:Currentlimitingresistorrequiredifinputvoltageexceedssupplyrailsby≥0.3V. Figure19. InputCurrentProtection 8.3.3 InputDifferentialVoltage The typical input bias current of the OPA317 during normal operation is approximately 200 pA. In overdriven conditions, the bias current can increase significantly (see Figure 17).The most common cause of an overdriven conditionoccurswhentheoperationalamplifierisoutsideofthelinearrangeofoperation.Whentheoutputofthe operational amplifier is driven to one of the supply rails, the feedback loop requirements cannot be satisfied, and a differential input voltage develops across the input pins. This differential input voltage results in activation of parasitic diodes inside the front-end input chopping switches that combine with 10-kΩ electromagnetic interference(EMI)filterresistorstocreatetheequivalentcircuitshowninFigure20. NOTE Theinputbiascurrentremainswithinspecificationwithinthelinearregion. 10 kW Clamp +IN CORE -IN 10 kW Figure20. EquivalentInputCircuit 8.3.4 InternalOffsetCorrection The OPA317, OPA2317, and OPA4317 operational amplifiers use an auto-calibration technique with a time- continuous, 125-kHz operational amplifier in the signal path. This amplifier is zero-corrected every 8 μs using a proprietary technique. Upon power up, the amplifier requires approximately 100 μs to achieve specified V OS accuracy.Thisdesignhasnoaliasingorflickernoise. 8.3.5 EMISusceptibilityandInputFiltering Operational amplifiers vary in susceptibility to EMI. If conducted EMI enters the operational amplifier, the DC offset observed at the amplifier output may shift from its nominal value while the EMI is present. This shift is a result of signal rectification associated with the internal semiconductor junctions. While all operational amplifier pin functions can be affected by EMI, the input pins are likely to be the most susceptible. The OPA317 operational amplifier family incorporates an internal input low-pass filter that reduces the amplifier response to EMI.Bothcommon-modeanddifferentialmodefilteringareprovidedbytheinputfilter.Thefilterisdesignedfora cutofffrequencyofapproximately8MHz(–3dB),witharoll-offof20dBperdecade. Copyright©2013–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:OPA317 OPA2317 OPA4317

OPA317,OPA2317,OPA4317 SBOS682B–MAY2013–REVISEDJUNE2016 www.ti.com 8.4 Device Functional Modes The OPAx317 family of devices are powered on when the supply is connected. The device can be operated as a single-supplyoperationalamplifieroradual-supplyamplifier,dependingontheapplication. 14 SubmitDocumentationFeedback Copyright©2013–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA317 OPA2317 OPA4317

OPA317,OPA2317,OPA4317 www.ti.com SBOS682B–MAY2013–REVISEDJUNE2016 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validateandtesttheirdesignimplementationtoconfirmsystemfunctionality. 9.1 Application Information The OPA317, OPA2317, and OPA4317 are unity-gain stable, precision operational amplifiers free from unexpected output and phase reversal. Proprietary Zerø-Drift circuitry gives the benefit of low input offset voltage over time and temperature, as well as lowering the 1/f noise component. As a result of the high PSRR, these devices work well in applications that run directly from battery power without regulation. The OPA317 family is optimized for low-voltage, single-supply operation. These miniature, high-precision, low quiescent current amplifiers offer high impedance inputs that have a common-mode range 100 mV beyond the supplies, and a rail- to-rail output that swings within 100 mV of the supplies under normal test conditions. The OPA317 series are precisionamplifiersforcost-sensitiveapplications. 9.1.1 AchievingOutputSwingtotheOpAmpNegativeRail Some applications require output voltage swings from 0 V to a positive full-scale voltage (such as 2.5 V) with excellent accuracy. With most single-supply operational amplifiers, problems arise when the output signal approaches 0 V, near the lower output swing limit of a single-supply operational amplifier. A good single-supply operational amplifier may swing close to single-supply ground, but does not reach ground. The output of the OPA317, OPA2317, and OPA4317 can be made to swing to ground, or slightly below, on a single-supply power source. To do so requires the use of another resistor and an additional, more negative power supply than the operational amplifier negative supply. A pulldown resistor can be connected between the output and the additional negative supply to pull the output down below the value that the output would otherwise achieve, as showninFigure21. V+ = 5 V Device V OUT V IN R = 20 kW P OpAmp V-= GND -5 V Additional Negative Supply Figure21. ForV RangetoGround OUT The OPA317, OPA2317, and OPA4317 have an output stage that allows the output voltage to be pulled to its negative supply rail, or slightly below, using the technique previously described. This technique only works with some types of output stages. The OPA317, OPA2317, and OPA4317 have been characterized to perform with this technique; the recommended resistor value is approximately 20 kΩ. This configuration increases the current consumption by several hundreds of microamps. Accuracy is excellent down to 0 V and as low as –2 mV. Limiting and nonlinearity occur below –2 mV, but excellent accuracy returns as the output drives back up above –2 mV. Lowering the resistance of the pulldown resistor allows the operational amplifier to swing even further belowthenegativerail.Useresistancesaslowas10kΩ toachieveexcellentaccuracydownto –10mV. Copyright©2013–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:OPA317 OPA2317 OPA4317

OPA317,OPA2317,OPA4317 SBOS682B–MAY2013–REVISEDJUNE2016 www.ti.com 9.2 Typical Applications The circuit shown in Figure 22 is a high-side voltage-to-current (V-I) converter. It translates an input voltage of 0 V to 2 V to an output current of 0 mA to 100 mA. Figure 23 shows the measured transfer function for this circuit.ThelowoffsetvoltageandoffsetdriftoftheOPA317facilitateexcellentDCaccuracyforthecircuit. V+ R R S2 I S3 I 470 (cid:13) RS2 4.7 (cid:13) RS3 VRS2 10 k(cid:13) R4 VRS3 C 7 2200 pF R 5 A2 V+ + 330 (cid:13) Q2 + 200 (cid:13) Q1 A1 R 3 + V IN – 1000 pF C 6 10 k(cid:13) R VRS1 VLOAD 2 R R I S1 I LOAD LOAD 2 k(cid:13) RS1 Copyright © 2016, Texas Instruments Incorporated Figure22. High-SideVoltage-to-Current(V-I)Converter 9.2.1 DesignRequirements Thedesignrequirementsareasfollows: • SupplyVoltage:5-VDC • Input:0-Vto2-VDC • Output:0-mAto100-mADC 9.2.2 DetailedDesignProcedure The V-I transfer function of the circuit is based on the relationship between the input voltage, V , and the three IN current-sensing resistors: R , R , and R . The relationship between V and R determines the current that S1 S2 S3 IN S1 flows through the first stage of the design. The current gain from the first stage to the second stage is based on therelationshipbetweenR andR . S2 S3 16 SubmitDocumentationFeedback Copyright©2013–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA317 OPA2317 OPA4317

OPA317,OPA2317,OPA4317 www.ti.com SBOS682B–MAY2013–REVISEDJUNE2016 Typical Applications (continued) For a successful design, pay close attention to the DC characteristics of the operational amplifier chosen for the application. To meet the performance goals, this application benefits from an operational amplifier with low offset voltage, low temperature drift, and rail-to-rail output. The OPA2317 CMOS operational amplifier is a high- precision, 5-µV offset, 0.05-μV/°C drift amplifier optimized for low-voltage, single-supply operation with an output swing to within 50 mV of the positive rail. The OPA2317 family uses chopping techniques to provide low initial offset voltage and near-zero drift over time and temperature. Low offset voltage and low drift reduce the offset error in the system, making these devices appropriate for precise DC control. The rail-to-rail output stage of the OPA2317 ensures that the output swing of the operational amplifier is able to fully control the gate of the MOSFETdeviceswithinthesupplyrails. 9.2.3 ApplicationCurve 0.1 Load 0.075 A) nt ( e urr0.05 C ut p ut O 0.025 0 0 0.5 1 1.5 2 Input Voltage (V) D001 Figure23. MeasuredTransferFunctionforHigh-SideV-IConverter Copyright©2013–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:OPA317 OPA2317 OPA4317

OPA317,OPA2317,OPA4317 SBOS682B–MAY2013–REVISEDJUNE2016 www.ti.com 9.3 System Example R are operational resistors used to isolate the ADS1100 from the noise of the digital I2C bus. The ADS1100 N device is a 16-bit converter; therefore, a precise reference is essential for maximum accuracy. If absolute accuracyisnotrequiredandthe5-Vpowersupplyissufficientlystable,theREF3130 devicemaybeomitted. 3 V +5 V REF3130 Load R R 1 2 4.99 kW 49.9 kW R V 716.5 kW 5R6NW ILOAD R1SWHUNT Device R3 R4 ADS1100 RN I2C 4.99 kW 48.7 kW 56W Stray Ground-Loop Resistance R7 (PGAGain = 4) 1.18 kW FS = 3.0 V Copyright © 2016,Texas Instruments Incorporated NOTE:1%resistorsprovideadequatecommon-moderejectionatsmallground-looperrors. Figure24. Low-SideCurrentMonitor 10 Power Supply Recommendations TheOPAx317deviceisspecifiedforoperationfrom1.8Vto5.5V(±0.9Vto ±2.75V);manyspecificationsapply from –40°C to +125°C. The Electrical Characteristics: V = 1.8 V to 5.5 V table presents parameters that can S exhibitsignificantvariancewithregardtooperatingvoltageortemperature. CAUTION Supplyvoltageslargerthan7Vcanpermanentlydamagethedevice(seetheAbsolute MaximumRatings)table. Place 0.1-μF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or high- impedance power supplies. For more detailed information on bypass capacitor placement, see the Layout Guidelinessection. 18 SubmitDocumentationFeedback Copyright©2013–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA317 OPA2317 OPA4317

OPA317,OPA2317,OPA4317 www.ti.com SBOS682B–MAY2013–REVISEDJUNE2016 11 Layout 11.1 Layout Guidelines Attention to good layout practice is always recommended. Keep traces short and, when possible, use a printed- circuit board (PCB) ground plane with surface-mount components placed as close to the device pins as possible. Place a 0.1-μF capacitor closely across the supply pins. Apply these guidelines throughout the analog circuit to improve performance and provide benefits, such as reducing the electromagnetic interference (EMI) susceptibility. Optimize circuit layout and mechanical conditions for lowest offset voltage and precision performance. Avoid temperature gradients that create thermoelectric (Seebeck) effects in the thermocouple junctions formed from connecting dissimilar conductors. These thermally-generated potentials can be made to cancel by assuring they areequalonbothinputterminals.Otherlayoutanddesignconsiderationsinclude: • Uselowthermoelectric-coefficientconditions(avoiddissimilarmetals). • Thermallyisolatecomponentsfrompowersuppliesorotherheatsources. • Shieldoperationalamplifierandinputcircuitryfromaircurrents,suchascoolingfans. Following these guidelines reduces the likelihood of junctions being at different temperatures, which can cause thermoelectricvoltagedriftof0.1 μV/°Corhigher,dependingonthematerialsused. 11.2 Layout Example VS+ VOUT VS– OUT V+ GND V– Use a low-ESR, Use a low-ESR, ceramic bypass ceramic bypass capacitor. capacitor. RG VIN +IN –IN GND GND Run the input traces as far away from the supply lines RF Place components as possible. close to the device and to each other to reduce parasitic errors. Copyright © 2016, Texas Instruments Incorporated Figure25. OPAx317LayoutExample Copyright©2013–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:OPA317 OPA2317 OPA4317

OPA317,OPA2317,OPA4317 SBOS682B–MAY2013–REVISEDJUNE2016 www.ti.com 12 Device and Documentation Support 12.1 Documentation Support 12.1.1 RelatedDocumentation Forrelateddocumentationseethefollowing: • Self-Calibrating,16-BitAnalog-to-DigitalConverter, • 15ppm/°CMax,100μA,SOT23-3SeriesVoltageReference, 12.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed.Forchangedetails,reviewtherevisionhistoryincludedinanyreviseddocument. 12.3 Related Links Table 1 lists quick access links. Categories include technical documents, support and community resources, toolsandsoftware,andquickaccesstosampleorbuy. Table1.RelatedLinks TECHNICAL TOOLS& SUPPORT& PARTS PRODUCTFOLDER SAMPLE&BUY DOCUMENTS SOFTWARE COMMUNITY OPA317 Clickhere Clickhere Clickhere Clickhere Clickhere OPA2317 Clickhere Clickhere Clickhere Clickhere Clickhere OPA4317 Clickhere Clickhere Clickhere Clickhere Clickhere 12.4 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TIE2E™OnlineCommunity TI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelp solveproblemswithfellowengineers. DesignSupport TI'sDesignSupport QuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand contactinformationfortechnicalsupport. 12.5 Trademarks E2EisatrademarkofTexasInstruments. Allothertrademarksarethepropertyoftheirrespectiveowners. 12.6 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriateprecautions.Failuretoobserveproperhandlingandinstallationprocedurescancausedamage. ESDdamagecanrangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmaybemore susceptibletodamagebecauseverysmallparametricchangescouldcausethedevicenottomeetitspublishedspecifications. 12.7 Glossary SLYZ022—TIGlossary. Thisglossarylistsandexplainsterms,acronyms,anddefinitions. 20 SubmitDocumentationFeedback Copyright©2013–2016,TexasInstrumentsIncorporated ProductFolderLinks:OPA317 OPA2317 OPA4317

OPA317,OPA2317,OPA4317 www.ti.com SBOS682B–MAY2013–REVISEDJUNE2016 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of thisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation. Copyright©2013–2016,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:OPA317 OPA2317 OPA4317

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) OPA2317ID ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 O2317A & no Sb/Br) OPA2317IDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 OVBQ & no Sb/Br) OPA2317IDGKT ACTIVE VSSOP DGK 8 250 Green (RoHS NIPDAUAG Level-1-260C-UNLIM -40 to 125 OVBQ & no Sb/Br) OPA2317IDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 O2317A & no Sb/Br) OPA317ID ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 O317A & no Sb/Br) OPA317IDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 OVCQ & no Sb/Br) OPA317IDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 OVCQ & no Sb/Br) OPA317IDCKR ACTIVE SC70 DCK 5 3000 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 SJP & no Sb/Br) OPA317IDCKT ACTIVE SC70 DCK 5 250 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 SJP & no Sb/Br) OPA317IDR ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 O317A & no Sb/Br) OPA4317ID ACTIVE SOIC D 14 50 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 O4317A & no Sb/Br) OPA4317IDR ACTIVE SOIC D 14 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM -40 to 125 O4317A & no Sb/Br) OPA4317IPW ACTIVE TSSOP PW 14 90 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 O4317A & no Sb/Br) OPA4317IPWR ACTIVE TSSOP PW 14 2000 Green (RoHS NIPDAU Level-2-260C-1 YEAR -40 to 125 O4317A & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF OPA2317, OPA317 : •Automotive: OPA2317-Q1, OPA317-Q1 NOTE: Qualified Version Definitions: •Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 27-Sep-2017 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) OPA2317IDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 OPA2317IDGKT VSSOP DGK 8 250 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 OPA2317IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 OPA317IDBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 OPA317IDBVT SOT-23 DBV 5 250 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3 OPA317IDCKR SC70 DCK 5 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 OPA317IDCKT SC70 DCK 5 250 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 OPA317IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 OPA4317IDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 OPA4317IPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 27-Sep-2017 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) OPA2317IDGKR VSSOP DGK 8 2500 364.0 364.0 27.0 OPA2317IDGKT VSSOP DGK 8 250 364.0 364.0 27.0 OPA2317IDR SOIC D 8 2500 367.0 367.0 35.0 OPA317IDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 OPA317IDBVT SOT-23 DBV 5 250 180.0 180.0 18.0 OPA317IDCKR SC70 DCK 5 3000 180.0 180.0 18.0 OPA317IDCKT SC70 DCK 5 250 180.0 180.0 18.0 OPA317IDR SOIC D 8 2500 367.0 367.0 35.0 OPA4317IDR SOIC D 14 2500 367.0 367.0 38.0 OPA4317IPWR TSSOP PW 14 2000 367.0 367.0 35.0 PackMaterials-Page2

None

None

PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 0.1 C 1.75 1.45 1.45 B A 0.90 PIN 1 INDEX AREA 1 5 2X 0.95 3.05 2.75 1.9 1.9 2 4 3 0.5 5X 0.3 0.15 0.2 C A B (1.1) TYP 0.00 0.25 GAGE PLANE 0.22 TYP 0.08 8 TYP 0.6 0 0.3 TYP SEATING PLANE 4214839/E 09/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. 4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. www.ti.com

EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK SOLDER MASK METAL UNDER METAL OPENING OPENING SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MAX 0.07 MIN ARROUND ARROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4214839/E 09/2019 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM 2 (1.9) 2X(0.95) 3 4 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/E 09/2019 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. www.ti.com

None

None

None

None

PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

None

None

IMPORTANTNOTICEANDDISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2020, Texas Instruments Incorporated