MC14093B Quad 2-Input “NAND" Schmitt Trigger The MC14093B Schmitt trigger is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. These devices find primary use where low power dissipation and/or high noise immunity is desired. The MC14093B http://onsemi.com may be used in place of the MC14011B quad 2−input NAND gate for enhanced noise immunity or to “square up” slowly changing waveforms. Features SOIC−14 SOEIAJ−14 TSSOP−14 • D SUFFIX F SUFFIX DT SUFFIX Supply Voltage Range = 3.0 Vdc to 18 Vdc CASE 751A CASE 965 CASE 948G • Capable of Driving Two Low−Power TTL Loads or One Low−Power Schottky TTL Load Over the Rated Temperature PIN ASSIGNMENT Range • Triple Diode Protection on All Inputs IN 1A 1 14 VDD • Pin−for−Pin Compatible with CD4093 IN 2A 2 13 IN 2D • Can be Used to Replace MC14011B OUTA 3 12 IN 1D • Independent Schmitt−Trigger at each Input OUTB 4 11 OUTD • NLV Prefix for Automotive and Other Applications Requiring IN 1B 5 10 OUTC Unique Site and Control Change Requirements; AEC−Q100 IN 2B 6 9 IN 2C Qualified and PPAP Capable • These Devices are Pb−Free and are RoHS Compliant VSS 7 8 IN 1C MAXIMUM RATINGS (Voltages Referenced to VSS) MARKING DIAGRAMS Symbol Parameter Value Unit 14 14 VDD DC Supply Voltage Range −0.5 to +18.0 V 14093BG MC14093B Vin, Vout Input or Output Voltage Range −0.5 to VDD + 0.5 V AWLYWW ALYWG (DC or Transient) 1 Iin, Iout Input or Output Current ±10 mA 1 (DC or Transient) per Pin SOIC−14 SOEIAJ−14 PD Power Dissipation, 500 mW 14 per Package (Note 1) 14 TA Ambient Temperature Range −55 to +125 °C A0L9Y3WB(cid:3) Tstg Storage Temperature Range −65 to +150 °C (cid:3) TL Lead Temperature 260 °C 1 (8−Second Soldering) TSSOP−14 Stresses exceeding those listed in the Maximum Ratings table may damage the A = Assembly Location device. If any of these limits are exceeded, device functionality should not be WL, L = Wafer Lot assumed, damage may occur and reliability may be affected. 1. Temperature Derating: “D/DW” Packages: –7.0 mW/(cid:2)C From 65(cid:2)C To 125(cid:2)C YY, Y = Year WW, W = Work Week This device contains protection circuitry to guard against damage due to high G or (cid:3) = Pb−Free Package static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this (Note: Microdot may be in either location) high−impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD. ORDERING INFORMATION Unused inputs must always be tied to an appropriate logic voltage level See detailed ordering and shipping information in the package (e.g.,either VSS or VDD). Unused outputs must be left open. dimensions section on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2014 1 Publication Order Number: August, 2014 − Rev. 10 MC14093B/D

MC14093B LOGIC DIAGRAM 1 3 2 5 4 6 8 10 9 12 11 13 VDD = PIN 14 VSS = PIN 7 EQUIVALENT CIRCUIT SCHEMATIC (1/4 OF CIRCUIT SHOWN) ORDERING INFORMATION Device Package Shipping† MC14093BDG SOIC−14 55 Units / Rail (Pb−Free) NLV14093BDG* SOIC−14 55 Units / Rail (Pb−Free) MC14093BDR2G SOIC−14 2500 Units / Tape & Reel (Pb−Free) NLV14093BDR2G* SOIC−14 2500 Units / Tape & Reel (Pb−Free) MC14093BDTR2G TSSOP−14 2500 Units / Tape & Reel (Pb−Free) NLV14093BDTR2G* TSSOP−14 2500 Units / Tape & Reel (Pb−Free) MC14093BFELG SOEIAJ−14 2000 Units / Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable. http://onsemi.com 2

MC14093B ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS) −55(cid:2)C 25(cid:2)C 125(cid:2)C VDD Typ Characteristic Symbol Vdc Min Max Min (Note 2) Max Min Max Unit Output Voltage “0” Level VOL 5.0 − 0.05 − 0 0.05 − 0.05 Vdc Vin = VDD or 0 10 − 0.05 − 0 0.05 − 0.05 15 − 0.05 − 0 0.05 − 0.05 “1” Level VOH 5.0 4.95 − 4.95 5.0 − 4.95 − Vdc Vin = 0 or VDD 10 9.95 − 9.95 10 − 9.95 − 15 14.95 − 14.95 15 − 14.95 − Output Drive Current IOH mAdc (VOH = 2.5 Vdc) Source 5.0 –3.0 − –2.4 –4.2 − –1.7 − (VOH = 4.6 Vdc) 5.0 –0.64 − –0.51 –0.88 − –0.36 − (VOH = 9.5 Vdc) 10 –1.6 − –1.3 –2.25 − –0.9 − (VOH = 13.5 Vdc) 15 –4.2 − –3.4 –8.8 − –2.4 − (VOL = 0.4 Vdc) Sink IOL 5.0 0.64 − 0.51 0.88 − 0.36 − mAdc (VOL = 0.5 Vdc) 10 1.6 − 1.3 2.25 − 0.9 − (VOL = 1.5 Vdc) 15 4.2 − 3.4 8.8 − 2.4 − Input Current Iin 15 − ±0.1 − ±0.00001 ±0.1 − ±1.0 (cid:2)Adc Input Capacitance Cin − − − − 5.0 7.5 − − pF (Vin = 0) Quiescent Current IDD 5.0 − 0.25 − 0.0005 0.25 − 7.5 (cid:2)Adc (Per Package) 10 − 0.5 − 0.0010 0.5 − 15 15 − 1.0 − 0.0015 1.0 − 30 Total Supply Current (Notes 3 & 4) IT 5.0 IT = (1.2 (cid:2)A/kHz) f + IDD (cid:2)Adc (Dynamic plus Quiescent, 10 IT = (2.4 (cid:2)A/kHz) f + IDD Per Package) 15 IT = (3.6 (cid:2)A/kHz) f + IDD (CL = 50 pF on all outputs, all buffers switching) Hysteresis Voltage VH† 5.0 0.3 2.0 0.3 1.1 2.0 0.3 2.0 Vdc 10 1.2 3.4 1.2 1.7 3.4 1.2 3.4 15 1.6 5.0 1.6 2.1 5.0 1.6 5.0 Threshold Voltage Vdc Positive−Going VT+ 5.0 2.2 3.6 2.2 2.9 3.6 2.2 3.6 10 4.6 7.1 4.6 5.9 7.1 4.6 7.1 15 6.8 10.8 6.8 8.8 10.8 6.8 10.8 Negative−Going VT– 5.0 0.9 2.8 0.9 1.9 2.8 0.9 2.8 Vdc 10 2.5 5.2 2.5 3.9 5.2 2.5 5.2 15 4.0 7.4 4.0 5.8 7.4 4.0 7.4 Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 2. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance. 3. The formulas given are for the typical characteristics only at 25(cid:2)C. 4. To calculate total supply current at loads other than 50 pF: IT(CL) = IT(50 pF) + (CL – 50) Vfk where: IT is in (cid:2)A (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.004. http://onsemi.com 3

MC14093B SWITCHING CHARACTERISTICS (CL = 50 pF, TA = 25(cid:2)C) VDD Typ Characteristic Symbol Vdc Min (Note 5) Max Unit Output Rise Time tTLH 5.0 − 100 200 ns 10 − 50 100 15 − 40 80 Output Fall Time tTHL 5.0 − 100 200 ns 10 − 50 100 15 − 40 80 Propagation Delay Time tPLH, tPHL 5.0 − 125 250 ns 10 − 50 100 15 − 40 80 5. Data labeled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance. VDD 20 ns 20 ns 14 INPUT 90% VDD 50% PULSE OUTPUT 10% VSS GENERATOR INPUT 7 VSS CL OUTPtUPTHL 9500%% tPLH VOH 10% VOL tTHL tTLH Figure 1. Switching Time Test Circuit and Waveforms VH VDD VH VDD Vin Vin VSS VSS VDD VDD Vout Vout VSS VSS (a) Schmitt Triggers will square up (b) A Schmitt trigger offers maximum (a) inputs with slow rise and fall times. (b) noise immunity in gate applications. Figure 2. Typical Schmitt Trigger Applications http://onsemi.com 4

MC14093B 14 14 IOH Vout VGS IOL Vout 7 7 All unused inputs All unused inputs connected to ground. VGS connected to ground. 0 10 c a b c 15 Vdc b Adc) -(cid:2)2.0 VGS = -(cid:2)5.0 Vdc a Adc) 8.0 ba VGS = 10 Vdc URRENT (m -(cid:2)4.0 bab(cid:3)(cid:3)(cid:3)TTTAAA === -++(cid:2)(cid:2)(cid:2)512525°5°CC°C URRENT (m 6.0 c a(cid:3)TA = -(cid:2)55°C AIN C -(cid:2)6.0 c AIN C 4.0 bc(cid:3)(cid:3)TTAA == ++(cid:2)(cid:2)12255°C°C R R D D , H -(cid:2)10 Vdc b c b -(cid:2)15 Vdc , L a O-(cid:2)8.0 O 2.0 I I b 5.0 Vdc c a a -(cid:2)10 0 -(cid:2)10 -(cid:2)8.0 -(cid:2)6.0 -(cid:2)4.0 -(cid:2)2.0 0 0 2.0 4.0 6.0 8.0 10 VDS, DRAIN VOLTAGE (Vdc) VDS, DRAIN VOLTAGE (Vdc) Figure 3. Typical Output Source Figure 4. Typical Output Sink Characteristics Test Circuit Characteristics Test Circuit VDD c) d V E ( G A T L O V T U P T U O , ut o V 0 0 VT- VT+ VDD VH Vin, INPUT VOLTAGE (Vdc) Figure 5. Typical Transfer Characteristics http://onsemi.com 5

MC14093B PACKAGE DIMENSIONS SOIC−14 NB CASE 751A−03 ISSUE K D A NOTES: B 1.DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2.CONTROLLING DIMENSION: MILLIMETERS. 14 8 3.DIMENSION b DOES NOT INCLUDE DAMBAR A3 PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF AT MAXIMUM MATERIAL CONDITION. H E 4.DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSIONS. L 5.MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 1 7 DETAIL A MILLIMETERS INCHES 0.25 M B M 13Xb DIM MIN MAX MIN MAX A 1.35 1.75 0.054 0.068 0.25 M C A S B S A1 0.10 0.25 0.004 0.010 A3 0.19 0.25 0.008 0.010 DETAIL A b 0.35 0.49 0.014 0.019 h A D 8.55 8.75 0.337 0.344 X 45(cid:2) E 3.80 4.00 0.150 0.157 e 1.27 BSC 0.050 BSC H 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.019 e A1 C SEATING M ML 0.04 0(cid:2) 1.72 5(cid:2) 0.001 6(cid:2) 0.074 9(cid:2) PLANE SOLDERING FOOTPRINT* 6.50 14X 1.18 1 1.27 PITCH 14X 0.58 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 6

MC14093B PACKAGE DIMENSIONS TSSOP−14 CASE 948G ISSUE B 14X K REF NOTES: 1. DIMENSIONING AND TOLERANCING PER 0.10 (0.004) M T U S V S ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 0.15 (0.006) T U S 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. N MOLD FLASH OR GATE BURRS SHALL NOT 0.25 (0.010) EXCEED 0.15 (0.006) PER SIDE. 2XL/2 14 8 4I.NTDEIMRLEENASDIO FNL ABS DHO OERS PNROOT TINRCULSUIODNE. M INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. L B 5. DIMENSION K DOES NOT INCLUDE −U− N DAMBAR PROTRUSION. ALLOWABLE PIN 1 DAMBAR PROTRUSION SHALL BE 0.08 IDENT. F (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL 1 7 DETAIL E CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE 0.15 (0.006) T U S A K DETERMINED AT DATUM PLANE −W−. −V− K1 MILLIMETERS INCHES ÇÉÇÉÇÉ DIM MIN MAX MIN MAX A 4.90 5.10 0.193 0.200 J J1 ÇÉÇÉÇÉ B 4.30 4.50 0.169 0.177 C −−− 1.20 −−− 0.047 D 0.05 0.15 0.002 0.006 SECTION N−N F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC H 0.50 0.60 0.020 0.024 −W− J 0.09 0.20 0.004 0.008 C J1 0.09 0.16 0.004 0.006 K 0.19 0.30 0.007 0.012 0.10 (0.004) K1 0.19 0.25 0.007 0.010 L 6.40 BSC 0.252 BSC −T− SEATING D G H DETAIL E M 0 (cid:2) 8 (cid:2) 0 (cid:2) 8 (cid:2) PLANE SOLDERING FOOTPRINT* 7.06 1 0.65 PITCH 14X 14X 0.36 1.26 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 7

MC14093B PACKAGE DIMENSIONS SOEIAJ−14 CASE 965 ISSUE B NOTES: (cid:4)(cid:3)1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. (cid:4)(cid:3)2. CONTROLLING DIMENSION: MILLIMETER. (cid:4)(cid:3)3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE 14 8 LE MEASURED AT THE PARTING LINE. MOLD FLASH Q1 O(0R.0 0P6R) OPTERRU SSIIDOEN.S SHALL NOT EXCEED 0.15 (cid:4)(cid:3)4. TERMINAL NUMBERS ARE SHOWN FOR E HE M(cid:2) REFERENCE ONLY. (cid:4)(cid:3)5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) 1 7 L TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DETAIL P DAMBAR CANNOT BE LOCATED ON THE LOWER Z RADIUS OR THE FOOT. MINIMUM SPACE D BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). VIEW P MILLIMETERS INCHES e A DIM MIN MAX MIN MAX c A --- 2.05 --- 0.081 A1 0.05 0.20 0.002 0.008 b 0.35 0.50 0.014 0.020 c 0.10 0.20 0.004 0.008 D 9.90 10.50 0.390 0.413 b A1 E 5.10 5.45 0.201 0.215 e 1.27 BSC 0.050 BSC 0.13 (0.005) M 0.10 (0.004) HE 7.40 8.20 0.291 0.323 L 0.50 0.85 0.020 0.033 LE 1.10 1.50 0.043 0.059 M 0 (cid:2) 10 (cid:2) 0 (cid:2) 10 (cid:2) Q1 0.70 0.90 0.028 0.035 Z --- 1.42 --- 0.056 ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free ON Semiconductor Website: www.onsemi.com Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 5163, Denver, Colorado 80217 USA Europe, Middle East and Africa Technical Support: Order Literature: http://www.onsemi.com/orderlit Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Phone: 421 33 790 2910 Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Japan Customer Focus Center For additional information, please contact your local Email: orderlit@onsemi.com Phone: 81−3−5817−1050 Sales Representative http://onsemi.com MC14093B/D 8

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: O N Semiconductor: MC14093BDG MC14093BDR2G MC14093BDTR2G NLV14093BDG