Click here for production status of specific part numbers. MAX6316–MAX6322 5-Pin μP Supervisory Circuits with Watchdog and Manual Reset General Description Benefits and Features The MAX6316–MAX6322 family of microprocessor (μP) ● Integrated Configuration Enables Flexible Designs supervisory circuits monitors power supplies and micro- • Available in 26 Reset-Threshold Voltages processor activity in digital systems. It offers several com- - 2.5V to 5V, in 100mV Increments binations of push/pull, open-drain, and bidirectional (such • Four Reset Timeout Periods as Motorola 68HC11) reset outputs, along with watchdog - 1ms, 20ms, 140ms, or 1.12s (min) and manual reset features. The Selector Guide below lists • Four Watchdog Timeout Periods the specific functions available from each device. - 6.3ms, 102ms, 1.6s, or 25.6s (typ) • Four Reset Output Stages These devices are available in 26 factory-trimmed reset - Active-High, Push/Pull threshold voltages (from 2.5V to 5V, in 100mV increments), - Active-Low, Push/Pull featuring four minimum power-on reset timeout periods - Active-Low, Open-Drain (from 1ms to 1.12s), and four watchdog timeout periods - Active-Low, Bidirectional (from 6.3ms to 25.6s). Thirteen standard versions are ● Integrated Features Increase Robustness available with an order increment requirement of 2500 • Guaranteed Reset Valid to VCC = 1V pieces (see Standard Versions table); contact the factory • Immune to Short-Negative VCC Transients for availability of other versions, which have an order ● Saves Board Space increment requirement of 10,000 pieces. • No External Components The MAX6316–MAX6322 are offered in a miniature 5-pin • Small 5-Pin SOT23 Package SOT23 package. • AEC-Q100 Qualified Applications ● Portable Computers Typical Operating Circuit and Pin Configurations appears at end of data sheet. ● Computers ● Controllers ● Intelligent Instruments Ordering Information appears at end of data sheet. ● Portable/Battery-Powered Equipment ● Embedded Control Systems Selector Guide MANUAL RESET OUTPUTS* WATCHDOG PART INPUT RESET ACTIVE-LOW ACTIVE-HIGH ACTIVE-LOW ACTIVE-LOW INPUT PUSH/PULL PUSH/PULL BIDIRECTIONAL OPEN-DRAIN MAX6316L ✔ ✔ ✔ — — — MAX6316M ✔ ✔ — — ✔ — MAX6317H ✔ ✔ — ✔ — — MAX6318LH ✔ — ✔ ✔ — — MAX6318MH ✔ — — ✔ ✔ — MAX6319LH — ✔ ✔ ✔ — — MAX6319MH — ✔ — ✔ ✔ — MAX6320P ✔ ✔ — — — ✔ MAX6321HP ✔ — — ✔ — ✔ MAX6322HP — ✔ — ✔ — ✔ *The MAX6318/MAX6319/MAX6321/MAX6322 feature two types of reset output on each device. 19-0496; Rev 14; 11/18

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with Watchdog and Manual Reset Absolute Maximum Ratings Voltage (with respect to GND) Operating Temperature Range .........................-40°C to +125°C VCC ......................................................................-0.3V to +6V Junction Temperature ......................................................+150°C RESET (MAX6320/MAX6321/MAX6322 only) ....-0.3V to +6V Storage Temperature Range ............................-65°C to +160°C All Other Pins........................................-0.3V to (VCC + 0.3V) Lead Temperature (soldering, 10s) .................................+300°C Input/Output Current, All Pins .............................................20mA Soldering Temperature (reflow) Continuous Power Dissipation (TA = +70°C) Leaded Package ..........................................................+240°C SOT23 (derate 3.9mW/°C above +70°C) .................312.6mW Lead-Free Package .....................................................+260°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Package Information SOT23-5 PACKAGE CODE U5+2/U5+2A Outline Number 21-0057 Land Pattern Number 90-0174 Thermal Resistance, Single-Layer Board: Junction to Ambient (θJA) 324.3°C/W Junction to Case (θJC) 82°C/W Thermal Resistance, Multi-Layer Board: Junction to Ambient (θJA) 255.9°C/W Junction to Case (θJC) 81°C/W For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. www.maximintegrated.com Maxim Integrated │ 2

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with Watchdog and Manual Reset Electrical Characteristics (VCC = 2.5V to 5.5V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Operating Voltage Range VCC TA = -40°C to +125°C 1.0 5.5 V MAX6316/MAX6317/MAX VCC = 5.5V 10 20 6318/MAX6320/MAX6321 VCC = 3.6V 5 12 Supply Current ICC µA MAX6319/MAX6322: VCC = 5.5V 3 12 MR unconnected VCC = 3.6V 3 8 Reset Threshold Temperature Coefficient DVTH/°C 40 ppm/°C TA = +25°C VTH - 1.5% VTH VTH + 1.5% Reset Threshold (Note 2) VRST V TA = -40°C to +125°C VTH - 2.5% VTH VTH + 2.5% Reset Threshold Hysteresis 3 mV MAX63__A_-T 1 1.4 2 MAX63__B_-T 20 28 40 Reset Active Timeout Period tRP ms MAX63__C_-T 140 200 280 MAX63__D_-T 1120 1600 2240 VCC to RESET Delay tRD VCC falling at 1mV/µs 40 µs PUSH/PULL RESET OUTPUT (MAX6316L/MAX6317H/MAX6318_H/MAX6319_H/MAX6321HP/MAX6322HP) VCC ≥ 1.0V, ISINK = 50µA 0.3 VCC ≥ 1.2V, ISINK = 100µA 0.3 VOL VCC ≥ 2.7V, ISINK = 1.2mA 0.3 RESET Output Voltage V VCC ≥ 4.5V, ISINK = 3.2mA 0.4 VCC ≥ 2.7V, ISOURCE = 500µA 0.8 x VCC VOH VCC ≥ 4.5V, ISOURCE = 800µA VCC - 1.5 RESET Rise Time (MAX6316L, Rise time is measured from 10% to 90% MAX6318LH, MAX6319LH) tR of VCC; CL = 5pF, VCC = 3.3V (Note 3) 5 25 ns VCC ≥ 2.7V, ISINK = 1.2mA 0.3 VOL VCC ≥ 4.5V, ISINK = 3.2mA 0.4 RESET Output Voltage VCC ≥ 1.8V, ISOURCE = 150µA 0.8 x VCC V VOH VCC ≥ 2.7V, ISOURCE = 500µA 0.8 x VCC VCC ≥ 4.5V, ISOURCE = 800µA VCC - 1.5 Note 1: Overtemperature limits are guaranteed by design, not production tested. Note 2: A factory-trimmed voltage divider programs the nominal reset threshold (VTH). Factory-trimmed reset thresholds are avail- able in 100mV increments from 2.5V to 5V (see Table 1 at end of data sheet). Note 3: Guaranteed by design. www.maximintegrated.com Maxim Integrated │ 3

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with Watchdog and Manual Reset Electrical Characteristics (continued) (VCC = 2.5V to 5.5V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS BIDIRECTIONAL RESET OUTPUT (MAX6316M/MAX6318MH/MAX6319MH) Transitional Flip-Flop Setup Time tS (Note 4) 400 ns VCC = 3.0V, CL = 120pF 333 RESET Output Rise Time VCC = 5.0V, CL = 200pF 333 (Note 5) tR VCC = 3.0V, CL = 250pF 666 ns VCC = 5.0V, CL = 400pF 666 Active Pullup Enable Threshold VPTH VCC = 5.0V 0.4 0.65 V RESET Active Pullup Current VCC = 5.0V 20 mA TA = -40°C to +85°C 4.2 4.7 5.2 RESET Pullup Resistance kΩ TA = -40°C to +125°C 3.6 4.7 5.8 OPEN-DRAIN RESET OUTPUT (MAX6320P/MAX6321HP/MAX6322HP) VCC > 1.0V, ISINK = 50µA 0.3 VCC > 1.2V, ISINK = 100µA 0.3 RESET Output Voltage VOL V VCC > 2.7V, ISINK = 1.2mA 0.3 VCC > 4.5V, ISINK = 3.2mA 0.4 Open-Drain Reset Output Leakage Current ILKG 1.0 µA WATCHDOG INPUT (MAX6316/MAX6317H/MAX6318_H/MAX6320P/MAX6321HP) MAX63_ _ _W-T 4.3 6.3 9.3 ms MAX63_ _ _X-T 71 102 153 Watchdog Timeout Period tWD MAX63_ _ _Y-T 1.12 1.6 2.4 s MAX63_ _ _Z-T 17.9 25.6 38.4 WDI Pulse Width tWDI VIL = 0.3 x VCC, VIH = 0.7 x VCC 50 ns VIL 0.3 x VCC WDI Input Threshold (Note 6) V VIH 0.7 x VCC WDI Input Current WDI = VCC, time average 120 160 (Note 7) IWDI VWDI = 0V, time average -20 -15 µA MANUAL RESET INPUT (MAX6316_/MAX6317H/MAX6319_H/MAX6320P/MAX6322HP) VIL 0.8 VTH > 4.0V VIH 2.0 MR Input Threshold V VIL 0.3 x VCC VTH < 4.0V VIH 0.7 x VCC TA = -40°C to +85°C 1 MR Input Pulse Width µs TA = -40°C to +125°C 1.5 MR Glitch Rejection 100 ns MR Pullup Resistance 35 52 75 kΩ MR to Reset Delay VCC = 5V 230 ns Note 4: This is the minimum time RESET must be held low by an external pulldown source to set the active pullup flip-flop. Note 5: Measured from RESET VOL to (0.8 x VCC), RLOAD = ∞. Note 6: WDI is internally serviced within the watchdog period if WDI is left unconnected. Note 7: The WDI input current is specified as the average input current when the WDI input is driven high or low. The WDI input is designed for a three-stated-output device with a 10μA maximum leakage current and capable of driving a maximum capaci- tive load of 200pF. The three-state device must be able to source and sink at least 200μA when active. www.maximintegrated.com Maxim Integrated │ 4

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with Watchdog and Manual Reset Typical Operating Characteristics TA = +25°C, unless otherwise noted.) MAX6316/MAX6317/MAX6319/MAX6320/MAX6322 MAX6316/MAX6317/MAX6318/MAX6320/MAX6321 VCC FALLING TO RESET PROPAGATION MANUAL RESET TO RESET SUPPLY CURRENT vs. TEMPERATURE DELAY vs. TEMPERATURE PROPAGATION DELAY vs. TEMPERATURE SUPPLY CURRENT (µA) 143876509 VVCCCC == 53VV MAX6316toc01 T PROPAGATION DELAY (µs) 13549876000000000 VVCRCST F -A VLCLCIN =G 1 A0T0 m1mVV/µs MAX6316toc02 OPAGATION DELAY (ns)222322342008620000000 VCC = 5V MAX6316toc03 2 ESE 20 PR180 VCC = 1V R 1 10 160 0 0 140 -40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) MAX6316/MAX6317/MAX6318/MAX6320/MAX6321 NORMALIZED RESET TIMEOUT NORMALIZED WATCHDOG TIMEOUT PERIOD vs. TEMPERATURE PERIOD vs. TEMPERATURE PERIOD 111...000435 MAX6316toc04 UT PERIOD 111...000435 MAX6316toc05 T O OU 1.02 ME 1.02 D RESET TIME 101...090091 WATCHDOG TI 101...090091 NORMALIZE 000...999876 ORMALIZED 000...999876 N 0.95 0.95 -40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100 TEMPERATURE (°C) TEMPERATURE (°C) MAX6316M/6318MH/6319MH MAXIMUM VCC TRANSIENT DURATION BIDIRECTIONAL vs. RESET THRESHOLD OVERDRIVE PULLUP CHARACTERISTICS N (µs) 678000 RESEVTR OSTC C= U3.R3SV ABOVE LINES MAX6316toc06 IN7P4UHTC05+51V040.p7FkΩ MAX6316toc07 P4P2.VAU7/SLkdΩLSivUI VPE O ATI 50 VRST = 4.63V RESET, ACTIVE UR PULLUP NSIENT D 4300 VRST = 2.63V INPUT 741H00Cp0F5 RESEVTCC+5V 2V/div RA 20 RESET T MRGND INPUT 10 5V/div 0 10 100 1000 200ns/div RESET THRESHOLD OVERDRIVE (mV) VRST - VCC www.maximintegrated.com Maxim Integrated │ 5

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with Watchdog and Manual Reset Pin Description PIN MAX6316L MAX6318LH MAX6319LH NAME FUNCTION MAX6316M MAX6317H MAX6318MH MAX6319MH MAX6320P MAX6321HP MAX6322HP MAX6316L/MAX6318LH/MAX6319LH: Active- Low, Reset Output. CMOS push/pull output (sources and sinks current). MAX6316M/MAX6318MH/MAX6319MH: Bidirectional, Active-Low, Reset Output. Intended to interface directly to microprocessors 1 — 1 1 RESET with bidirectional resets such as the Motorola 68HC11. MAX6320P/MAX6321HP/MAX6322HP: Open-Drain, Active-Low, Reset Output. NMOS out- put (sinks current only). Connect a pullup resistor from RESET to any supply voltage up to 6V. Active-High, Reset Output. CMOS push/pull output — 1 3 3 RESET (sources and sinks current). Inverse of RESET. 2 2 2 2 GND Ground Active-Low, Manual Reset Input. Pull low to force a reset. Reset remains asserted for the duration 3 3 — 4 MR of the Reset Timeout Period after MR transitions from low to high. Leave unconnected or connected to VCC if not used. Watchdog Input. Triggers a reset if it remains either high or low for the duration of the watchdog timeout period. The internal watchdog timer clears 4 4 4 — WDI whenever a reset asserts or whenever WDI sees a rising or falling edge. To disable the watchdog fea- ture, leave WDI unconnected or three-state the dri- ver connected to WDI. Supply Voltage. Reset is asserted when VCC drops below the Reset Threshold Voltage (VRST). 5 5 5 5 VCC Reset remains asserted until VCC rises above VRST and for the duration of the Reset Timeout Period (tRP) once VCC rises above VRST. www.maximintegrated.com Maxim Integrated │ 6

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with Watchdog and Manual Reset VCC MAX6316–MAX6322 RESET (ALL EXCEPT MAX6317) RESET GENERATOR RESET (ALL EXCEPT VCC MAX6316/MAX6320P) 1.23V 52kΩ MR (ALL EXCEPT MAX6318/MAX6321) WATCHDOG WATCHDOG WDI TRANSITION TIMER (ALL EXCEPT DETECTOR MAX6319/MAX6322) 52kΩ GND Figure 1. Functional Diagram Detailed Description within the watchdog timeout period (tWD). Reset remains A microprocessor’s (μP) reset input starts or restarts the asserted for the specified reset active timeout period (tRP) μP in a known state. The reset output of the MAX6316– after VCC rises above the reset threshold, after MR transi- tions low to high, or after the watchdog timer asserts the MAX6322 μP supervisory circuits interfaces with the reset (MAX6316_/MAX6317H/MAX6318_H/MAX6320P/ reset input of the μP, preventing code-execution errors during power-up, power-down, and brownout condi- MAX6321HP). After the reset active timeout period (tRP) expires, the reset output deasserts, and the watchdog tions (see the Typical Operating Circuit). The MAX6316/ timer restarts from zero (Figure 2). MAX6317/MAX6318/MAX6320/MAX6321 are also capa- ble of asserting a reset should the μP become stuck in an infinite loop. VCC Reset Output 1V VRST VRST 1V The MAX6316L/MAX6318LH/MAX6319LH fea- GND ture an active-low reset output, while the MAX6317H RESET tRP tRD MAX6318_H/MAX6319_H/MAX6321HP/MAX6322HP feature an active-high reset output. RESET is guaranteed to be a logic low and RESET is guaranteed to be a logic high for VCC down to 1V. RESET tRP tRD GND The MAX6316–MAX6322 assert reset when VCC is below the reset threshold (VRST), when MR is pulled low (MAX6316_/MAX6317H/MAX6319_H/MAX6320P/ Figure 2. Reset Timing Diagram MAX6322HP only), or if the WDI pin is not serviced www.maximintegrated.com Maxim Integrated │ 7

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with Watchdog and Manual Reset Bidirectional RESET Output is erased and processing begins from scratch. If, on the other hand, RESET is high after a delay of two external- The MAX6316M/MAX6318MH/MAX6319MH are clock cycles, the processor knows that it caused the reset designed to interface with μPs that have bidirectional itself and can jump to a different vector and use stored- reset pins, such as the Motorola 68HC11. Like an open- state information to determine what caused the reset. drain output, these devices allow the μP or other devices to pull the bidirectional reset (RESET) low and assert a A problem occurs with faster μPs; two external-clock reset condition. However, unlike a standard open-drain cycles are only 500ns at 4MHz. When there are several output, it includes the commonly specified 4.7kΩ pullup devices on the reset line, and only a passive pullup resis- resistor with a P-channel active pullup in parallel. tor is used, the input capacitance and stray capacitance can prevent RESET from reaching the logic high state This configuration allows the MAX6316M/MAX6318MH/ MAX6319MH to solve a problem associated with μPs that (0.85 x VCC) in the time allowed. If this happens, all resets will be interpreted as external. The μP output stage is have bidirectional reset pins in systems where several guaranteed to sink 1.6mA, so the rise time can not be devices connect to RESET (Figure 3). These μPs can reduced considerably by decreasing the 4.7kΩ internal often determine if a reset was asserted by an external pullup resistance. See Bidirectional Pullup Characteristics device (i.e., the supervisor IC) or by the μP itself (due to in the Typical Operating Characteristics. a watchdog fault, clock error, or other source), and then jump to a vector appropriate for the source of the reset. The MAX6316M/MAX6318MH/MAX6319MH overcome However, if the μP does assert reset, it does not retain the this problem with an active pullup FET in parallel with the information, but must determine the cause after the reset 4.7kΩ resistor (Figures 4 and 5). The pullup transistor has occurred. holds RESET high until the μP reset I/O or the supervi- sory circuit itself forces the line low. Once RESET goes The following procedure describes how this is done in the Motorola 68HC11. In all cases of reset, the μP pulls below VPTH, a comparator sets the transition edge flip- flop, indicating that the next transition for RESET will be RESET low for about four external-clock cycles. It then low to high. When RESET is released, the 4.7kΩ resistor releases RESET, waits for two external-clock cycles, then checks RESET’s state. If RESET is still low, the μP con- pulls RESET up toward VCC. Once RESET rises above cludes that the source of the reset was external and, when VPTH but is below (0.85 x VCC), the active P-channel RESET eventually reaches the high state, it jumps to the pullup turns on. Once RESET rises above (0.85 x VCC) or the 2μs one-shot times out, the active pullup turns normal reset vector. In this case, stored-state information off. The parallel combination of the 4.7kΩ pullup and the VCC VCC WDI* 4.7kΩ 68HC11 MR** RESET RESET RESET CIRCUITRY RESET RESET*** CIRCUITRY CIN CIN CSTRAY MAX6316M MAX6318MH MAX6319MH RESET *MAX6316M/MAX6318MH CIN OTHER DEVICES **MAX6316M/MAX6319MH ***ACTIVE-HIGH PUSH/PULL MAX6318MH/MAX6319MH Figure 3. MAX6316M/MAX6318MH/MAX6319MH Supports Additional Devices on the Reset Bus www.maximintegrated.com Maxim Integrated │ 8

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with Watchdog and Manual Reset VCC MAX6316M MAX6318MH LASER- MAX6319MH TRIMMED RESISTORS VCC VREF 52kΩ RESET MR (MAX6316M/ GENERATOR MAX6319MH) WATCHDOG ON (MAX6316M/ 2s ONCEIR SCHUOITTRY WDI MAX6318MH) VCC 2µs ONE SHOT TRANSITION FLIP-FLOP R Q 4.7kΩ FF S RESET ACTIVE PULLUP ENABLE COMPARATOR 0.65V 0.85VCC GND Figure 4. MAX6316/MAX6318MH/MAX6319MH Bidirectional Reset Output Functional Diagram www.maximintegrated.com Maxim Integrated │ 9

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with Watchdog and Manual Reset P-channel transistor on-resistance quickly charges stray ter a logic low (see Electrical Characteristics), and small capacitance on the reset line, allowing RESET to transi- enough to register a logic high while supplying all input tion from low to high within the required two electronic- current and leakage paths connected to the RESET line. clock cycles, even with several devices on the reset line. A 10kΩ pullup is sufficient in most applications. This process occurs regardless of whether the reset was Manual-Reset Input caused by VCC dipping below the reset threshold, the watchdog timing out, MR being asserted, or the μP or The MAX6316_/MAX6317H/MAX6319_H/MAX6320P/ other device asserting RESET. The parts do not require MAX6322HP feature a manual reset input. A logic low on an external pullup. To minimize supply current con- MR asserts a reset. After MR transitions low to high, reset sumption, the internal 4.7kΩ pullup resistor disconnects remains asserted for the duration of the reset timeout from the supply whenever the MAX6316M/MAX6318MH/ period (tRP). The MR input is connected to VCC through MAX6319MH assert reset. an internal 52kΩ pullup resistor and therefore can be left unconnected when not in use. MR can be driven with Open-Drain RESET Output TTL-logic levels in 5V systems, with CMOS-logic levels in The MAX6320P/MAX6321HP/MAX6322HP have an 3V systems, or with open-drain or open-collector output active-low, open-drain reset output. This output structure devices. A normally-open momentary switch from MR to will sink current when RESET is asserted. Connect a pul- ground can also be used; it requires no external debounc- lup resistor from RESET to any supply voltage up to 6V ing circuitry. MR is designed to reject fast, negative-going (Figure 6). Select a resistor value large enough to regis- transients (typically 100ns pulses). A 0.1μF capacitor from MR to ground provides additional noise immunity. The MR input pin is equipped with internal ESD-protection VCC circuitry that may become forward biased. Should MR RESET tRP 0.8 x VCC be driven by voltages higher than VCC, excessive cur- OR rent would be drawn, which would damage the part. For µC RESET DELAY 0.7V example, assume that MR is driven by a +5V supply other tS tR tmhaaxni mVuCmC. rIaf tVinCgC i sd rvoioplsa tleodw e[-r0 t.h3aVn to+ 4(.V7CV,C M +R 0’s.3 aVb)s],o alunted undesirable current flows through the ESD structure from RESET PULLED LOW ACTIVE BY µC OR PULLUP MR to VCC. To avoid this, use the same supply for MR as RESET GENERATOR TURNS ON the supply monitored by VCC. This guarantees that the voltage at MR will never exceed VCC. Figure 5. Bidirectional RESET Timing Diagram Watchdog Input The MAX6316_/MAX6317H/MAX6318_H/MAX6320P/ MAX6321HP feature a watchdog circuit that monitors the +3.3V +5.0V μP’s activity. If the μP does not toggle the watchdog input (WDI) within the watchdog timeout period (tWD), reset asserts. The internal watchdog timer is cleared by reset VCC MR* 10kΩ or by a transition at WDI (which can detect pulses as WDI** RESET short as 50ns). The watchdog timer remains cleared while reset is asserted. Once reset is released, the timer begins RESET*** 5V SYSTEM counting again (Figure 7). The WDI input is designed for a three-stated output MAX6320 device with a 10μA maximum leakage current and the MAX6321 capability of driving a maximum capacitive load of 200pF. MAX6322 The three-state device must be able to source and sink at GND *MAX6320/MAX6322 **MAX6320/MAX6321 least 200μA when active. Disable the watchdog function ***MAX6321/MAX6322 by leaving WDI unconnected or by three-stating the driver connected to WDI. When the watchdog timer is left open Figure 6. MAX6320P/MAX6321HP/MAX6322HP Open-Drain circuited, the timer is cleared internally at intervals equal RESET Output Allows Use with Multiple Supplies to 7/8 of the watchdog period. www.maximintegrated.com Maxim Integrated │ 10

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with Watchdog and Manual Reset VCC tRST MAX6316 VCC RESET MAX6318 tRP tWD tRP MAX6319 VCC WDI GND RESET MAX6316/MAX6317 100kΩ MAX6318/MAX6320 MAX6321 Figure 7. Watchdog Timing Relationship Figure 8. Ensuring RESET Valid to VCC = 0V on Active-Low Push/Pull and Bidirectional Outputs Applications Information Watchdog Input Current MAX6317 The WDI input is internally driven through a buffer and MAX6318 VCC series resistor from the watchdog counter. For minimum MAX6319 watchdog input current (minimum overall power con- MAX6321* sumption), leave WDI low for the majority of the watchdog MAX6322* 100kΩ timeout period. When high, WDI can draw as much as VCC 160μA. Pulsing WDI high at a low duty cycle will reduce GND RESET the effect of the large input current. When WDI is left unconnected, the watchdog timer is serviced within the watchdog timeout period by a low-high-low pulse from the *THIS SCHEMATIC DOES NOT WORK ON THE OPEN-DRAIN counter chain. OUTPUTS OF THE MAX6321/MAX6322. Negative-Going VCC Transients These supervisors are immune to short-duration, negative- Figure 9. Ensuring RESET Valid to VCC = 0V on Active-High Push/Pull Outputs going VCC transients (glitches), which usually do not require the entire system to shut down. Typically, 200ns large- scheme does not work with the open-drain outputs of the amplitude pulses (from ground to VCC) on the supply will MAX6320/MAX6321/MAX6322. The resistor value used not cause a reset. Lower amplitude pulses result in greater is not critical, but it must be large enough not to load the immunity. Typically, a VCC transient that goes 100mV under the reset threshold and lasts less than 4μs will not trigger a reset output when VCC is above the reset threshold. For most applications, 100kΩ is adequate. reset. An optional 0.1μF bypass capacitor mounted close to VCC provides additional transient immunity. Watchdog Software Considerations (MAX6316/MAX6317/MAX6318/ Ensuring Valid Reset Outputs MAX6320/MAX6321) Down to VCC = 0V One way to help the watchdog timer monitor software The MAX6316_/MAX6317H/MAX6318_H/MAX6319_H/ execution more closely is to set and reset the watchdog MAX6321HP/MAX6322HP are guaranteed to operate input at different points in the program, rather than puls- properly down to VCC = 1V. In applications that require ing the watchdog input high-low-high or low-high-low. This valid reset levels down to VCC = 0V, a pulldown resistor to technique avoids a stuck loop, in which the watchdog active-low outputs (push/pull and bidirectional only, Figure timer would continue to be reset inside the loop, keeping 8) and a pullup resistor to active-high outputs (push/pull the watchdog from timing out. only, Figure 9) will ensure that the reset line is valid while the reset output can no longer sink or source current. This www.maximintegrated.com Maxim Integrated │ 11

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with Watchdog and Manual Reset Figure 10 shows an example of a flow diagram where the I/O driving the watchdog input is set high at the beginning START of the program, set low at the end of every subroutine or loop, then set high again when the program returns to the beginning. If the program should hang in any subroutine, SET WDI the problem would be quickly corrected, since the I/O is HIGH continually set low and the watchdog timer is allowed to time out, causing a reset or interrupt to be issued. As PROGRAM CODE described in the Watchdog Input Current section, this scheme results in higher time average WDI current than does leaving WDI low for the majority of the timeout POSSIBLE INFINITE LOOP PATH period and periodically pulsing it low-high-low. SUBROUTINE OR PROGRAM LOOP SET WDI LOW RETURN Figure 10. Watchdog Flow Diagram Pin Configurations Typical Operating Circuit TOP VIEW VIN RESET 1 5 VCC RESET 1 5 VCC VCC VCC RESET RESET MAX6316 MAX6317 GND 2 MAX6320 GND 2 MAX6316 µP MR WDI I/O MR 3 4 WDI MR 3 4 WDI MANUAL GND GND RESET SOT23 SOT23 RESET 1 5 VCC RESET 1 5 VCC MAX6318 MAX6319 GND 2 MAX6321 GND 2 MAX6322 RESET 3 4 WDI RESET 3 4 MR SOT23 SOT23 www.maximintegrated.com Maxim Integrated │ 12

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with Watchdog and Manual Reset Table 1. Factory-Trimmed Reset Thresholds TA = +25°C TA = -40°C to +125°C PART MIN TYP MAX MIN MAX MAX63___50_ _-T 4.925 5.000 5.075 4.875 5.125 MAX63___49_ _-T 7.827 4.900 4.974 4.778 5.023 MAX63___48_ _-T 4.728 4.800 4.872 4.680 4.920 MAX63___47_ _-T 4.630 4.700 4.771 4.583 4.818 MAX63___46_ _-T 4.561 4.630 4.699 4.514 4.746 MAX63___45_ _-T 4.433 4.500 4.568 4.388 4.613 MAX63___44_ _-T 4.314 4.390 4.446 4.270 4.490 MAX63___43_ _-T 4.236 4.300 4.365 4.193 4.408 MAX63___42_ _-T 4.137 4.200 4.263 4.095 4.305 MAX63___41_ _-T 4.039 4.100 4.162 3.998 4.203 MAX63___40_ _-T 3.940 4.000 4.060 3.900 4.100 MAX63___39_ _-T 3.842 3.900 3.959 3.803 3.998 MAX63___38_ _-T 3.743 3.800 3.857 3.705 3.895 MAX63___37_ _-T 3.645 3.700 3.756 3.608 3.793 MAX63___36_ _-T 3.546 3.600 3.654 3.510 3.690 MAX63___35_ _-T 3.448 3.500 3.553 3.413 3.588 MAX63___34_ _-T 3.349 3.400 3.451 3.315 3.485 MAX63___33_ _-T 3.251 3.300 3.350 3.218 3.383 MAX63___32_ _-T 3.152 3.200 3.248 3.120 3.280 MAX63___31_ _-T 3.034 3.080 3.126 3.003 3.157 MAX63___30_ _-T 2.955 3.000 3.045 2.925 3.075 MAX63___29_ _-T 2.886 2.930 2.974 2.857 3.000 MAX63___28_ _-T 2.758 2.800 2.842 2.730 2.870 MAX63___27_ _-T 2.660 2.700 2.741 2.633 2.768 MAX63___26_ _-T 2.591 2.630 2.669 2.564 2.696 MAX63___25_ _-T 2.463 2.500 2.538 2.438 2.563 Table 2. Standard Versions MINIMUM TYPICAL SOT RESET PART RESET WATCHDOG TOP THRESHOLD (V) TIMEOUT (ms) TIMEOUTS (s) MARK MAX6316LUK29CY-T 2.93 140 1.6 ACDE MAX6316LUK46CY-T 4.63 140 1.6 ACDD MAX6316MUK29CY-T 2.93 140 1.6 ACDG MAX6316MUK46CY-T 4.63 140 1.6 ACDF MAX6317HUK46CY-T 4.63 140 1.6 ACDQ MAX6318LHUK46CY-T 4.63 140 1.6 ACDH MAX6318MHUK46CY-T 4.63 140 1.6 ACDJ MAX6319LHUK46C-T 4.63 140 — ACDK MAX6319MHUK46C-T 4.63 140 — ACDM www.maximintegrated.com Maxim Integrated │ 13

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with Watchdog and Manual Reset Table 2. Standard Versions (continued) MINIMUM TYPICAL SOT RESET PART RESET WATCHDOG TOP THRESHOLD (V) TIMEOUT (ms) TIMEOUTS (s) MARK MAX6320PUK29CY-T 2.93 140 1.6 ACDO MAX6320PUK46CY-T 4.63 140 1.6 ACDN MAX6321HPUK46CY-T 4.63 140 1.6 ACGL MAX6322HPUK46C-T 4.63 140 1.6 ACGN Note: Thirteen standard versions are available, with a required order increment of 2500 pieces. Sample stock is generally held on standard versions only. The required order increment for nonstandard versions is 10,000 pieces. Contact factory for availability. Table 3. Reset/Watchdog Timeout Periods Ordering Information RESET TIMEOUT PERIODS PART TEMP RANGE PIN-PACKAGE MAX6316LUK____-T -40°C to +125°C 5 SOT23 SUFFIX MIN TYP MAX UNITS MAX6316LUK____/V+T -40°C to +125°C 5 SOT23 A 1 1.6 2 MAX6316MUK____-T -40°C to +125°C 5 SOT23 B 20 30 40 ms MAX6317HUK____-T -40°C to +125°C 5 SOT23 C 140 200 280 MAX6318HUK____-T -40°C to +125°C 5 SOT23 D 1.12 1.60 2.24 s MAX6318MHUK____-T -40°C to +125°C 5 SOT23 WATCHDOG TIMEOUT MAX6319LHUK___-T -40°C to +125°C 5 SOT23 MAX6319MHUK___-T -40°C to +125°C 5 SOT23 W 4.3 6.3 9.3 ms MAX6320PUK____-T -40°C to +125°C 5 SOT23 X 71 102 153 MAX6320PUK____/V+T -40°C to +125°C 5 SOT23 Y 1.12 1.6 2.4 s MAX6321HPUK___-T -40°C to +125°C 5 SOT23 Z 17.9 25.6 38.4 MAX6322HPUK___-T -40°C to +125°C 5 SOT23 Devices are available in both leaded and lead(Pb)-free packaging. Specify lead-free by replacing “-T” with “+T” when ordering. Chip Information /V Denotes an automotive-qualified part. SUBSTRATE IS INTERNALLY CONNECTED TO V+ Note: These devices are available with factory-set VCC reset thresholds from 2.5V to 5V, in 0.1V increments. Insert the desired nominal reset threshold (25 to 50, from Table 1) into the blanks following the letters UK. All devices offer factory-pro- grammed reset timeout periods. Insert the letter corresponding to the desired reset timeout period (A, B, C, or D from Table 3) into the blank following the reset threshold suffix. Parts that offer a watchdog feature (see Selector Guide) are factory-trimmed to one of four watchdog timeout periods. Insert the letter corre- sponding to the desired watchdog timeout period (W, X, Y, or Z from Table 3) into the blank following the reset timeout suffix. www.maximintegrated.com Maxim Integrated │ 14

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with Watchdog and Manual Reset Revision History REVISION REVISION PAGES DESCRIPTION NUMBER DATE CHANGED 0 1/98 Initial release. — 1 4/98 Update to show MAX6319 as an existing part. 1, 2, 12 2 7/98 Update specifications, Selector Guide, and Table 2. 1, 12, 14 Include extended temperature range in EC table globals, Table 1, Ordering 3 1/99 1, 2, 3, 12, 13, 14 Information. 4 11/99 Update available products and versions in Table 2 and Ordering Information. 1, 12, 14 5 9/02 Addition of RESET rise time specification to Electrical Characteristics table. 1, 2 6 12/05 Add lead-free option to Ordering Information. 1, 13, 14 Add automotive temperature to Ordering Information, Electrical Characteristics 7 11/07 1, 2, 3, 12, 13, 14 table, Table 1, and updated Package Information. 8 8/09 Updated Ordering Information. 13 9 6/10 Added automotive part and soldering temperatures. 2, 13 10 10/11 Added automotive-qualified part ordering option for MAX6316 family 1 11 2/13 Changed /V-T suffix to /V+T in Ordering Information 1 12 4/15 Updated the General Description and Benefits and Features sections 1 13 5/17 Added AEC-Q100 qualification 1 13.1 Corrected typo 1 14 11/18 Updated Package Information 2 For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html. Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. © 2018 Maxim Integrated Products, Inc. │ 15

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