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  • 制造商: Texas Instruments
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LM49370RL/NOPB产品简介:

ICGOO电子元器件商城为您提供LM49370RL/NOPB由Texas Instruments设计生产,在icgoo商城现货销售,并且可以通过原厂、代理商等渠道进行代购。 LM49370RL/NOPB价格参考。Texas InstrumentsLM49370RL/NOPB封装/规格:线性 - 音頻放大器, Amplifier IC 1-Channel (Mono) with Mono and Stereo Headphones Class D 49-DSBGA。您可以下载LM49370RL/NOPB参考资料、Datasheet数据手册功能说明书,资料中有LM49370RL/NOPB 详细功能的应用电路图电压和使用方法及教程。

产品参数 图文手册 常见问题
参数 数值
产品目录

集成电路 (IC)半导体

描述

IC AUDIO SUBSYSTEM 1.2W 49DSBGA音频放大器 Boomer Aud Pwr Amp & Sub-Sys w/ an Ultra Low EMI Sprd Spectrum Class D Loudspkr Amp 49-DSBGA -40 to 85

产品分类

线性 - 音頻放大器

品牌

Texas Instruments

产品手册

http://www.ti.com/litv/snas356d

产品图片

rohs

符合RoHS无铅 / 符合限制有害物质指令(RoHS)规范要求

产品系列

音频 IC,音频放大器,Texas Instruments LM49370RL/NOPBBoomer®, PowerWise®

数据手册

点击此处下载产品Datasheet

产品型号

LM49370RL/NOPB

THD+噪声

0.04 %

不同负载时的最大输出功率x通道数

1.2W x 1 @ 8 欧姆; 52mW x 2 @ 16 欧姆

产品

Class-D

产品目录页面

点击此处下载产品Datasheet

产品种类

音频放大器

供应商器件封装

49-DSBGA

其它名称

*LM49370RL/NOPB
296-36645-1
LM49370RL/NOPBCT
LM49370RL/NOPBCT-ND
LM49370RLCT
LM49370RLCT-ND
LM49370RLNOPB

包装

剪切带 (CT)

双重电源电压

3 V, 5 V

商标

Texas Instruments

安装类型

表面贴装

安装风格

SMD/SMT

封装

Reel

封装/外壳

49-WFBGA

封装/箱体

DSBGA-49

工作温度

-40°C ~ 85°C (TA)

工作电源电压

1.8 V to 5.5 V

工厂包装数量

250

最大工作温度

+ 85 C

最小工作温度

- 40 C

标准包装

1

特性

3D,消除爆音,I²C,I²S,麦克风,静音,PCM,关闭,SPI,待机,音量控制

电压-电源

2.5 V ~ 5.5 V

电源电压-最大

5.5 V

电源电压-最小

1.8 V

电源电流

11.5 mA

电源类型

Quint

Class-D

类型

D 类

系列

LM49370

输入信号类型

Single

输出信号类型

Single

输出功率

1.2 W

输出类型

1-通道(单声道)带单声道和立体声耳机

配用

/product-detail/zh/LM49370RLEVAL/LM49370RLEVAL-ND/1640775

音频负载电阻

32 Ohms

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PDF Datasheet 数据手册内容提取

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 LM49370 Boomer® Audio Power Amplifier Series Audio Sub-System with an Ultra Low EMI, Spread Spectrum, Class D Loudspeaker Amplifier, a Dual-Mode Stereo Headphone Amplifier, and a Dedicated PCM Interface for Bluetooth Transceivers CheckforSamples:LM49370 FEATURES • 16StepVolumeControlforMicrophonein2 1 dBSteps • SpreadSpectrumClassDArchitecture 2 ReducesEMI • ProgrammableSidetoneAttenuationin3dB Steps • MonoClassD8Ω Amplifier,490mWat3.3V • TwoConfigurableGPIOPorts • OCLorAC-CoupledHeadphoneOperation • Multi-FunctionIRQOutput • 33mWStereoHeadphoneAmplifierat3.3V • Micro-PowerShutdownMode • 115mWEarpieceAmplifierat3.3V • Availableinthe4x4mm49BumpDSBGA • 18-bitStereoDAC Package • 16-bitMonoADC • KeySpecifications • 8kHzto192kHzStereoAudioPlayback – P (A_V =3.3V,32Ω,1%THD)33 • 8kHzto48kHzMonoRecording HP(AC-COUP) DD mW • BidirectionalI2SCompatibleAudioInterface – P (A_V =3.3V,32Ω,1%THD)31 HP(OCL) DD • BidirectionalPCMCompatibleAudioInterface mW forBluetoothTransceivers – P (LS_V =5V,8Ω,1%THD)1.2W • I2S-PCMBridgewithSampleRateConversion LS DD – P (LS_V =4.2V,8Ω,1%THD)900mW LS DD • Sigma-DeltaPLLforOperationfromAnyClock – P (LS_V =3.3V,8Ω,1%THD)490mW atAnySampleRate LS DD – ShutdownCurrent0.8 µA • Digital3DStereoEnhancement – PSRR (217Hz,LS_V =3.3V)70dB • FIRFilterProgrammabilityforSimpleTone LS DD – SNR (AUXINtoLoudspeaker)90dB(typ) Control LS – SNR (StereoDACtoAUXOUT)85dB • LowPowerClockNetworkOperationifa12 DAC (typ) MHzor13MHzSystemClockisAvailable • Read/WriteI2CorSPICompatibleControl – SNRADC(MonoADCfromCellPhoneIn)90 dB(typ) Interface – SNR (AuxIntoHeadphones)98dB(typ) • AutomaticHeadphone&MicrophoneDetection HP • SupportforInternalandExternalMicrophones APPLICATIONS • AutomaticGainControlforMicrophoneInput • SmartPhones • DifferentialAudioI/OforExternalCellphone • MobilePhonesandMultimediaTerminals Module • PDAs,InternetAppliancesandPortable • MonoDifferentialAuxiliaryOutput Gaming • StereoAuxiliaryInputs • PortableDVD/CD/AAC/MP3Players • DifferentialMicrophoneInputforInternal • DigitalCameras/Camcorders Microphone • FlexibleAudioRoutingfromInputtoOutput • 32StepVolumeControlforMixersin1.5dB Steps 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsof TexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. Alltrademarksarethepropertyoftheirrespectiveowners. 2 PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2007–2012,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com DESCRIPTION The LM49370 is an integrated audio subsystem that supports both analog and digital audio functions. The LM49370 includes a high quality stereo DAC, a mono ADC, a stereo headphone amplifier, which supports output cap-less (OCL) or AC-coupled (SE) modes of operation, a mono earpiece amplifier, and an ultra-low EMI spread spectrum Class D loudspeaker amplifier. It is designed for demanding applications in mobile phones and other portabledevices. The LM49370 features a bi-directional I2S interface and a bi-directional PCM interface for full range audio on either interface. The LM49370 utilizes an I2C or SPI compatible interface for control. The stereo DAC path features an SNR of 85 dB with an 18-bit 48 kHz input. In SE mode the headphone amplifier delivers at least 33 mW to a 32Ω single-ended stereo load with less than 1% distortion (THD+N) when A_V = 3.3V. The mono RMS DD earpiece amplifier delivers at least 115mW to a 32Ω bridged-tied load with less than 1% distortion (THD+N) RMS when A_V = 3.3V. The mono speaker amplifier delivers up to 490mW into an 8Ω load with less than 1% DD distortionwhenLS_V =3.3Vandupto1.2WwhenLS_V =5.0V. DD DD The LM49370 employs advanced techniques to reduce power consumption, to reduce controller overhead, to speed development time, and to eliminate click and pop. Boomer audio power amplifiers were designed specifically to provide high quality output power with a minimal amount of external components. It is therefore ideally suited for mobile phone and other low voltage applications where minimal power consumption, PCB area andcostareprimaryrequirements. LM49370 Overview PLL_VDD BB_VDD D_VDD D_VSS A_VDD A_VSS LS_VDD LS_VSS T HG T AB AUX_OUT PLL_FLT POWER IR FE CLOCKS and MANAGEMENT L IP MCLK 6’_PLL and CONTROL C AB EP_OUT SCL/SCK SDA/SDI I2C/SPI REGISTERS D LS_OUT TEST_MODE/CS SLAVE SPI_MODE BYPASS AMP BIAS HP_VMIDFB I2S_CLK S E 6’ and DET HP_VMID R G MONO II22SS__SWDSI ETFIHS LEV 2DIRB SI - M 11.G7 L A6D’C AB HPL_OUT I2S_SDO EL CP h R STDEARCEO PCM_CLK tiw AB HPR_OUT E C PPCPCMCM_MS__SYSDNDOCI AFRETNI OIDU FIR aFnILdTER -461.52 ddBB to ENOTEDIS B0-3G d0B d tBo MIC IVNRTE_FB_IAFSLT GPIO1 A LAT ADLIGGOITRAILT H3MD anBdI ADSET EMXICT__DBEIATS GPIO2 IGID MIC 366 d dBB to EXT_MIC INT_MIC IRQ AUX_R AUX_L AB CP_OUT AUTOMATIC GAIN -34.5 dB to 12 dB CP_IN CONTROL Figure1. ConceptualSchematic 2 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Typical Application Synthesized FM Radio/ Analog Inputs LM4675 Can Be Used for Stereo Loudspeakers BYPASS AUX_L AUX_R VREF_FLT AUX_OUT PLL_FILT LM4675 GPIO1 0.5-30 MHz LS MCLK BB_VDD EP 2 IC INT_BIAS Baseband IRQ INT_MIC Controller GPIO2 HP_VMIDFB MIC_DET I2S (Stereo) EXT_BIAS EXT_MIC HP_VMID HP_R HP_L A2DP Bluetooth Transceiver PCM (Mono) CP_OUT CP_IN LM49370 Radio Module Figure2. ExampleApplicationinMultimediaMobilePhone Connection Diagrams 7 6 5 4 3 2 1 A B C D E F G Figure3. 49BumpDSBGA TopView(BumpSideDown) SeePackageNumberYPG0049UUA Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com PinDescriptions Pin PinName Type Direction Description A1 EP_NEG Analog Output Earpiecenegativeoutput A2 A_V Supply Input Headphoneandmixer DD V DD A3 INT_MIC_POS Analog Input Internalmicrophone positiveinput A4 PCM_SDO Digital Output PCMSerialDataOutput A5 PCM_CLK Digital Inout PCMclocksignal A6 PCM_SYNC Digital Inout PCMsyncsignal A7 PCM_SDI Digital Input PCMSerialDataInput B1 A_V Supply Input Headphoneandmixer SS ground B2 EP_POS Analog Output Earpiecepositiveoutput B3 INT_MIC_NEG Analog Input Internalmicrophone negativeinput B4 BYPASS Analog Input A_V /2filterpoint DD IfSPI_MODE=1,then B5 TEST_MODE/CS Digital Input thispinbecomesCS. B6 PLL_FILT Analog Input FilterpointforPLLVCO input B7 PLL_V Supply Input PLLV DD DD C1 HP_R Analog Output HeadphoneRightOutput C2 EXT_BIAS Analog Output Externalmicrophone supply(2.0/2.5/2.8/3.3V) C3 INT_BIAS Analog Output Internalmicrophone supply(2.0/2.5/2.8/3.3V) C4 AUX_R Analog Input RightAnalogInput C5 GPIO_2 Digital Inout GeneralPurposeI/O2 C6 SDA Digital Inout ControlData,I2C_SDAor SPI_SDA C7 SCL Digital Input ControlClock,I2C_SCLor SPI_SCL D1 HP_L Analog Output HeadphoneLeftOutput D2 VREF_FLT Analog Inout Filterpointforthe microphonepowersupply D3 EXT_MIC Analog Input Externalmicrophoneinput D4 SPI_MODE Digital Input Controlmodeselect1= SPI,0=I2C D5 GPIO_1 Digital Inout GeneralPurposeI/O1 D6 BB_V Supply Input BasebandV forthe DD DD digitalI/Os D7 D_V Supply Input DigitalV DD DD E1 HP_VMID Analog Inout VirtualGroundfor HeadphonesinOCL mode,otherwise1st headsetdetectioninput E2 MIC_DET Analog Input Headsetinsertion/removal andmicrophonepresence detectioninput. E3 AUX_L Analog Input LeftAnalogInput E4 CPI_NEG Analog Input CellPhoneanaloginput negative E5 IRQ Digital Output Interruptrequestsignal (NOTopendrain) E6 I2S_SDO Digital Output I2SSerialDataOut 4 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 PinDescriptions(continued) Pin PinName Type Direction Description E7 I2S_SDI Digital Input I2SSerialDataInput F1 HP_VMID_FB Analog Input VMIDFeedbackinOCL mode,otherwisea2nd headsetdetectioninput F2 LS_V Supply Input LoudspeakerV DD DD F3 CPI_POS Analog Input CellPhoneanaloginput positive F4 CPO_NEG Analog Output CellPhoneanalogoutput negative F5 AUX_OUT_NEG Analog Output Auxiliaryanalogoutput negative F6 I2S_WS Digital Inout I2SWordSelectSignal (canbemasterorslave) F7 I2S_CLK Digital Inout I2SClockSignal(canbe masterorslave) G1 LS_NEG Analog Output Loudspeakernegative output G2 LS_V Supply Input Loudspeakerground SS G3 LS_POS Analog Output Loudspeakerpositive output G4 CPO_POS Analog Output CellPhoneanalogoutput positive G5 AUX_OUT_POS Analog Output Auxiliaryanalogoutput positive G6 D_V Supply Input Digitalground SS G7 MCLK Digital Input Inputclockfrom0.5MHz to30MHz PINTYPEDEFINITIONS AnalogInput—Apinthatisusedbytheanalogandisneverdrivenbythedevice.Suppliesarepartofthis classification. AnalogOutput—Apinthatisdrivenbythedeviceandshouldnotbedrivenbyexternalsources. AnalogInout—ApinthatistypicallyusedforfilteringaDCsignalwithinthedevice,Passivecomponentscanbe connectedtothesepins. DigitalInput—Apinthatisusedbythedigitalbutisneverdriven. DigitalOutput—Apinthatisdrivenbythedeviceandshouldnotbedrivenbyanotherdevicetoavoid contention. DigitalInout—Apinthatiseitheropendrain(I2C_SDA)orabidirectionalCMOSin/out.Inthelatercasethe directionisselectedbyacontrolregisterwithintheLM49370. Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com Absolute Maximum Ratings (1)(2) AnalogSupplyVoltage (A_V &LS_V ) 6.0V DD DD DigitalSupplyVoltage (BB_V &D_V &PLL_V ) 6.0V DD DD DD StorageTemperature −65°Cto+150°C PowerDissipation (3) InternallyLimited ESDSusceptibility HumanBodyModel (4) 2500V MachineModel (5) 200V JunctionTemperature 150°C ThermalResistance θ –YPG49(soldereddowntoPCBwith2in21oz.copperplane) 60°C/W JA SolderingInformation (1) AllvoltagesaremeasuredwithrespecttotherelevantV pinunlessotherwisespecified.Allgroundsshouldbecoupledascloseas SS possibletothedevice. (2) AbsoluteMaximumRatingsindicatelimitsbeyondwhichdamagetothedevicemayoccur.OperatingRatingsindicateconditionsfor whichthedeviceisfunctionalbutdonotensurespecificperformancelimits.CharacteristicsstateDCandACelectricalspecifications underparticulartestconditionswhichensurespecificperformancelimits.ThisassumesthatthedeviceiswithintheOperatingRatings. Specificationsarenotensuredforparameterswherenolimitisgiven,however,thetypicalvalueisagoodindicationofdevice performance. (3) Themaximumpowerdissipationmustbede-ratedatelevatedtemperaturesandisdictatedbyT ,θ ,andtheambienttemperature, JMAX JA T .ThemaximumallowablepowerdissipationisP =(T –T )/θ orthenumbergiveninAbsoluteMaximumRatings, A DMAX JMAX A JA whicheverislower. (4) Humanbodymodel:100pFdischargedthrougha1.5kΩresistor. (5) Machinemodel:220pF–240pFdischargedthroughallpins. Operating Ratings TemperatureRange −40°Cto+85°C SupplyVoltage D_V /PLL_V 2.5Vto4.5V DD DD BB_V 1.8Vto4.5V DD LS_V =A_V (1) 2.5Vto5.5V DD DD (1) LS_V mustbeequaltoA_V duetointendESDdiodestructure.Forproperoperation,LS_V andA_V needtobethehighest DD DD DD DD voltagethanBB_V ,D_V ,andPLL_V andmustbeappliedfirst. DD DD DD Electrical Characteristics (1)(2) UnlessotherwisestatedPLL_V =3.3V,D_V =3.3V,BB_V =1.8V,A_V =3.3V,LS_V =3.3V.Thefollowing DD DD DD DD DD specificationsapplyforthecircuitshowninFigure2unlessotherwisestated.Limitsapplyfor25°C. LM49370 Symbol Parameter Conditions Typical(3) Lim(5i)t(4) Units POWER DI DigitalShutdownCurrent(6) ChipMode'00',f =13MHz 0.7 2.2 µA(max) SD MCLK DI DigitalStandbyCurrent ChipMode'01',f =13MHz 0.9 1.8 mA(max) ST MCLK AI AnalogShutdownCurrent ChipMode'00' 0.1 1.2 µA(max) SD AI AnalogStandbyCurrent ChipMode'01' 0.1 1.2 µA(max) ST (1) AbsoluteMaximumRatingsindicatelimitsbeyondwhichdamagetothedevicemayoccur.OperatingRatingsindicateconditionsfor whichthedeviceisfunctionalbutdonotensurespecificperformancelimits.CharacteristicsstateDCandACelectricalspecifications underparticulartestconditionswhichensurespecificperformancelimits.ThisassumesthatthedeviceiswithintheOperatingRatings. Specificationsarenotensuredforparameterswherenolimitisgiven,however,thetypicalvalueisagoodindicationofdevice performance. (2) AllvoltagesaremeasuredwithrespecttotherelevantV pinunlessotherwisespecified.Allgroundsshouldbecoupledascloseas SS possibletothedevice. (3) Typicalvaluesaremeasuredat25°Candrepresenttheparametricnorm. (4) LimitsarespecifiedtoTI'sAOQL(AverageOutgoingQualityLevel). (5) Datasheetmin/maxspecificationlimitsarespecifiedbydesign,test,orstatisticalanalysis. (6) DigitalshutdowncurrentismeasuredwithsystemclocksetforPLLoutputwhilethePLLisdisabled. 6 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Electrical Characteristics (1)(2) (continued) UnlessotherwisestatedPLL_V =3.3V,D_V =3.3V,BB_V =1.8V,A_V =3.3V,LS_V =3.3V.Thefollowing DD DD DD DD DD specificationsapplyforthecircuitshowninFigure2unlessotherwisestated.Limitsapplyfor25°C. LM49370 Symbol Parameter Conditions Typical(3) Lim(5i)t(4) Units ChipMode'10',f =12MHz, MCLK f =48kHz, 7.9 mA S DigitalPlaybackModeDigital DACon;PLLoff ActiveCurrent ChipMode'10',f =13MHz, MCLK f =12MHz,f =48kHz; 12.5 14.5 mA(max) PLLOUT S DAC+PLLon ChipMode'10',HPOn,SEmode, 9.0 13.5 mA(max) DACinputsselected DigitalPlaybackModeAnalog ChipMode'10',HPOn,OCLmode, 9.4 13.5 mA(max) ActiveCurrent DACinputsselected ChipMode'10',LSOn, 11.5 15.5 mA(max) DACinputsselected AnalogPlaybackModeDigitalActive ChipMode'10',f =13MHz, MCLK 0.9 1.8 mA(max) Current DAC+ADC+PLLoff ChipMode'10',HPOn,SEmode, 5.9 9.5 mA(max) AUXinputsselected AnalogPlaybackModeAnalogActive ChipMode'10',HPOn,OCLmode, 6.3 9.7 mA(max) Current AUXinputsselected ChipMode'10',LSOn, 8.4 12 mA(max) AUXinputsselected ChipMode'10',f =13MHz,f = CODECModeDigitalActiveCurrent MCLK S 2.7 3.5 mA(max) 8kHz,DAC+ADCon;PLLOff CODECModeAnalogActiveCurrent ChipMode'10',EPOn, 11.2 15.5 mA(max) DACinputsselected VoiceModuleModeDigitalActive ChipMode'10',f =13MHz, MCLK 0.9 1.8 mA(max) Current DAC+ADC+PLLoff VoiceModuleModeAnalogActive ChipMode'10',EP+CPOUTon, 7.4 11 mA(max) Current CPINinputselected LOUDSPEAKERAMPLIFIER 8Ωload,LS_V =5V 1.2 W DD P MaxLoudspeakerPower 8Ωload,LS_V =4.2V 0.9 W LS DD 8Ωload,LS_V =3.3V 0.5 0.43 W(min) DD 8Ωload,LS_V =3.3V, LS LoudspeakerHarmonicDistortion DD 0.04 % THD+N P =400mW O 0dBInput LS Efficiency 84 % EFF MCLK=12.000MHz AUXinputsterminated PowerSupplyRejectionRation C =1.0µF PSRR BYPASS 70 dB LS (Loudspeaker) V =200mV RIPPLE P-P f =217Hz RIPPLE SNR SignaltoNoiseRatio From0dBAnalogAUXinput,A-weighted 90 80 dB(min) LS e OutputNoise(7) A-weighted 62 µV N V LoudspeakerOffsetVoltage 12 mV OS (7) DisablingorbypassingthePLLwillusuallyresultinanimprovementinnoisemeasurements. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com Electrical Characteristics (1)(2) (continued) UnlessotherwisestatedPLL_V =3.3V,D_V =3.3V,BB_V =1.8V,A_V =3.3V,LS_V =3.3V.Thefollowing DD DD DD DD DD specificationsapplyforthecircuitshowninFigure2unlessotherwisestated.Limitsapplyfor25°C. LM49370 Symbol Parameter Conditions Typical(3) Lim(5i)t(4) Units HEADPHONEAMPLIFIER mW 32Ωload,3.3V,SE 33 25 (min) 16Ωload,3.3V,SE 52 mW P HeadphonePower 32Ωload,3.3V,OCL,VCM=1.5V 31 mW HP 32Ωload,3.3V,OCL,VCM=1.2V 20 mW 16Ωload,3.3V,OCL,VCM=1.5V 50 mW 16Ωload,3.3V,OCL,VCM=1.2V 32 mW AUXinputsterminated C =1.0µF BYPASS V =200mV RIPPLE P-P f =217Hz RIPPLE PSRR PowerSupplyRejectionRatio SEMode 60 dB HP (Headphones) OCLMode 68 55 dB(min) VCM=1.2V OCLMode 65 dB VCM=1.5V From0dBAnalogAUXinput A-weighted SEMode 98 dB SNRHP SignaltoNoiseRatio OCLMode 97 dB VCM=1.2V OCLMode 96 dB VCM=1.5V HP HeadphoneHarmonicDistortion 32Ωload,3.3V,P =7.5mW 0.05 % THD+N O e OutputNoise A-weighted 12 µV N StereoChannel-to-ChannelGain ΔA 0.3 dB CH-CH Mismatch SEMode 61 dB X StereoCrosstalk TALK OCLMode 71 dB V OffsetVoltage 8 mV OS EARPIECEAMPLIFIER mW 32Ωload,3.3V 115 100 P EarpiecePower (min) EP 16Ωload,3.3V 150 mW CP_INterminated C =1.0µF PSRR PowerSupplyRejectionRatio(Earpiece) BYPASS 76 dB EP V =200mV RIPPLE P-P F =217Hz RIPPLE SNR SignaltoNoiseRatio From0dBAnalogAUXinput,A-weighted 93 dB EP EP EarpieceHarmonicDistortion 32Ωload,3.3V,P =50mW 0.04 % THD+N O e OutputNoise A-weighted 41 µV N V OffsetVoltage 8 mV OS AUXOUTAMPLIFIER THD+N TotalHarmonicDistortion+Noise V =1V ,5kΩload 0.02 % O RMS CP_INterminated C =1.0μF PSRR PowerSupplyRejectionRatio BYPASS 86 dB V =200mVPP RIPPLE f =217Hz RIPPLE 8 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Electrical Characteristics (1)(2) (continued) UnlessotherwisestatedPLL_V =3.3V,D_V =3.3V,BB_V =1.8V,A_V =3.3V,LS_V =3.3V.Thefollowing DD DD DD DD DD specificationsapplyforthecircuitshowninFigure2unlessotherwisestated.Limitsapplyfor25°C. LM49370 Symbol Parameter Conditions Typical(3) Lim(5i)t(4) Units CP_OUTAMPLIFIER THD+N TotalHarmonicDistortion+Noise V =1V ,5kΩload 0.02 % O RMS C =1.0μF BYPASS PSRR PowerSupplyRejectionRatio V =200mVPP 86 dB RIPPLE f =217Hz RIPPLE MONOADC R ADCRipple ±0.25 dB ADC ADCPassband Lower(HPFMode1),f =8kHz 300 Hz S PB ADC Upper 3470 Hz AbovePassband 60 dB SBA ADCStopbandAttenuation ADC HPFNotch,50Hz/60Hz(worstcase) 58 dB SNR ADCSignaltoNoiseRatio FromCPI,A-weighted 90 dB ADC ADC ADCFullScaleInputLevel 1 V LEVEL RMS STEREODAC R DACRipple 0.1 dB DAC PB DACPassband 20 kHz DAC SBA DACStopbandAttenuation 70 dB DAC SNR DACSignaltoNoiseRatio A-weighted,AUXOUT 85 dB DAC DR DACDynamicRange 96 dB DAC DAC DACFullScaleOutputLevel 1 V LEVEL RMS PLL(8) Min 0.5 MHz F InputFrequencyRange IN Max 30 MHz I2S/PCM f =48kHz;16bitmode 1.536 MHz S f =48kHz;25bitmode 2.4 MHz S f I2SCLKFrequency I2SCLK f =8kHz;16bitmode 0.256 MHz S f =8kHz;25bitmode 0.4 MHz S f =48kHz;16bitmode 0.768 MHz S f =48kHz;25bitmode 1.2 MHz S f PCMCLKFrequency PCMCLK f =8kHz;16bitmode 0.128 MHz S f =8kHz;25bitmode 0.2 MHz S Min 40 %(min) DC I2S_CLKDutyCycle I2S_CLK Max 60 %(max) DC I2S_WSDutyCycle 50 % I2S_WS I2C T I2CDataSetupTime RefertoTRANSFERRINGDATAformore I2CSET 100 ns(min) details T I2CDataHoldTime RefertoTRANSFERRINGDATAformore I2CHOLD 300 ns(min) details SPI T EnableSetupTime 100 ns(min) SPISETENB T EnableHoldTime 100 ns(min) SPIHOLD-ENB T DataSetupTime 100 ns(min) SPISETD (8) DisablingorbypassingthePLLwillusuallyresultinanimprovementinnoisemeasurements. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com Electrical Characteristics (1)(2) (continued) UnlessotherwisestatedPLL_V =3.3V,D_V =3.3V,BB_V =1.8V,A_V =3.3V,LS_V =3.3V.Thefollowing DD DD DD DD DD specificationsapplyforthecircuitshowninFigure2unlessotherwisestated.Limitsapplyfor25°C. LM49370 Symbol Parameter Conditions Typical(3) Lim(5i)t(4) Units T DataHoldTime 100 ns(min) SPIHOLDD T ClockLowTime 500 ns(min) SPICL T ClockHighTime 500 ns(min) SPICH VOLUMECONTROL MinimumGainw/AUX_BOOSTOFF –46.5 dB MaximumGainw/AUX_BOOSTOFF 0 dB VCR AUXVolumeControlRange AUX MinimumGainw/AUX_BOOSTON –34.5 dB MaximumGainw/AUX_BOOSTON 12 dB MinimumGainw/DAC_BOOSTOFF –46.5 dB MaximumGainw/DAC_BOOSTOFF 0 dB VCR DACVolumeControlRange DAC MinimumGainw/DAC_BOOSTON –34.5 dB MaximumGainw/DAC_BOOSTON 12 dB MinimumGain –34.5 dB VCR CPINVolumeControlRange CPIN MaximumGain 12 dB MinimumGain 6 dB VCR MICVolumeControlRange MIC MaximumGain 36 dB MinimumGain –30 dB VCR SIDETONEVolumeControlRange SIDE MaximumGain 0 dB SS AUXVCRStepsize 1.5 dB AUX SS DACVCRStepsize 1.5 dB DAC SS CPINVCRStepsize 1.5 dB CPIN SS MICVCRStepsize 2 dB MIC SS SIDETONEVCRStepsize 3 dB SIDE AUDIOPATHGAINW/STEREO(bit6of0x00h)ENABLED(AUX_L&AUX_Rsignalsidenticalandselectedontomixer) MinimumGainfromAUXinput, –34.5 dB BOOSTOFF MaximumGainfromAUXinput, 12 dB LoudspeakerAudioPathGain BOOSTOFF MinimumGainfromCPIinput –22.5 dB MaximumGainfromCPIinput 24 dB MinimumGainfromAUXinput, –52.5 dB BOOSTOFF MaximumGainfromAUXinput, –6 dB BOOSTOFF MinimumGainfromCPIinput –40.5 dB HeadphoneAudioPathGain MaximumGainfromCPIinput 6 dB MinimumGainfromMICinputusing –30 dB SIDETONEpathw/VCR gain=6dB MIC MaximumGainfromMICinputusing 0 dB SIDETONEpathw/VCR gain=6dB MIC 10 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Electrical Characteristics (1)(2) (continued) UnlessotherwisestatedPLL_V =3.3V,D_V =3.3V,BB_V =1.8V,A_V =3.3V,LS_V =3.3V.Thefollowing DD DD DD DD DD specificationsapplyforthecircuitshowninFigure2unlessotherwisestated.Limitsapplyfor25°C. LM49370 Symbol Parameter Conditions Typical(3) Lim(5i)t(4) Units MinimumGainfromAUXinput, –40.5 dB BOOSTOFF MaximumGainfromAUXinput, 6 dB BOOSTOFF MinimumGainfromCPIinput –28.5 dB EarpieceAudioPathGain MaximumGainfromCPIinput 18 dB MinimumGainfromMICinputusing –18 dB SIDETONEpathw/VCR gain=6dB MIC MaximumGainfromMICinputusing 12 dB SIDETONEpathw/VCR gain=6dB MIC MinimumGainfromAUXinput, –46.5 dB BOOSTOFF MaximumGainfromAUXinput, 0 dB AUXOUTAudioPathGain BOOSTOFF MinimumGainfromCPIinput –34.5 dB MaximumGainfromCPIinput 12 dB MinimumGainfromAUXinput, –46.5 dB BOOSTOFF MaximumGainfromAUXinput, 0 dB CPOUTAudioPathGain BOOSTOFF MinimumGainfromMICinput 6 dB MaximumGainfromMICinput 36 dB TotalDCPowerDissipation DAC(f =48kHz)andHPON S f =12MHz,PLLOFF 56 mW DigitalPlaybackModePowerDissipation MCLK f =13MHz,PLLON MCLK 71 mW f =12MHz PLLOUT AnalogPlaybackModePower AUXInputsselectedandHPON Dissipation f =13MHz,PLLOFF 22 mW MCLK PCMDAC(f =8kHz)+ADC(f =8kHz) S S VOICECODECModePowerDissipation andEPON f =13MHz,PLLOFF 46 mW MCLK CPINselected.EPandCPOUTON VOICEModuleModePowerDissipation f =13MHz,PLLOFF 27 mW MCLK Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com System Control Method1.I2CCompatibleInterface I2C SIGNALS In I2C mode the LM49370 pin SCL is used for the I2C clock SCL and the pin SDA is used for the I2C data signal SDA. Both these signals need a pull-up resistor according to I2C specification. The I2C slave address for LM49370is0011010 . 2 I2C DATA VALIDITY The data on SDA line must be stable during the HIGH period of the clock signal (SCL). In other words, state of thedatalinecanonlybechangedwhenSCLisLOW. SCL SDA data data data data data change valid change valid change allowed allowed allowed Figure4. I2CSignals:DataValidity I2C START AND STOP CONDITIONS STARTandSTOPbitsclassifythebeginningandtheendoftheI2Csession.STARTconditionisdefinedasSDA signal transitioning from HIGH to LOW while SCL line is HIGH. STOP condition is defined as the SDA transitioning from LOW to HIGH while SCL is HIGH. The I2C master always generates START and STOP bits. The I2C bus is considered to be busy after START condition and free after STOP condition. During data transmission, I2C master can generate repeated START conditions. First START and repeated START conditionsareequivalent,function-wise. SDA SCL S P START condition STOP condition TRANSFERRING DATA Every byte put on the SDA line must be eight bits long, with the most significant bit (MSB) being transferred first. Each byte of data has to be followed by an acknowledge bit. The acknowledge related clock pulse is generated by the master. The transmitter releases the SDA line (HIGH) during the acknowledge clock pulse. The receiver must pull down the SDA line during the 9th clock pulse, signifying an acknowledge. A receiver which has been addressedmustgenerateanacknowledgeaftereachbytehasbeenreceived. After the START condition, the I2C master sends a chip address. This address is seven bits long followed by an eight bit which is a data direction bit (R/W). The LM49370 address is 0011010 . For the eighth bit, a“0” indicates 2 a WRITE and a “1” indicates a READ. The second byte selects the register to which the data will be written. The thirdbytecontainsdatatowritetotheselectedregister. MSB LSB ADR6 ADR5 ADR4 ADR3 ADR2 ADR1 ADR0 R/W Bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 2 IC SLAVE address (chip address) Figure5. I2CChipAddress 12 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 RegisterchangestakeaneffectattheSCLrisingedgeduringthelastACKfromslave. ack from slave ack from slave ack from slave start MSB Chip Address LSB w ack MSB Register 0x02h LSB ack MSB Data LSB ack stop SCL SDA slave address = start 00110102 w ack register address = 0x02h ack register 0x02h data ack stop w=write(SDA=“0”) r=read(SDA=“1”) ack=acknowledge(SDApulleddownbyslave) rs=repeatedstart Figure6. ExampleI2CWriteCycle When a READ function is to be accomplished, a WRITE function must precede the READ function, as shown in theReadCyclewaveform. ack from slave ack from slave repeated start ack from slave data from slave ack from master start MSB Chip Address LSB w ack MSB Register 0x00h LSB ack rs MSB Chip Address LSB r ack MSB Data LSB ack stop SCL SDA slave address = slave address = start 00110102 w ack register address = 0x00h ack rs 00110102 r ack register 0x00h data ack stop Figure7. ExampleI2CReadCycle SDA 10 8 7 6 8 1 7 2 SCL 1 5 3 4 9 Figure8. I2CTimingDiagram I2C TIMING PARAMETERS Symbol Parameter(1) Limit Units Min Max 1 HoldTime(repeated) 0.6 µs STARTCondition 2 ClockLowTime 1.3 µs 3 ClockHighTime 600 ns 4 SetupTimefora 600 ns RepeatedSTART Condition (1) Dataspecifiedbydesign Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com 5 DataHoldTime(Output 300 900 ns direction,delaygenerated byLM49370) 5 DataHoldTime(Input 0 900 ns direction,delaygenerated bytheMaster) 6 DataSetupTime 100 ns 7 RiseTimeofSDAand 20+0.1C 300 ns b SCL 8 FallTimeofSDAandSCL 15+0.1C 300 ns b 9 Set-upTimeforSTOP 600 ns condition 10 BusFreeTimebetweena 1.3 µs STOPandaSTART Condition C CapacitiveLoadforEach 10 200 pF b BusLine Method2.SPI/MicrowireControl/3–wireControl The LM49370 can be controlled via a three wire interface consisting of a clock, data and an active low chip_select. To use this control method connect SPI_MODE to BB_V and use TEST_MODE/CS as the DD chip_selectasfollows: TEST_MODE/CS CLK SDI 15 14 8 7 1 0 Register Address Write Data Figure9. SPIWriteTransaction If the application requires read access to the register set; for example to determine the cause of an interrupt request, the GPIO2 pin can be configured as an SPI format serial data output by setting the GPIO_SEL in the GPIO configuration register (0x1Ah) to SPI_SDO. To perform a read rather than a write to a particular address theMSBoftheregisteraddressfieldissettoa1,thiseffectivelymirrorsthecontentsoftheregisterfieldtoread- onlylocationsabove0x80h: TEST_MODE/CS CLK SDI 15 14 8 Ignored GPIO2 11 1 4 Register Address Register Data Figure10. SPIReadTransaction Figure11. ThreeWireModeWriteBusTiming TSPISETENB TSPIHOLDENB TEST_MODE/CS TSPICL TSPIT CLK TSPICH SDI TSPISETD TSPIHOLDD Figure12. SPITiming 14 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Status & Control Registers Table1.RegisterMap(1) Address Register 7 6 5 4 3 2 1 0 0x00h Table2BASIC DAC_MODE CAP_SIZE OSC_ENB PLL_ENB CHP_MODE Table3 0x01h R_DIV DAC_CLK_SEL CLOCKS 0x02h FORCERQ PLL_M 0x03h PLL_N PLL_N 0x04h PLL_P VCOFATS Q_DIV PLL_P 0x05h PLL_MOD PLLTEST PLL_CLK_SEL PLL_N_MOD 0x06h ADC_1 HPF_MODE SAMPLE_RATE RIGHT LEFT CPI MIC ADC ADC 0x07h ADC_2 NGZXDD ADC_CLK_SEL PEAKTIME MUTE _MODE 0x08h AGC_1 NOISE_GATE_THRESHOLD NG_ENB AGC_TARGET AGC_ENB AGC 0x09h AGC_2 AGC_DECAY AGC_MAX_GAIN _TIGHT 0x0Ah AGC_3 AGC_ATTACK AGC_HOLD_TIME 0x0Bh MIC_1 INT_EXT SE_DIFF MUTE PREAMP_GAIN BTN_DEBOUNCE_TIM 0x0Ch MIC_2 BTNTYPE MIC_BIAS_VOLTAGE VCMVOLT E 0x0Dh SIDETONE SIDETONE_ATTEN 0x0Eh CP_INPUT MUTE CPI_LEVEL 0x0Fh AUX_LEFT AUX_DAC MUTE BOOST AUX_LEFT_LEVEL 0x10h AUX_RIGHT AUX_DAC MUTE BOOST AUX_RIGHT_LEVEL 0x11h DAC USAXLVL DACMUTE BOOST DAC_LEVEL 0x12h CP_OUTPUT MICGATE MUTE LEFT RIGHT MIC 0x13h AUXOUTPUT MUTE LEFT RIGHT CPI 0x14h LS_OUTPUT MUTE LEFT RIGHT CPI 0x15h HP_OUTPUT OCL STEREO MUTE LEFT RIGHT CPI SIDE 0x16h EP_OUTPUT MUTE LEFT RIGHT CPI SIDE 0x17h DETECT HS_DBNC_TIME TEMP_INT BTN_INT DET_INT 0x18h STATUS GPIN1 GPIN2 TEMP BTN MIC STEREO HEADSET CUST 0x19h 3D ATTENUATE FREQ LEVEL MODE 3DENB _COMP WORD_ STEREO I2S_MOD 0x1Ah I2SMODE I2S_WS_GEN_MODE WS_MS INENB OUTENB ORDER REVERSE E 0x1Bh I2SCLOCK PCM_SYNC__WIDTH I2S_CLOCK_GEN_MODE CLKSCE CLK_MS ALAW/μLA SDO_ 0x1Ch PCMMODE COMPAND SYNC_MS CLKSRCE CLK_MS INENB OUTENB W LSB_HZ 0x1Dh PCMCLOCK PCM_SYNC_GEN_MODE PCM_CLOCKGENMODE MONO_ PCM_ 0x1Eh BRIDGE MONO_SUM_MODE DAC_TX_SEL I2S_TX_SEL SUM_SEL TX_SEL DAC_SRC_ ADC_SRC_ 0x1Fh GPIO GPIO_2_SEL GPIO_1_SEL MODE MODE 0x20h CMP_0_LSB CMP_0_LSB 0x21h CMP_0_0SB CMP_0_MSB 0x22h CMP_1_LSB CMP_1_LSB 0x23h CMP_1_MSB CMP_1_MSB 0x24h CMP_2_LSB CMP_2_LSB 0x25h CMP_2_MSB CMP_2_MSB (1) ThedefaultvalueofallI2Cregistersis0x00h. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com BASICCONFIGURATIONREGISTER Thisregisterisusedtocontrolthebasicfunctionofthechip. Table2.BASIC(0x00h) Bits Field Description 1:0 CHIP_MODE TheLM49370canbeplacedinoneoffourmodeswhichdictateitsbasicoperation.Whenanewmodeis selectedtheLM49370willchangeoperationsilentlyandwillre-configurethepowermanagementprofile automatically.Themodesaredescribedasfollows: CHIPMODE AudioSystem TypicalApplication 00 Off Power-downMode 2 01 Off Stand-bymodewithheadseteventdetection 2 10 On Activewithoutheadseteventdetection 2 11 On Activewithheadseteventdetection 2 2 PLL_ENABLE ThisenablesthePLL. 3 USE_OSC Ifsetthepowermanagementandcontrolcircuitswillassumethatnoexternalclockisavailableandwill resorttousinganon-chiposcillatorforheadsetdetectionandanalogpowermanagementfunctionssuch asclickandpop.ThePLL,ADC,andDACarenotwiredtousethislowqualityclock.Thisbitmustbe clearedfortheparttobefullyturnedoffpower-downmode. 5:4 CAP_SIZE Thisprogramstheextradelaysrequiredtostabilizeoncecharge/dischargeiscomplete,basedonthesize ofthebypasscapacitor. BypassCapacitor CAP_SIZE Turn-off/ontime Size 00 0.1µF 45ms/75ms 2 01 1µF 45ms/140ms 2 10 2.2µF 45ms/260ms 2 11 4.7µF 45ms/500ms 2 7:6 DAC_MODE TheDACcanoperateinoneoffourmodes.Ifan“fs*2∧N”audioclockisavailable,thentheDACcanbe runinaslightlylowerpowermode.Ifsuchaclockisnotavailable,thePLLcanbeusedtogeneratea suitableclock. DACMODE DACOSR TypicalApplication 48kHzPlaybackfrom 00 125 2 12.000MHz 48kHzPlaybackfrom 01 128 2 12.288MHz 10 64 96kHzPlaybackfrom12.288MHz 2 11 32 192kHzPlaybackfrom24.576MHz 2 For reliable headset / push button detection the following bits should be defined before enabling the headset detectionsystembysettingbit0ofCHIP_MODE: TheOCL-bit(Cap/Caplessheadphoneinterface;bit6ofHP_OUTPUT(0x15h)) Theheadsetinsert/removaldebouncesettings(bits6:3ofDETECT(0x17h)) TheBTN_TYPE-bit(Parallel/Seriespushbuttontype;bit3MIC_2register(0x0Ch)) Theparallelpushbuttondebouncesettings(bits5:4ofMIC_2register(0x0Ch)) All register fields controlling the audio system should be defined before setting bit 1 of CHIP_MODE and should notbealteredwhiletheaudiosub-systemisactive. Iftheanalogordigitallevelsarebelow−12dBthenitisnotnecessarytosetthestereobitallowinggreateroutput levelstobeobtainedforsuchsignals. CLOCKSCONFIGURATIONREGISTER Thisregisterisusedtocontroltheclocksthroughoutthechip. 16 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Table3.CLOCKS(0x01h) Bits Field Description 1:0 DAC_CLK ThisselectstheclocktobeusedbytheaudioDACsystem. DAC_CLK DACInputSource 00 MCLK 2 01 PLL_OUTPUT 2 10 I2S_CLK_IN 2 11 PCM_CLK_IN 2 7:2 R_DIV ThisprogramstheRdivider. R_DIV DivideValue 0 Bypass 1 Bypass 2 1.5 3 2 4 2.5 5 3 6 3.5 7 4 8 4.5 9 5 10 5.5 11 6 12 6.5 13to61 7to31 62 31.5 63 32 LM49370CLOCKNETWORK The audio ADC operates at 125*fs ( or 128*fs), so it requires a 1.000 MHz (or 1.024MHz) clock to sample at 8 kHz (at point C as marked on the following diagram). If the stereo DAC is running at 125*fs (or128*fs), it requires a 12.000MHz (or 12.288MHz) clock (at point B) for 48 kHz data. It is expected that the PLL is used to drive the audio system operating at 125*fs unless a 12.000 MHz master clock is supplied or the sample rate is always a multiple of 8 kHz. In this case the PLL can be bypassed to reduce power, with clock division being performed by theQandRdividersinstead.ThePLLcanalsobebypassedifthesystemisrunningat128*fsanda12.288MHz master clock is supplied and the sample rate is a multiple of 8kHz. The PLL can also use the I2S clock input as a source. In this case, the audio DAC uses the clock from the output of the PLL and the audio ADC either uses the PLL output divided by 2*F /F or a system clock divided by Q, this allows n*8 kHz recording and 44.1 S(DAC) S(ADC) kHzplayback. MCLKmustbelessthanorequalto30MHz.I2S_CLKandPCM_CLKshouldbebelow6.144MHz. When operating at 125*fs, the LM49370 is designed to work from a 12.000 MHz or 11.025 MHz clock at point A. When operating at 128*fs, the LM49370 is designed to work from a 12.288MHz or 11.2896 MHz clock at point A. This is used to drive the power management and control logic. Performance may not meet the electrical specificationsifthefrequencyatthispointdeviatessignificantlybeyondthisrange. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 17 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com USE_ONCHIP_OSC From on chip 12 MHz oscillator A (to DET, PMC) B % R PLL % Q MCLK C I2S Interface Stereo DAC I2S_CLK PCM Interface Mono ADC PCM_CLK Figure13. LM49370ClockNetwork COMMONCLOCKSETTINGSFORTHEDAC& ADC When DAC_MODE = '00' (bits 7:6 of (0x00h)), the DAC has an over sampling ratio of 125 but requires a 250*fs clockatpointB.Thisallowsasimpleclockingsolutionasitwillworkfrom12.000MHz(commoninmostsystems with Bluetooth or USB) at 48 kHz exactly, the following table describes the clock required at point B for various clocksampleratesinthedifferentDACmodes: Table4.CommonDACClockFrequencies DACSampleRate(kHz) ClockRequiredatB(OSR=125) ClockRequiredatB(OSR=128) 8 2MHz 2.048MHz 11.025 2.75625MHz 2.8224MHz 12 3MHz 3.072MHz 16 4MHz 4.096MHz 22.05 5.5125MHz 5.6448MHz 24 6MHz 6.144MHz 32 8MHz 8.192MHz 44.1 11.025MHz 11.2896MHz 48 12MHz 12.288MHz NOTE When DAC_MODE = '01' with the I2S or PCM interface operating as master, the stereo DAC operates at half the frequency of the clock at point B. This divided by two DAC clock isusedasthesourceclockfortheaudioport. The over sampling ratio of the ADC is set by ADC MODE (bit 0 of 0x07h)). The table below shows the required clockfrequencyatpointCforthedifferentADCmodes. Table5.CommonADCClockFrequencies ADCSampleRate(kHz) ClockRequiredatC(OSR=125) ClockRequiredatC(OSR=128) 8 1MHz 1.024MHz 11.025 1.378125MHz 1.4112MHz 12 1.5MHz 1.536MHz 16 2MHz 2.048MHz 22.05 2.75625MHz 2.8224MHz 24 3MHz 3.072MHz 18 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 MethodsforproducingtheseclockfrequenciesaredescribedinthePLLSection. PLLMDIVIDERCONFIGURATIONREGISTER ThisregisterisusedtocontroltheinputsectionofthePLL. Table6.PLL_M(0x02h)(1) Bits Field Description 0 RSVD RESERVED 6:0 PLL_M PLL_M InputDividerValue 0 NoDividedClock 1 1 2 1.5 3 2 4 2.5 ... 3to63 126 63.5 127 64 7 FORCERQ Ifset,theRandQdividerareenabledandtheDACandADCclocksarepropagated.Thisallowsoperationof theI2SandPCMinterfaceswithouttheADCorDACbeingenabled,forexampletoactasabridgeoraclock master. (1) SeeFurtherNotesonPLLProgrammingformoredetail. TheMdividershouldbesetsuchthattheoutputofthedividerisbetween0.5MHzand5MHz. ThedivisionoftheMdividerisderivedfromPLL_Msuchthat: M=(PLL_M+1)/2 PLLNDIVIDERCONFIGURATIONREGISTER ThisregisterisusedtocontrolthefeedbackdividerofthePLL. Table7.PLL_N(0x03h)(1) Bits Field Description 7:0 PLL_N ThisprogramsthePLLfeedbackdividerasfollows: PLL_N FeedbackDividerValue 0to10 10 11 11 12 12 13 13 14 14 … … 249 249 250to255 250 (1) SeeFurtherNotesonPLLProgrammingforfurtherdetails. The N divider should be set such that the output of the divider is between 0.5 MHz and 5 MHz. (Fin/M)*N will be the target resting VCO frequency, F . The N divider should be set such that 40 MHz < (Fin/M)*N < 60 MHz. VCO Fin/M is often referred to as F (comparison frequency) or F (reference frequency), in this document F is comp ref comp used. TheintegerdivisionoftheNdividerisderivedfromPLL_Nsuchthat: For9<PLL_N<251:N=PLL_N PLLPDIVIDERCONFIGURATIONREGISTER ThisregisterisusedtocontroltheoutputdividerofthePLL. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 19 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com Table8.PLL_P(0x04h)(1) Bits Field Description 3:0 PLL_P ThisprogramsthePLLoutputdividerasfollows: PLL_P OutputDividerValue 0 NoDividedClock 1 1 2 1.5 3 2 4 2.5 ... 3to7 14 7.5 15 8 6:4 Q_DIV ThisprogramstheQDivider Q_DIV DivideValue 000 2 2 001 3 2 010 4 2 011 6 2 100 8 2 101 10 2 110 12 2 111 13 2 7 FAST_VCO ThisprogramsthePLLVCOrange: FAST_VCO PLLVCORange 0 40to60MHz 1 60to80MHz (1) SeeFurtherNotesonPLLProgrammingformoredetails. ThedivisionofthePdividerisderivedfromPLL_Psuchthat: P=(PLL_P+1)/2 PLLNMODULUSCONFIGURATIONREGISTER ThisregisterisusedtocontrolthemodulationappliedtothefeedbackdividerofthePLL. Table9.PLL_N_MOD(0x05h)(1) Bits Field Description 4:0 PLL_N_MOD ThisprogramsthePLLNdivider'sfractionalcomponent: PLL_N_MOD FractionalAddition 0 0/32 1 1/32 2to30 2/32to30/32 31 31/32 6:5 PLL_CLK_SEL ThisselectstheclocktobeusedasinputfortheaudioPLL. PLL_INPUT_CLK 00 MCLK 2 01 I2S_CLK_IN 2 10 PCM_CLK_IN 2 11 — 2 7 RSVD Reserved. (1) SeeFurtherNotesonPLLProgrammingformoredetails. 20 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 ThecompleteNdividerisafractionaldividerassuch: N=PLL_N+PLL_N_MOD/32 If the modulus input is zero then the N divider is simply an integer N divider. The output from the PLL is determinedbythefollowingformula: F =(F *N)/(M*P) out in FURTHERNOTESONPLLPROGRAMMING The sigma-delta PLL Is designed to drive audio circuits requiring accurate clock frequencies of up to 30MHz with frequency errors noise-shaped away from the audio band. The 5 bits of modulus control provide exact synchronization of 48kHz and 44.1kHz sample rates from any common system clock. In systems where an isochronous I2S data stream is the source of data to the DAC a clock synchronous to the sample rate should be usedasinputtothePLL(typicallytheI2Sclock).Ifnoisochronoussourceisavailable,thenthePLLcanbeused to obtain a clock that is accurate to within 1Hz of the correct sample rate although this is highly unlikely to be a problem. PLL_P 4 Phase Comparator P = 0,1 + 0/2 - >64 and Charge Pump External Loop 40 to 60 MHz 0.5-30 MHz Filter 250 x FS % M 0 VCO % P 0.5 < 5 MHz P = 1..8 7 % N 6’M 8 PLL_M N = 10..250 31/32 8 5 PLL_N PLL_N_MOD Figure14. PLLOverview Table10.ExamplePLLSettingsfor48kHzand44.1kHzSampleRatesinDACMODE00 F (MHz) F (kHz) M N P PLL_M PLL_N PLL_N_MO PLL_P F (MHz) in s out D 11 48 11 60 5 21 60 0 9 12 12.288 48 4 19.53125 5 7 19 17 9 12 13 48 13 60 5 25 60 0 9 12 14.4 48 9 37.5 5 17 37 16 9 12 16.2 48 27 100 5 53 100 0 9 12 16.8 48 14 50 5 27 50 0 9 12 19.2 48 13 40.625 5 25 40 20 9 12 19.44 48 27 100 6 53 100 0 11 12 19.68 48 20.5 62.5 5 40 62 16 9 12 19.8 48 16.5 50 5 32 50 0 9 12 11 44.1 11 55.125 5 21 55 4 9 11.025 11.2896 44.1 8 39.0625 5 15 39 2 9 11.025 12 44.1 5 22.96875 5 9 22 31 9 11.025 13 44.1 13 55.125 5 25 55 4 9 11.025 14.4 44.1 12 45.9375 5 23 45 30 9 11.025 16.2 44.1 9 30.625 5 17 9 20 9 11.025 16.8 44.1 17 55.78125 5 33 30 25 9 11.025 19.2 44.1 16 45.9375 5 31 45 30 9 11.025 19.44 44.1 13.5 38.28125 5 26 38 9 9 11.025 19.68 44.1 20.5 45.9375 4 40 45 30 7 11.025 19.8 44.1 11 30.625 5 21 30 20 9 11.025 Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 21 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com Table11.ExamplePLLSettingsfor48kHzand44.1kHzSampleRatesinDACMODE01 F (MHz) F (kHz) M N P PLL_M PLL_N PLL_N_MO PLL_P F (MHz) in s out D 12 48 12.5 64 5 24 64 0 9 12.288 13 48 26.5 112.71875 4.5 52 112 23 8 12.288 14.4 48 37.5 128 4 74 128 0 7 12.288 16.2 48 37.5 128 4.5 74 128 0 8 12.288 16.8 48 12.53 32 3.5 24 32 0 6 12.288 19.2 48 12.5 32 4 24 32 0 7 12.288 19.44 48 40.5 128 58 80 128 0 9 12.288 19.68 48 20.5 64 5 40 64 0 9 12.288 19.8 48 37.5 128 5.5 74 128 0 10 12.288 12 44.1 35.5 133.59375 4 70 133 19 7 11.2896 13 44.1 37 144.59375 4.5 73 144 19 8 11.2896 14.4 44.1 37.5 147 5 74 147 0 9 11.2896 16.2 44.1 47.5 182.0625 5.5 94 182 2 10 11.2896 16.8 44.1 12.5 42 5 24 42 0 9 11.2896 19.2 44.1 12.5 36.75 5 24 36 24 9 11.2896 19.44 44.1 37.5 98 4.5 74 98 0 9 11.2896 19.68 44.1 44.5 114.875 4.5 88 114 28 8 11.2896 19.8 44.1 48 136.84375 5 95 136 27 9 11.2896 These tables cover the most common applications, obtaining clocks for derivative sample rates such as 22.05 kHzshouldbedonebyincreasingthePdividervalueorusingtheR/Qdividers. An example of obtaining 12.000 MHz from 1.536 MHz is shown below (this is typical for deriving DAC clocks fromI2Sdatastreams). Choose a small range of P so that the VCO frequency is swept between 40 MHz and 60 MHz (or 60–80 MHz if VCOFAST is used). Remembering that the P divider can divide by half integers, for a 12 MHz output, this gives possible P values of 3, 3.5, 4, 4.5, or 5. The M divider should be set such that the comparison frequency (Fcomp)isbetween0.5and5MHz.ThisgivespossibleMvaluesof1,1.5,2,2.5,or3.ThemostaccurateNand N_MODcanbecalculatedbysweepingthePandMinputsofthefollowingformulas: N=FLOOR{[(Fout/Fin)*(P*M)],1} N_MOD=ROUND{32*[((Fout)/Fin)*(P*M)-N],0} ThisshowsthatsettingM=1,N=39+1/16,P=5(i.e.PLL_M=0,PLL_N=39,PLL_N_MOD=2,& PLL_P=4) gives a comparison frequency of 1.536MHz, a VCO frequency of 60 MHz and an output frequency of 12.000 MHz.Thesamesettingscanbeusedtoget11.025from1.4112MHzfor44.1kHzsamplerates. Care must be taken when synchronization of isochronous data is not possible, i.e. when the PLL has to be used but an exact frequency match cannot be found. The I2S should be master on the LM49370 so that the data source can support appropriate SRC as required. This method should only be used with data being read on demandtoeliminatesampleratemismatchproblems. Where a system clock exists at an integer multiple of the required ADC or DAC clock rate it is preferable to use this rather than the PLL. The LM49370 is designed to work in 8, 12, 16, 24, 48 kHz modes from a 12 MHz clock and 8 kHz modes from a 13 MHz clock without the use of the PLL. This saves power and reduces clock jitter whichcanaffectSNR. PLLLoopFilter LM49370 requires a second or third order loop filter on PLL_FILT pin. LM49370 demoboard schematic has the recommendedvaluestouseforthesecondorderfilter.PleaserefertotheLM49370demoboardschematic. 22 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 ADC_1CONFIGURATIONREGISTER ThisregisterisusedtocontroltheLM49370'saudioADC. Table12.ADC_1(0x06h) Bits Field Description 0 MIC_SELECT IfsetthemicrophonepreampoutputisaddedtotheADCinputsignal. 1 CPI_SELECT IfsetthecellphoneinputisaddedtotheADCinputsignal. 2 LEFT_SELECT IfsettheleftstereobusisaddedtotheADCinputsignal. 3 RIGHT_SELECT IfsettherightstereobusisaddedtotheADCinputsignal. 5:4 ADC_SAMPLE ThisprogramstheclosestexpectedsamplerateofthemonoADC,whichisavariablerequiredbytheAGC _RATE algorithmwhenevertheAGCisinuse.ThisdoesnotsetthesamplerateofthemonoADC. ADC_SAMPLE_RATE SampleRate 00 8kHz 2 01 12kHz 2 10 16kHz 2 11 24kHz 2 7:6 HPF_MODE ThissetstheHPFoftheADC HPF-MODE HPFResponse 00 NoHPF 2 F =8kHz,−0.5dB@300Hz,Notch@55Hz S 01 F =12kHz,−0.5dB@450Hz,Notch@82Hz 2 S F =16kHz,−0.5dB@600Hz,Notch@110Hz S F =8kHz,−0.5dB@150Hz,Notch@27Hz S 10 F =12kHz,−0.5dB@225Hz,Notch@41Hz 2 S F =16kHz,−0.5dB@300Hz,Notch@55Hz S 11 NoHPF 2 ADC_2CONFIGURATIONREGISTER ThisregisterisusedtocontroltheLM49370'saudioADC. Table13.ADC_2(0x07h) Bit Field Description s 0 ADC_MODE ThissetstheoversamplingratiooftheADC MODE ADCOSR 0 125fs 1 128fs 1 ADC_MUTE Ifset,theanaloginputstotheADCaremuted. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 23 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com Table13.ADC_2(0x07h)(continued) Bit Field Description s 4:2 AGC_FRAME_TIME ThissetstheframetimetobeusedbytheAGCalgorithm.Inagivenframe,theAGC'speakdetector determinesthepeakvalueoftheincomingmicrophoneaudiosignalandcomparesthisvaluetothetarget valueoftheAGCdefinedbyAGC_TARGET(bits[3:1]ofregister(0x08h))inordertoadjustthemicrophone preamplifier'sgainaccordingly.AGC_FRAME_TIMEbasicallysetsthesamplerateoftheAGCtoadjustfora widevarietyofspeechpatterns. (1) AGC_FRAME_TIME Time(ms) 000 96 2 001 128 2 010 192 2 011 256 2 100 384 2 101 512 2 110 768 2 111 1000 2 6:5 ADC_CLK ThisselectstheclocktobeusedbytheaudioADCsystem. ADC_CLK Source 00 MCLK 2 01 PLL_OUTPUT 2 10 I2S_CLK_IN 2 11 PCM_CLK_IN 2 7 NGZXDD Ifset,thenoisegatewillnotwaitforazerocrossingbeforemute/unmuting.ThisbitshouldbesetiftheADC's HPFisdisabledandifthereisalargeDCorlowfrequencycomponentattheADCinput. NGZXDD Result 0 NoiseGateoperatesonZXDevents 1 NoiseGateoperatesonframeboundaries (1) RefertotheAGCOverviewforfurtherdetail. AGC_1CONFIGURATIONREGISTER ThisregisterisusedtocontroltheLM49370'sAutomaticGainControl. (2) Table14.AGC_1(0x08h) Bit Field Description s Ifset,theAGCcontrolstheanalogmicrophonepreamplifiergainintothesystem.Thisfeatureisusefulfor 0 AGC_ENABLE microphonesignalsthatareroutedtotheADC. 3:1 AGC_TARGET ThisprogramsthetargetleveloftheAGC.Thiswilldependontheexpectedtransientsanddesiredheadroom. RefertoAGC_TIGHT(bit7of0x09h)formoredetail. AGC_TARGET TargetLevel 000 −6dB 2 001 −8dB 2 010 −10dB 2 011 −12dB 2 100 −14dB 2 101 −16dB 2 110 −18dB 2 111 −20dB 2 Ifset,signalsbelowthenoisegatethresholdaremuted.Thenoisegateisonlyactivatedafterasetperiodof 4 NOISE_GATE_ON signalabsence. (2) SeetheAGCOverview. 24 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Table14.AGC_1(0x08h)(continued) Bit Field Description s 7:5 NOISE_ Thisfieldsetstheexpectedbackgroundnoiselevelrelativetothepeaksignallevel.Thesolepresenceof GATE_ signalsbelowthislevelwillnotresultinanAGCgainchangeoftheinputandwillbegatedfromtheADC THRES outputiftheNOISE_GATE_ONisset.Thislevelmustbesetevenifthenoisegateisnotinuseasitis requiredbytheAGCalgorithm. NOISE_GATE_THRES Level 000 −72dB 2 001 −66dB 2 010 −60dB 2 011 −54dB 2 100 −48dB 2 101 −42dB 2 110 −36dB 2 111 −30dB 2 AGC_2CONFIGURATIONREGISTER ThisregisterisusedtocontroltheLM49370'sAutomaticGainControl. Table15.AGC_2(0x09h) Bits Field Description 3:0 AGC_MAX_GAIN ThisprogramsthemaximumgainthattheAGCalgorithmcanapplytothemicrophonepreamplifier. AGC_MAX_GAIN MaxPreamplifierGain 0000 6dB 2 0001 8dB 2 0010 10dB 2 0011 12dB 2 0100 to1100 14dBto30dB 2 2 1101 32dB 2 1110 34dB 2 1111 36dB 2 6:4 AGC_DECAY ThisprogramsthespeedatwhichtheAGCwillincreasegainsifitdetectstheinputlevelisaquietsignal. AGC_DECAY StepTime(ms) 000 32 2 001 64 2 010 128 2 011 256 2 100 512 2 101 1024 2 110 2048 2 111 4096 2 Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 25 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com Table15.AGC_2(0x09h)(continued) Bits Field Description 7 AGC_TIGHT Ifset,theAGCalgorithmcontrolsthemicrophonepreamplifiermoreexactly. (1) AGC_TIGHT=0 AGC_TARGET MinLevel MaxLevel 000 −6dB −3dB 2 001 −8dB −4dB 2 010 −10dB −5dB 2 011 −12dB −6dB 2 100 −14dB −7dB 2 101 −16dB −8dB 2 110 −18dB −9dB 2 111 −20dB −10dB 2 AGC_TIGHT=1 000 −6dB −3dB 2 001 −8dB −5dB 2 010 −10dB −7dB 2 011 −12dB −9dB 2 100 −14dB −11dB 2 101 −16dB −13dB 2 110 −18dB −15dB 2 111 −20dB −17dB 2 (1) TheAGCcanbeusedtocontroltheanalogpathofthemicrophonetotheoutputstagesortooptimizethemicrophonepathfor recordingontheADC.Whentheanalogpathisusedthisbitshouldbesettoensurethetargetistightlyadheredto.IftheADCisthe onlydestinationofthemicrophoneorthedesiredanalogmixerlevelislinelevelthenAGC_TIGHTshouldbecleared,allowinggreater dynamicrageoftherecordedsignal.ForfurtherdetailsseetheAGCOverview. AGC_3CONFIGURATIONREGISTER ThisregisterisusedtocontroltheLM49370'sAutomaticGainControl. (2) Table16.AGC_3(0x0Ah) Bits Field Description 4:0 AGC_HOLDTIME ThisprogramstheamountofdelaybeforetheAGCalgorithmbeginstoadjustthegainofthemicrophone preamplifier. AGC_HOLDTIME No.ofspeechsegments 00000 0 2 00001 1 2 00010 2 2 00011 3 2 00100 to11100 4to28 2 2 11101 29 2 11110 30 2 11111 31 2 (2) SeetheAGCOverview. 26 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Table16.AGC_3(0x0Ah)(continued) Bits Field Description 7:5 AGC_ATTACK ThisprogramsthespeedatwhichtheAGCwillreducegainsifitdetectstheinputlevelistoolarge. AGC_ATTACK StepTime(ms) 000 32 2 001 64 2 010 128 2 011 256 2 100 512 2 101 1024 2 110 2048 2 111 4096 2 AGCOVERVIEW The Automatic Gain Control (AGC) system can be used to optimize the dynamic range of the ADC for voice data when the level of the source is unknown. A target level for the output is set so that any transients on the input won’t clip during normal operation. The AGC circuit then compares the output of the ADC to this level and increases or decreases the gain of the microphone preamplifier to compensate. If the audio from the microphone is to be output digitally through the ADC then the full dynamic range of the ADC can be used automatically. If the outputisthroughtheanalogmixerthentheADCisusedtomonitorthemicrophonelevel.Inthiscase,theanalog dynamic range is less important than the absolute level, so AGC_TIGHT should be set to tie transients closely to thetargetlevel. To ensure that the system doesn’t reduce the quality of the speech by constantly modulating the microphone preamplifier gain, the ADC output is passed through an envelope detector. This frames the output of the ADC into time segments roughly equal to the phonemes found in speech (AGC_FRAME_TIME). To calculate this, the circuit must also know the sample rate of the data from the ADC (ADC_SAMPLERATE). If after a programmable number of these segments (AGC_HOLDTIME), the level is consistently below target, the gain will be increased ataprogrammablerate(AGC_DECAY).Ifthesignaleverexceedsthetargetlevel(AGC_TARGET)thenthegain ofthemicrophoneisreducedimmediatelyataprogrammablerate(AGC_ATTACK).Thisisdemonstratedbelow: (1) Decay hold time, (2) Slow Decay, (3) Quick Attack (2) (3) (1) target level peak detection and ADC output attack decay microphone gain 12 dB 14 dB 12 dB 10 dB signal below target signal above target Figure15. AGCOperationExample Thesignalintheaboveexamplestartswithasmallanaloginputwhich,aftertheholdtimehastimedout,triggers a rise in the gain [(1) → (2)]. After some time the real analog input increases and it reaches the threshold for a gain reduction which decreases the gain at a faster rate [(2) → (3)] to allow the elimination of typical popping noises. Only ADC outputs that are considered signal (rather than noise) are used to adjust the microphone preamplifier gain. The signal to noise ratio of the expected input signal is set by NOISE_GATE_THRESHOLD. In some situations it is preferable to remove audio considered to be consisting solely of background noise from the audio output; for example conference calls. This can be done by setting NOISE_GATE_ON. This does not affect the performanceoftheAGCalgorithm. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 27 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com The AGC algorithm should not be used where very large background noise is present. If the type of input data, application and microphone is known then the AGC will typically not be required for good performance, it is intended for use with inputs with a large dynamic range or unknown nominal level. When setting NOISE_GATE_THRESHOLD be aware that in some mobile phone scenarios the ADC SNR will be dictated by the microphone performance rather than the ADC or the signal. Gain changes to the microphone are performed on zero crossings. To eliminate DC offsets, wind noise, and pop sounds from the output of the ADC, the ADC's HPFshouldalwaysbeenabled. MIC_1CONFIGURATIONREGISTER Thisregisterisusedtocontrolthemicrophoneconfiguration. Table17.MIC_1(0x0Bh) Bits Field Description 3:0 PREAMP_GAIN ThisprogramsthegainappliedtothemicrophonepreamplifieriftheAGCisnotinuse. PREAMP_GAIN Gain 0000 6dB 2 0001 8dB 2 0010 10dB 2 0011 12dB 2 0100 to1100 14dBto30dB 2 2 1101 32dB 2 1110 34dB 2 1111 36dB 2 4 MIC_MUTE Ifset,themicrophonepreamplifierismuted. 5 INT_SE_DIFF Ifset,theinternalmicrophoneisassumedtobesingleendedandthenegativeconnectionisconnectedtothe ADCcommonmodepointinternally.Thisallowsasingle-endedinternalmicrophonetobeused. 6 INT_EXT Ifset,thesingleendedexternalmicrophoneisusedandthenegativemicrophoneinputisgroundedinternally, otherwiseinternalmicrophoneoperationisassumed. (1) (1) OnchangingINT_EXTfrominternaltoexternalnotethatthedcblockingcapwillnotbechargedsosometimeshouldbetaken(300ms fora1µFcap)betweenthedetectionofanexternalheadsetandtheswitchingoftheoutputstagesandADCtothatinputtoallowthe DCpointsoneithersideofthiscaptostabilize.Thiscanbeaccomplishedbydeselectingthemicrophoneinputfromtheaudiooutputs andADCuntiltheDCpointsstabilize.AnactiveMICpathtoCPOUTortheADCmayresultinthemicrophoneDCblockingcaps causingaudiopopsunderthefollowingsituations:1)Switchingbetweeninternalandexternalmicrophoneoperationwhileinchipmodes '10'or'11'.2)Togglinginandoutofpowerdown/standbymodes.3)Togglingbetweenchipmodes'10'and'11'wheneverexternal microphoneoperationisselected.4)Theinsertion/removalofaheadsetwhileinchipmodes'10'or'11'wheneverexternalmicrophone operationisselected.Toavoidthesepotentialpopissues,itisrecommendedtodeselectthemicrophoneinputfromCPOUTandADC untiltheDCpointsstabilize. MIC_2CONFIGURATIONREGISTER Thisregisterisusedtocontrolthemicrophoneconfiguration. Table18.MIC_2(0x0Ch) Bits Field Description 0 OCL_ Thisselectsthevoltageusedasvirtualground(HP_VMIDpin)inOCLmode.Thiswilldependonthe VCM_ availablesupplyandthepoweroutputrequirementsoftheheadphoneamplifiers. VOLTAGE OCL_VCM_VOLTAGE Voltage 0 1.2V 1 1.5V 28 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Table18.MIC_2(0x0Ch)(continued) Bits Field Description 2:1 MIC_ Thisselectsthevoltageasareferencetotheinternalandexternalmicrophones.Onlyonebiaspinisdriven BIAS_ atoncedependingontheINT_EXTbitsettingfoundintheMIC_1(0x0Bh)register.MIC_BIAS_VOLTAGE VOLTAGE shouldbesetto'11'onlyifA_V >3.4V.InOCLmode,MIC_BIAS_VOLTAGE='00'(EXT_BIAS=2.0V) DD shouldnotbeusedtogeneratetheEXT_BIASsupplyforacellularheadsetexternalmicrophone.Pleaserefer toTable19formoredetail. MIC_BIAS_VOLTAGE EXT_BIAS/INT_BIAS 00 2.0V 2 01 2.5V 2 10 2.8V 2 11 3.3V 2 3 BUTTON_TYPE Ifset,theLM49370assumesthatthebutton(ifused)intheheadsetisinseries(seriespushbutton)withthe microphone,openingthecircuitwhenpressed.Thedefaultisforthebuttontobeinparallel(parallelpush button),shortingoutthemicrophonewhenpressed. 5:4 BUTTON_ Thissetsthetimeusedfordebouncingthepushingofthebuttononaheadsetwithaparallelpushbutton. DEBOUNCE_ BUTTON_DEBOUNCE_TIME Time(ms) TIME 00 0 2 01 8 2 10 16 2 11 32 2 In OCL mode there is a trade-off between the external microphone supply voltage (EXT_MIC_BIAS - OCL_VCM_ VOLTAGE) and the maximum output power possible from the headphones. A lower OCL_VCM_VOLTAGE gives a higher microphone supply voltage but a lower maximum output power from the headphoneamplifiersduetothelowerOCL_VCM_VOLTAGE-A_V . SS Table19.ExternalMICSupplyVoltagesinOCLMode Available Recommended SupplytoMicrophone A_V EXT_MIC_BIAS DD OCL_VCM_VOLT=1.5V OCL_VCM_VOLT=1.2V >3.4V 3.3V 1.8V 2.1V 2.9Vto3.4V 2.8V 1.3V 1.6V 2.8Vto2.9V 2.5V 1.0V 1.3V 2.7Vto2.8V 2.5V - 1.3V Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 29 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com SIDETONEATTENUATIONREGISTER Thisregisterisusedtocontroltheanalogsidetoneattenuation. (1) Table20.SIDETONE(0x0Dh) Bits Field Description 3:0 SIDETONE_ Thisprogramstheattenuationappliedtothemicrophonepreampoutputtoproduceasidetonesignal. ATTEN SIDETONE_ATTEN Attenuation 0000 -Inf 2 0001 −30dB 2 0010 −27dB 2 0011 −24dB 2 0100 −21dB 2 0101 to1010 −18dBto−3dB 2 2 1011 to1111 0dB 2 2 (1) AnactiveSIDETONEpathtoanaudiooutputmayresultinthemicrophoneDCblockingcapscausingaudiopopsunderthefollowing situations:1)Switchingbetweeninternalandexternalmicrophoneoperationwhileinchipmodes'10'or'11'.2)Togglinginandoutof powerdown/standbymodes.3)Togglingbetweenchipmodes'10'and'11'wheneverexternalmicrophoneoperationisselected.4)The insertion/removalofaheadsetwhileinchipmodes'10'or'11'wheneverexternalmicrophoneoperationisselected.Toavoidpotential popnoises,itisrecommendedtosetSIDETONE_ATTENto'0000'untilDCpointshavestabilizedwhenevertheSIDETONEpathis used. CP_INPUTCONFIGURATIONREGISTER Thisregisterisusedtocontrolthedifferentialcellphoneinput. Table21.CP_INPUT(0x0Eh) Bits Field Description 4:0 CPI_LEVEL Thisprogramsthegain/attenuationappliedtothecellphoneinput. CPI_LEVEL Level 00000 −34.5dB 2 00001 −33dB 2 00010 −31.5dB 2 00011 −30dB 2 00100to11100 −28.5dBto+7.5dB 2 11101 +9dB 2 11110 +10.5dB 2 11111 +12dB 2 5 CPI_MUTE Ifset,theCPIinputismutedatsource. 30 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 AUX_LEFTCONFIGURATIONREGISTER Thisregisterisusedtocontroltheleftauxanaloginput. Table22.AUX_LEFT(0x0Fh) Bits Field Description 4:0 AUX_ Thisprogramsthegain/attenuationappliedtotheAUXLEFTanaloginputtothemixer. (1) LEFT_ AUX_LEFT_LEVEL Level(WithBoost) Level(WithoutBoost) LEVEL 00000 −34.5dB −46.5dB 2 00001 −33dB −45dB 2 00010 −31.5dB −43.5dB 2 00011 −30dB −42dB 2 00100to11100 −28.5dBto+7.5dB −40.5dBto−4.5dB 2 11101 +9dB −3dB 2 11110 +10.5dB −1.5dB 2 11111 +12dB 0dB 2 5 AUX_ Ifset,thegainoftheAUX_LEFTinputtothemixerisincreasedby12dB(seeabove). LEFT_ BOOST 6 AUX_L_MUTE Ifset,theAUXLEFTinputismuted. 7 AUX_OR_DAC_L Ifset,theAUXLEFTinputispassedtothemixer,thedefaultisfortheDACLEFToutputtobepassedtothe mixer. (1) Therecommendedmixerlevelis1VRMS.Theauxiliaryanaloginputscanbeboostedby12dBifenoughheadroomisavailable. Clippingmayoccuriftheanalogpowersupplyisinsufficienttocaterfortherequiredgain. AUX_RIGHTCONFIGURATIONREGISTER Thisregisterisusedtocontroltherightauxanaloginput. Table23.AUX_RIGHT(0x10h) Bits Field Description 4:0 AUX_ Thisprogramsthegain/attenuationappliedtotheAUXRIGHTanaloginputtothemixer. (1) RIGHT_ AUX_RIGHT_LEVEL Level(WithBoost) Level(WithoutBoost) LEVEL 00000 −34.5dB −46.5dB 2 00001 −33dB −45dB 2 00010 −31.5dB −43.5dB 2 00011 −30dB −42dB 2 00100to11100 −28.5dBto+7.5dB −40.5dBto−4.5dB 2 11101 +9dB −3dB 2 11110 +10.5dB −1.5dB 2 11111 +12dB 0dB 2 5 AUX_ Ifset,thegainoftheAUX_RIGHTinputtothemixerisincreasedby12dB(seeabove). RIGHT_BOOST 6 AUX_R_MUTE Ifset,theAUXRIGHTinputismuted. 7 AUX_OR_DAC_R Ifset,theAUXRIGHTinputispassedtothemixer,thedefaultisfortheDACRIGHToutputtobepassedto themixer. (1) Therecommendedmixerlevelis1VRMS.Theauxiliaryanaloginputscanbeboostedby12dBifenoughheadroomisavailable. Clippingmayoccuriftheanalogpowersupplyisinsufficienttocaterfortherequiredgain. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 31 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com DACCONFIGURATIONREGISTER ThisregisterisusedtocontroltheDAClevelstothemixer. Table24.DAC(0x11h) Bits Field Description 4:0 DAC_LEVEL Thisprogramsthegain/attenuationappliedtotheDACinputtothemixer. (1) DAC_LEVEL Level(WithBoost) Level(WithoutBoost) 00000 −34.5dB −46.5dB 2 00001 −33dB −45dB 2 00010 −31.5dB −43.5dB 2 00011 −30dB −42dB 2 00100to11100 −28.5dBto+7.5dB −40.5dBto−4.5dB 2 11101 +9dB −3dB 2 11110 +10.5dB −1.5dB 2 11111 +12dB 0dB 2 5 DAC_BOOST Ifset,thegainoftheDACinputstothemixerisincreasedby12dB(seeabove). 6 DAC_MUTE Ifset,thestereoDACinputismutedonthenextzerocrossing. 7 USE_AUX_ Ifset,thegainoftheDACinputsiscontrolledbytheAUX_LEFTandAUX_RIGHTregisters,allowingastereo LEVELS balancetobeapplied. (1) TheoutputfromtheDACis1VRMSforafullscaledigitalinput.Thiscanbeboostedby12dBifenoughheadroomisavailable. Clippingmayoccuriftheanalogpowersupplyisinsufficienttocaterfortherequiredgain. CP_OUTPUTCONFIGURATIONREGISTER Thisregisterisusedtocontrolthedifferentialcellphoneoutput.(2) Table25.CP_OUTPUT(0x12h) Bit Field Description s 0 MIC_SELECT Ifset,themicrophonechannelofthemixerisaddedtotheCP_OUToutputsignal. 1 RIGHT_SELECT Ifset,therightchannelofthemixerisaddedtotheCP_OUToutputsignal. 2 LEFT_SELECT Ifset,theleftchannelofthemixerisaddedtotheCP_OUToutputsignal. 3 CPO_MUTE Ifset,theCPOUToutputismuted. 4 MIC_NOISE_GAT IfthisissetandNOISE_GATE_ON(register0x08h)isenabled,theMICtoCPOpathwillbegatedifthesignalis E determinedtobenoisebytheAGC(thatis,ifthesignalisbelowthesetnoisethreshold). (2) Thegainofcellphoneoutputamplifieris0dB. AUX_OUTPUTCONFIGURATIONREGISTER Thisregisterisusedtocontrolthedifferentialauxiliaryoutput. (1) Table26.AUX_OUTPUT(0x13h) Bits Field Description 0 CPI_SELECT Ifset,thecellphoneinputchannelofthemixerisaddedtotheAUX_OUToutputsignal. 1 RIGHT_SELECT Ifset,therightchannelofthemixerisaddedtotheAUX_OUToutputsignal. 2 LEFT_SELECT Ifset,theleftchannelofthemixerisaddedtotheAUX_OUToutputsignal. 3 AUX_MUTE Ifset,theAUX_OUToutputismuted. (1) Thegainoftheauxiliaryoutputamplifieris0dB.Ifasecond(external)loudspeakeramplifieristobeuseditsgainshouldbesetto12 dBtomatchtheonboardloudspeakeramplifiergain. 32 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 LS_OUTPUTCONFIGURATIONREGISTER Thisregisterisusedtocontroltheloudspeakeroutput.(1) Table27.LS_OUTPUT(0x14h) Bits Field Description 0 CPI_SELECT Ifset,thecellphoneinputchannelofthemixerisaddedtotheloudspeakeroutputsignal. 1 RIGHT_SELECT Ifset,therightchannelofthemixerisaddedtotheloudspeakeroutputsignal. 2 LEFT_SELECT Ifset,theleftchannelofthemixerisaddedtotheloudspeakeroutputsignal. 3 LS_MUTE Ifset,theloudspeakeroutputismuted. 4 RSVD Reserved. (1) Thegainoftheloudspeakeroutputamplifieris12dB. HP_OUTPUTCONFIGURATIONREGISTER Thisregisterisusedtocontrolthestereoheadphoneoutput.(1) Table28.HP_OUTPUT(0x15h) Bits Field Description 0 SIDETONE_SELECT Ifset,thesidetonechannelofthemixerisaddedtobothoftheheadphoneoutputsignals. 1 CPI_SELECT Ifset,thecellphoneinputchannelofthemixerisaddedtobothoftheheadphoneoutputsignals. 2 RIGHT_SELECT Ifset,therightchannelofthemixerisaddedtotheheadphoneoutput.IftheSTEREObit(0x00h)isset, therightchannelisaddedtotherightheadphoneoutputsignalonly.IftheSTEREObit(0x00h)is cleared,itisaddedtoboththerightandleftheadphoneoutputsignals. 3 LEFT_SELECT Ifset,theleftchannelofthemixerisaddedtotheheadphoneoutput.IftheSTEREObit(0x00h)isset, theleftchannelisaddedtotheleftheadphoneoutputsignalonly.IftheSTEREObit(0x00h)iscleared,it isaddedtoboththerightandleftheadphoneoutputsignals. 4 HP_MUTE Ifset,theheadphoneoutputismuted. 5 STEREO Ifset,themixersassumethatthesignalsontheleftandrightinternalbussesarehighlycorrelatedand whenthesesignalsarecombinedtheirlevelsarereducedby6dBtoallowenoughheadroomforthemto besummed. 6 OCL Ifset,thepartisplacedinOCL(OutputCapacitorLess)mode. (1) Thegainoftheheadphoneoutputamplifieris–6dBforthecellphoneinputchannelandsidetonechannelofthemixer.Whenthe STEREObit(0x00h)isset,headphoneoutputamplifiergainis–6dBfortheleftandrightchannel.WhentheSTEREObit(0x00h)is cleared,theheadphoneoutputamplifiergainis–12dBfortheleftandrightchannel(toallowenoughheadroomforaddingthemand routingthemtobothheadphoneamplifiers). EP_OUTPUTCONFIGURATIONREGISTER Thisregisterisusedtocontrolthemonoearpieceoutput.(1) Table29.EP_OUTPUT(0x16h) Bits Field Description 0 SIDETONE_SELECT Ifset,thesidetonechannelofthemixerisaddedtotheearpieceoutputsignal. 1 CPI_SELECT Ifset,thecellphoneinputchannelofthemixerisaddedtotheearpieceoutputsignal. 2 RIGHT_SELECT Ifset,therightchannelofthemixerisaddedtotheearpieceoutputsignal. 3 LEFT_SELECT Ifset,theleftchannelofthemixerisaddedtotheearpieceoutputsignal. 4 EP_MUTE Ifset,theearpieceoutputismuted. (1) Thegainoftheearpieceoutputamplifieris6dB. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 33 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com DETECTCONFIGURATIONREGISTER Thisregisterisusedtocontroltheheadsetdetectionsystem. Table30.DETECT(0x17h) Bits Field Description 0 DET_INT Ifset,anIRQisraisedwhenachangeisdetectedintheheadsetstatus.ClearingthisbitwillclearanIRQ thathasbeentriggeredbytheheadsetdetect. 1 BTN_INT Ifset,anIRQisraisedwhentheheadsetbuttonispressed.ClearingthisbitwillclearanIRQthathasbeen triggeredbyabuttonevent. 2 TEMP_INT Ifset,anIRQisraisedduringatemperatureevent.TheLM49370willstillautomaticallycycletheclassAB poweramplifiersoffiftheinternaltemperatureistoohigh.ThisbitshouldnotbesetwhenevertheclassD amplifieristurnedon.ClearingthisbitwillclearanIRQthathasbeentriggeredbyatemperatureevent. 6:3 HS_ Thissetsthetimeusedfordebouncingtheanalogsignalsfromthedetectioninputsusedtosensethe DBNC_TIME insertion/removalofaheadset. HS_DBNC_TIME Time(ms) 0000 0 2 0001 8 2 0010 16 2 0011 32 2 0100 48 2 0101 64 2 0110 96 2 0111 128 2 1000 192 2 1001 256 2 1010 384 2 1011 512 2 1100 768 2 1101 1024 2 1110 1536 2 1111 2048 2 HEADSETDETECTOVERVIEW The LM49370 has built in monitors to automatically detect headset insertion or removal. The detection scheme can differentiate between mono, stereo, mono-cellular and stereo-cellular headsets. Upon detection of headset insertion or removal, the LM49370 updates read-only bit 0 - headset absence/presence, bit 1- mono/stereo headset and bit 2 - headset without mic / with mic, of the STATUS register (0x18h). Headset insertion/removal and headset type can also be detected in standby mode; this consumes no analog supply current when the headsetisabsent. The LM49370 can be programmed to raise an interrupt (set the IRQ pin high) when headset insert/removal is sensed by setting bit 0 of DETECT (0x17h). When headset detection is enabled in active mode and a headset is not detected, the HPL_OUT and HPR_OUT amplifiers will be disabled (switched off for capless mode and muted for AC-coupled mode) and the EXT_BIAS pin will be disconnected from the MIC_BIAS amplifier, irrespective of controlregistersettings. 34 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 The LM49370 also has the capability to detect button press, when a button is present on the headset microphone. Both parallel button-type (in parallel with the headset microphone, default value) and series button- type (in series with the headset microphone) can be detected; the button type used needs to be defined in bit 3 of MIC_2 (0x0Ch). Button press can also be detected in stand-by mode; this consumes 10 µA of analog supply current for a series type push button and 100 µA for a parallel type push button. Upon button press, the LM49370 updates bit 3 of STATUS (0x18h). In active OCL mode, with internal microphone selected (INT_EXT = 0; (reg 0x0Bh)), if a parallel pushbutton headset is inserted into the system, INT_EXT must be set high before BTN (bit 3 of STATUS (0x18h)) can be read. The LM49370 can also be programmed to raise an interrupt on the IRQpinwhenbuttonpressissensedbysettingbit1ofDETECT(0x17h). The LM49370 provides debounce programmability for headset and button detect. Debounce programmability can be used to reject glitches generated, and hence avoid false detection, while inserting/removing a headset or pressingabutton. Headset insert/removal debounce time is defined by HS_DBNC_TIME; bits 6:3 of DETECT (0x17h). Parallel buttonpressdebouncetimeisdefinedbyBTN_DBNC_TIME;bits5:4ofMIC_2(0x0Ch). Note that since the first effect of a series button press (microphone disconnected) is indistinguishable from headsetremoval,thedebouncetimeforseriesbuttonpressindefinedbyHS_DBNC_TIME. Headset and push button detection can be enabled by setting CHIP_MODE 0; bit 0 of BASIC (0x00h). For reliableheadset/pushbuttondetectionallfollowingbitsshouldbedefinedbeforeenablingtheheadsetdetection system: 1. theOCL-bit(AC-Coupled/Caplessheadphoneinterface(bit6ofHP_OUTPUT(0x15h)) 2. theheadsetinsert/removaldebouncesettings(bit6:3ofDETECT(0x17h)) 3. theBTN_TYPE-bit(Parallel/Seriespushbuttontype(bit3ofMIC_2(0x0Ch)) 4. theparallelpushbuttondebouncesettings(bit5:4ofMIC_2(0x0Ch)) Figure16showsterminalconnectionsandjackconfigurationforvariousheadsets.Careshouldbetakentoavoid anyDCpathfromtheMIC_DETpintogroundwhenaheadsetisnotinserted. s s s g g g s s : : 7 7 4 4 m m Stereo + g m s s Cellular g m s Stereo g s s Cellular s s g g s m m Stereo + g m s s Cellular g m s Cellular Figure16. HeadsetConfigurationsSupportedbytheLM49370 Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 35 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com ThewiringoftheheadsetjacktotheLM49370willdependontheintendedmodeoftheheadphoneamplifier: EXT_MIC_BIAS 3.3/2.8/2.5V 2.2 k: MIC_DET EXT_MIC Stereo g s s 1 PF 0 7 HP_L 93 Cellular g m s M4 L HP_R Stereo + g m s s Cellular m = mic HP_VMID_FB s = speaker g = virtual ground HP_VMID 1.2/1.5V Connection for OCL Mode (DC-Coupled) Headset Detection EXT_MIC_BIAS 2.0/2.5V 2.2 k: MIC_DET EXT_MIC Stereo g s s 1 PF HP_L 70 3 Cellular g m s 47 PF 49 M HP_R L Stereo + Cellular g m s s 47 PF m = mic HP_VMID_FB s = speaker 1 k: g = ground (A_VSS) HP_VMID 1 k: A_VDD/2 Connection for Non-OCL Mode (AC-Coupled) Headset Detection Figure17. ConnectionofHeadsetJacktoLM49370DependsontheModeoftheHeadphoneAmplifier. In non-OCL mode, two 1kΩ resistors are optional and not needed if chip is active without headset event detection in Basic Register (0x00h) bits 1:0. If chip is active with headset event detection, these two resistors set an internal threshold voltage for a comparator that produces the headphone detect pulse. The value of these shouldbe1kΩ withtoleranceof±10%orbetter. STATUSREGISTER Thisregisterisusedtoreportthestatusofthedevice. Table31.STATUS(0x18h)(1)(2) Bits Field Description 0 HEADSET Thisfieldishighwhenheadsetpresenceisdetected(onlyvalidifthedetectionsystemisenabled).(1) 1 STEREO_ Thisfieldishighwhenaheadsetwithstereospeakersisdetected(onlyvalidifthedetectionsystemis HEADSET enabled). (1) 2 MIC Thisfieldishighwhenaheadsetwithamicrophoneisdetected(onlyvalidifthedetectionsystemis enabled).(1) (1) ThedetectionIRQisclearedwhenthisregisterhasbeenwrittento. (2) ThisfieldisclearedwhenevertheSTATUS(0x18h)registerhasbeenwrittento. 36 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Table31.STATUS(0x18h)(1)(2) (continued) Bits Field Description 3 BTN Thisfieldishighwhenthebuttonontheheadsetispressed(onlyvalidifthedetectionsystemisenabled). IRQisclearedwhenthebuttonhasbeenreleasedandthisregisterhasbeenwrittento. (2) 4 TEMP Ifthisfieldishighthenatemperatureeventhasoccurred(writetothisregistertoclearIRQ).Thisfieldwill stayhighevenwhentheIRQisclearedsolongastheeventoccurs.Thisbitisonlyvalidwheneverthe loudspeakeramplifieristurnedoff. (2) 5 GPIN1 WhenGPIO_SELissettoareadableconfigurationadigitalinputonGPIO1canbereadbackhere. 6 GPIN2 WhenGPIO_SELissettoareadableconfiguration,adigitalinputontherelevantGPIOcanbereadback here. 3DCONFIGURATIONREGISTER Thisregisterisusedtocontroltheconfigurationofthe3Dcircuit. Table32.3D(0x19h) Bits Field Description 0 3D_ENB Settingthisbitenablesthe3Deffect.Whenclearedtozero,the3Deffectisdisabledandthe3Dmodule thenpassestheI2SleftandrightchannelinputstotheDACunchanged.ThestereoAUXinputsare unaffectedbythe3Dmodule. 1 3D_TYPE Thisbitselectsbetweentype1andtype23Dsoundeffect.Clearingthisbittozeroselectstype1effectand settingittooneselectstype2. Type1:Rout=Ri-G*Lout3d,Lout=Li-G*Rout3d Type2:Rout=-Ri-G*Lout3d,Lout=Li+G*Rout3d where, Ri=RightI2Schannelinput Li=LeftI2Schannelinput G=3Dgainlevel(Mixratio) Rout3d=Rifilteredthroughahigh-passfilterwithacornerfrequencycontrolledbyFREQ Lout3d=Lifilteredthroughahigh-passfilterwithacornerfrequencycontrolledbyFREQ 3:2 LEVEL Thisprogramsthelevelof3Deffectthatisapplied. LEVEL 00 25% 2 01 37.5% 2 10 50% 2 11 75% 2 5:4 FREQ ThisprogramstheHPFrolloff(-3dB)frequencyofthe3Deffect. FREQ 00 0Hz 2 01 300Hz 2 10 600Hz 2 11 900Hz 2 6 ATTENUATE Clearingthisbittozeromaintainstheleveloftheleftandrightinputchannelsattheoutput.Settingthisbit tooneattenuatestheoutputlevelby50%. Thismaybeappropriateforhighlevelaudioinputswhentype23Deffectisused.Type2effectinvolves addingthesamepolarityofleftandrightinputstogivethefinaloutputs.Type2effecthasthepotentialfor creatingaclippingcondition,howeverthisbitoffersanalternativetoclipping. 7 CUST_COMP Ifset,theDACcompensationfiltermaybeprogrammedbytheuserthroughregisters(0x20h)to(0x25h). Otherwise,thedefaultsareused. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 37 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com I2SPORTMODECONFIGURATIONREGISTER Thisregisterisusedtocontroltheaudiodatainterfaces. Table33.I2SMode(0x1Ah) Bit Field Description s 0 I2S_OUT_ENB Ifset,theI2Soutputbusisenabled.Ifcleared,theI2SoutputwillbetristateandallRXclockswillbe gated. 1 I2S_IN_ENB Ifset,theI2Sinputisenabled.Ifthisbitcleared,theI2SinputisignoredandallTXclocksgated. 2 I2S_MODE ThisprogramstheformatoftheI2Sinterface. Definition 0 Normal 1 LeftJustified 3 I2S_STEREO_REVERSE Ifset,theleftandrightchannelsarereversed. Operation 0 Normal 1 Reversed 4 I2S_WS_MS Ifset,I2S_WSgenerationisenabledandisMaster.Ifcleared,I2S_WSactsasslave. 6:5 I2S_WS_GEN_MODE ThisprogramstheI2Swordlength. Bits/Word 00 16 2 01 25 2 10 32 2 11 — 2 7 I2S_WORD_ORDER ThisbitalterstheRXphasingofleftandrightchannels.Ifthisbitiscleared:rightthenleft.Ifthisbitis set:leftthenright. ADC_CLOCK I2S I2S_CLK_OUT CLKGEN DAC_CLOCK I2S_CLK_IN I2S_CLK I2S I2S_WS_OUT WSGEN I2S_WS I2S_WS_IN Figure18. I2SAudioPortCLOCK/SYNCOptions I2SPORTCLOCKCONFIGURATIONREGISTER Thisregisterisusedtocontroltheaudiodatainterfaces. Table34.I2SClock(0x1Bh) Bit Field Description s 0 I2S_CLOCK_MS Ifset,thenI2SclockgenerationisenabledandisMaster.Ifthisbitiscleared,thentheI2Sclockisdriven bythedeviceslave. 1 I2S_CLOCK_SOURCE ThisselectsthesourceoftheclocktobeusedbytheI2Sclockgenerator. I2S_CLOCK_SOURCE Clockissourcefrom 0 DAC(fromRdivider) 1 ADC(fromQdivider) 38 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Table34.I2SClock(0x1Bh)(continued) Bit Field Description s 5:2 I2S_CLOCK_GEN_MODE ThisprogramsaclockdividerthatdividestheclockdefinedbyI2S_CLOCK_SOURCE.Thisdivided clockisusedtogenerateI2S_CLKinMastermode.(1) Value DivideBy Ratio 0000 1 2 0001 2 2 0010 4 2 0011 6 2 0100 8 2 0101 10 2 0110 16 2 0111 20 — 2 1000 2.5 2/5 2 1001 3 1/3 2 1010 3.90625 32/125 2 1011 5 25/125 2 1100 7.8125 16/125 2 1101 — — 2 1110 — — 2 1111 — — 2 7:6 PCM_SYNC_WIDTH ThisprogramsthewidthofthePCMsyncsignal. GeneratedSYNCLookslike: 00 1bit(UsedforShortPCMModes) 2 01 4bits(UsedforLongPCMModes) 2 10 8bits(UsedforLongPCMModes) 2 11 15bits(UsedforLongPCMModes) 2 Shouldnotbesetifthebits/wordislessthan16. (1) ForDAC_MODE='00','10','11',DAC_CLOCKistheclockattheoutputoftheRdivider.ForDAC_MODE='01',DAC_CLOCKisa dividedbytwoversionoftheclockattheoutputoftheRdivider. DIGITALAUDIODATAFORMATS I2S master mode can only be used when the DAC is enabled unless the FORCE_RQ bit is set. PCM Master mode can only be used when the ADC is enabled, unless the FORCE_RQ bit is set. If the PCM receiver interface is operated in slave mode the clock and sync should be enabled at the same time because the PCM receiver uses the first PCM frame to calculate the PCM interface format. This format can not be changed unless a soft reset is issued. Operating the LM49370 in master mode eliminates the risk of sample rate mismatch betweenthedataconvertersandtheaudiointerfaces. Inslavemode,thePCMandI2Sreceiversonlyrecordthe1st16and18bitsoftheserialwordsrespectively.The I2SandPCMformatsareasfollowed: I2S_CLK I2S_WS I2S_SDO/ 0 24 23 22 21 3 2 1 0 24 23 22 21 3 2 1 0 24 I2S_SDI Left Word Right Word Figure19. I2SSerialDataFormat(DefaultMode) Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 39 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com I2S_CLK I2S_WS I2S_SDO/ 0 24 23 22 21 3 2 1 0 24 23 22 21 3 2 1 0 24 I2S_SDI Left Word Right Word Figure20. I2SSerialDataFormat(LeftJustified) PCM_CLK PCM_SYNC PCM_SDO/ 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 PCM_SDI Short frame sync mode (PCM_SYNC_WIDTH = '00') Long frame sync mode (PCM_SYNC_WIDTH = '11') Figure21. PCMSerialDataFormat(16bitSlaveExample) PCMPORTMODECONFIGURATIONREGISTER Thisregisterisusedtocontroltheaudiodatainterfaces. Table35.PCMMODE(0x1Ch) Bits Field Description 0 PCM_OUT_ENB Ifset,thePCMoutputbusisenabled.Ifthisbitiscleared,thrPCMoutputwillbetristateandallRX clockswillbegated. 1 PCM_IN_ENB Ifset,thePCMinputisenabled.Ifthisbitiscleared,thePCMinputisignoredandTXclocksare generated. 3 PCM_CLOCK_SOURCE DACorADCClock0=DAC,1=ADC (1) 4 PCM_SYNC_MS Ifset,PCM_SYNCgenerationisenabledandisdrivenbythedevice(Master). 5 PCM_SDO_LSB_HZ Ifset,whenthePCMporthasrunoutofbitstotransmit,itwilltristatetheSDOoutput. 6 PCM_COMPAND Ifset,thedatasenttothePCMportiscompandedandthePCMdatareceivedbythePCMreceiver istreatedascompandeddata. 7 PCM_ALAW_μLAW IfPCM_COMPANDisset,thenthedataacrossthePCMinterfacetotheDACandfromtheADCis compandedasfollows: PCM_ALAW_μLAW CommandingType 0 μ-LAW 1 A-Law (1) ForDAC_MODE='00','10','11',DAC_CLOCKistheclockattheoutputoftheRdivider.ForDAC_MODE='01',DAC_CLOCKisa dividedbytwoversionoftheclockattheoutputoftheRdivider. 40 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 ADC_CLOCK PCM PCM_CLK_OUT CLKGEN DAC_CLOCK PCM_CLK_IN PCM_CLOCK PCM PCM_SYNC_OUT SYNCGEN PCM_SYNC PCM_SYNC_IN Figure22. PCMAudioPortCLOCK/SYNCOptions PCMPORTCLOCKCONFIGURATIONREGISTER Thisregisterisusedtocontroltheconfigurationofaudiodatainterfaces. Table36.PCMClock(0x1Dh) Bits Field Description 3:0 PCM_CLOCK_ ThisprogramsaclockdividerthatdividestheclockdefinedbyPCM_CLOCK_SOURCEreg(0x1Ch). GEN_MODE ThedividedclockisusedtogeneratePCM_CLKinMastermode. (1) Value DivideBy Ratio 0000 1 2 0001 2 2 0010 4 2 0011 6 2 0100 8 2 0101 10 2 0110 16 2 0111 20 — 2 1000 2.5 2/5 2 1001 3 1/3 2 1010 3.90625 32/125 2 1011 5 25/125 2 1100 7.8125 16/125 2 1101 — — 2 1110 — — 2 1111 — — 2 6:4 PCM_SYNC_MODE ThisprogramsaclockdividerthatdividesPCM_CLK.Thedividedclockisusedtogenerate PCM_SYNC. Valve DivideBy 000 8 2 001 16 2 010 25 2 011 32 2 100 64 2 101 128 2 110 — 2 111 — 2 (1) ForDAC_MODE='00','10','11',DAC_CLOCKistheclockattheoutputoftheRdivider.ForDAC_MODE='01',DAC_CLOCKisa dividedbytwoversionoftheclockattheoutputoftheRdivider. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 41 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com SRCCONFIGURATIONREGISTER ThisregisterisusedtocontroltheconfigurationoftheDigitalRoutinginterfaces. (2) Table37.Bridges(0x1Eh) Bits Field Description 0 PCM_TX_SEL ThiscontrolsthedatasenttothePCMtransmitter. PCM_TX_SEL Source 0 ADC 1 MONOSUMCircuit 2:1 I2S_TX_SEL ThiscontrolsthedatasenttotheI2Stransmitter. I2S_TX_SEL Source 00 ADC 2 01 PCMReceiver 2 10 DACInterpolator(oversampled) 2 11 Disabled 2 4:3 DAC_INPUT_SEL ThiscontrolsthedatasenttotheDAC. DAC_INPUT_SEL Source 00 I2SReceiver(Instereo) 2 01 PCMReceiver(DualMono) 2 10 ADC 2 11 Disabled 2 5 MONO_SUM_SEL ThiscontrolsthedatasenttotheStereotoMonoConverter MONO_SUM_SEL Source 0 DACInterpolatedOutput 1 I2SReceiverOutput 7:6 MONO_SUM_MODE ThiscontrolstheoperationoftheStereotoMonoConverter. MONO_SUM_MODE Operation 00 (Left+Right)/2 2 01 Left 2 10 Right 2 11 (Left+Right)/2 2 (2) PleaserefertotheApplicationNoteAN-1591(SNAA039)forthedetaileddiscussiononhowtousetheI2StoPCMBridge. 42 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 ADC_SRC_MODE PCM_TX_SEL PCM_SDO IIR CIC Dec M PCM_SDI PC Mono ADC Sample & Hold I2S_TX_SEL SMTEORNEOO/ MONO_SUM_MODE MONO_SUM_SEL 2 IS_SDO I2S_SDI 2IS @FSI FIR DM Interp S D Stereo DAC DAC_TX_SEL Automatic Handshaking DAC_SRC_MODE Figure23. I2StoPCMBridge GPIOCONFIGURATIONREGISTER This register is used to control the GPIOs and to control the digital signal routing when using the ADC and DAC toperformsamplerateconversion. Table38.GPIOControl(0x1Fh) Bits Field Description 2:0 GPIO_1_SEL ThisconfigurestheGPIO_1pin. GPIO_1_SEL DoesWhat? Direction 000 Disable HiZ 2 001 SPI_SDO Output 2 010 Output0 Output 2 011 Output1 Output 2 100 Read Input 2 101 ClassDEnable Output 2 110 AUXEnable Output 2 111 Dig_Mic_Data Input 2 5:3 GPIO_2_SEL ThisconfigurestheGPIO_2pin. GPIO_2_SEL DoesWhat? Direction 000 Disable HiZ 2 001 SPI_SDO Output 2 010 Output0 Output 2 011 Output1 Output 2 100 Read Input 2 101 ClassDEnable Output 2 110 Dig_MicLClock Output 2 111 Dig_MicRClock Output 2 6 ADC_SRC_MODE Ifset,theADCanalogisdisabledandthedigitalisenabled,usingtheresamplerinput. 7 DAC_SRC_MODE ThisdoesnothavetobesettouseDACinSRCmode,butshouldbesetiftheuserwishestodisablethe DACanalogtosavepower. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 43 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com DACPATHCOMPENSATIONFIRCONFIGURATIONREGISTERS ToallowforcompensationofrolloffintheDACandanalogfiltersectionsanFIRcompensationfilterisappliedto the DAC input data at the original sample rate. Since the DAC can operate at different over sampling ratios the FIR compensation filter is programmable. By default the filter applies approx 2dB of compensation at 20kHz. 5 tapsissufficienttoallowpassbandequalizationandripplecancellationtoaround+/0.01dB. The filter can also be used for precise digital gain and simple tone controls although a DSP or CPU should be used for more powerful tone control if required. As the FIR filter must always be phase linear, the coefficients are symmetrical. Coefficients C0, C1, and C2 are programmable, C3 is equal to C1 and C4 is equal to C0. The maximumpowerofthisfiltermustnotexceedthatoftheexamplesgivenbelow: Z-1 Z-1 Z-1 Z-1 C0 C1 C2 C3 C4 Figure24. FIRConsumptionFilterTaps SampleRate DAC_MODE C0 C1 C2 C3 C4 48kHz 00 334 –2291 26984 –2291 343 48kHz 01 61 –371 25699 –371 61 For DAC_MODE = '00 and '01', the defaults should be sufficient; but for DAC_MODE = '10' and '11', care should be taken to ensure the widest bandwidth is available without requiring such a large attenuation at DC that inband noisebecomesaudible. Table39.CompensationFilterC0LSBs(0x20h) Bits Field Description 7:0 C0_LSB Bits7:0ofC0[15:0] Table40.CompensationFilterC0MSBs(0x21h) Bits Field Description 7:0 C0_MSB Bits15:8ofC0[15:0] Table41.CompensationFilterC1LSBs(0x22h) Bits Field Description 7:0 C1_LSB Bits7:0ofC1[15:0] Table42.CompensationFilterC1MSBs(0x23h) Bits Field Description 7:0 C1_MSB Bits15:8ofC1[15:0] Table43.CompensationFilterC2LSBs(0x24h) Bits Field Description 7:0 C2_LSB Bits7:0ofC2[15:0] 44 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Table44.CompensationFilterC2MSBs(0x25h) Bits Field Description 7:0 C2_MSB Bits15:8ofC2[15:0] Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 45 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com Typical Performance Characteristics (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD StereoDACFrequencyResponse StereoDACFrequencyResponseZoom f =8kHz f =8kHz S S +3 +0.5 +0.4 +2 +0.3 )B +1 )B +0.2 d( E d( E +0.1 D D U +0 U +0 TING TING -0.1 A -1 A M M -0.2 -2 -0.3 -0.4 -3 -0.5 20 50 100200500 1k 2k 5k 10k 20k 20 50 100200 500 1k 2k 5k 10k20k FREQUENCY (Hz) FREQUENCY (Hz) Figure25. Figure26. StereoDACFrequencyResponse StereoDACFrequencyResponseZoom f =16kHz f =16kHz S S +3 +0.5 +0.4 +2 +0.3 )B +1 )B +0.2 d( E d( E +0.1 D D U +0 U +0 TING TING -0.1 A -1 A M M -0.2 -2 -0.3 -0.4 -3 -0.5 20 50 100200500 1k 2k 5k 10k 20k 20 50 100200 500 1k 2k 5k 10k20k FREQUENCY (Hz) FREQUENCY (Hz) Figure27. Figure28. StereoDACFrequencyResponse StereoDACFrequencyResponseZoom f =24kHz f =24kHz S S +3 +0.5 +0.4 +2 +0.3 )B +1 )B +0.2 d( E d( E +0.1 D D U +0 U +0 TING TING -0.1 A -1 A M M -0.2 -2 -0.3 -0.4 -3 -0.5 20 50 100200500 1k 2k 5k 10k 20k 20 50 100200 500 1k 2k 5k 10k20k FREQUENCY (Hz) FREQUENCY (Hz) Figure29. Figure30. 46 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD StereoDACFrequencyResponse StereoDACFrequencyResponseZoom f =32kHz f =32kHz S S +3 +0.5 +0.4 +2 +0.3 )B +1 )B +0.2 d( E d( E +0.1 D D U +0 U +0 TING TING -0.1 A -1 A M M -0.2 -2 -0.3 -0.4 -3 -0.5 20 50 100200500 1k 2k 5k 10k 20k 20 50 100200 500 1k 2k 5k 10k20k FREQUENCY (Hz) FREQUENCY (Hz) Figure31. Figure32. StereoDACFrequencyResponse StereoDACFrequencyResponseZoom f =48kHz f =48kHz S S +3 +0.5 +0.4 +2 +0.3 )B +1 )B +0.2 d d ( E ( E +0.1 D D U +0 U +0 T T ING ING -0.1 A -1 A M M -0.2 -0.3 -2 -0.4 -3 -0.5 20 50 1002005001k 2k 5k10k20k30k 20 50 100200 500 1k 2k 5k 10k20k FREQUENCY (Hz) FREQUENCY (Hz) Figure33. Figure34. THD+N vs StereoDACCrosstalk StereoDACInputVoltage(0dBDAC,AUXOUT) (0dB,DAC,HPSE,32Ω) 10 5 2 1 )% ( N 0.5 + DH 0.2 T 0.1 0.05 0.02 0.01 1m 2m 5m10m20m50m100m200m500m1 2 I S INPUT VOLTAGE (FFS) Figure35. Figure36. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 47 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD MONOADCFrequencyResponse MONOADCFrequencyResponseZoom f =8kHz,6dBMIC f =8kHz,6dBMIC S S +10 +0.5 +0 +0.4 -10 +0.3 -20 )B )B +0.2 d -30 d ( E ( E +0.1 D -40 D U U +0 TINGA --6500 TINGA -0.1 M M -0.2 -70 -80 -0.3 -90 -0.4 -100 -0.5 20 50 100200 500 1k 2k 5k 10k20k 20 50 100200 500 1k 2k 5k 10k20k FREQUENCY (Hz) FREQUENCY (Hz) Figure37. Figure38. MONOADCFrequencyResponse MONOADCFrequencyResponseZoom f =8kHz,36dBMIC f =8kHz,36dBMIC S S +10 +0.5 +0 +0.4 -10 +0.3 -20 )B )B +0.2 d -30 d ( E ( E +0.1 D -40 D U U +0 TINGA --6500 TINGA -0.1 M M -0.2 -70 -80 -0.3 -90 -0.4 -100 -0.5 20 50 100200 500 1k 2k 5k 10k20k 20 50 100200 500 1k 2k 5k 10k20k FREQUENCY (Hz) FREQUENCY (Hz) Figure39. Figure40. MONOADCFrequencyResponse MONOADCFrequencyResponseZoom f =16kHz,6dBMIC f =16kHz,6dBMIC S S +10 +0.5 +0 +0.4 -10 +0.3 -20 )B )B +0.2 d -30 d ( E ( E +0.1 D -40 D U U +0 TINGA --6500 TINGA -0.1 M M -0.2 -70 -80 -0.3 -90 -0.4 -100 -0.5 20 50 100200 500 1k 2k 5k 10k20k 20 50 100200 500 1k 2k 5k 10k20k FREQUENCY (Hz) FREQUENCY (Hz) Figure41. Figure42. 48 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD MONOADCFrequencyResponse MONOADCFrequencyResponseZoom f =16kHz,36dBMIC f =16kHz,36dBMIC S S +10 +0.5 +0 +0.4 -10 +0.3 -20 )B )B +0.2 d -30 d ( E ( E +0.1 D -40 D U U +0 TINGA --6500 TINGA -0.1 M M -0.2 -70 -80 -0.3 -90 -0.4 -100 -0.5 20 50 100200 500 1k 2k 5k 10k20k 20 50 100200 500 1k 2k 5k 10k20k FREQUENCY (Hz) FREQUENCY (Hz) Figure43. Figure44. MONOADCFrequencyResponse MONOADCFrequencyResponseZoom f =24kHz,6dBMIC f =24kHz,6dBMIC S S +10 +0.5 +0 +0.4 -10 +0.3 -20 )B )B +0.2 d -30 d ( E ( E +0.1 D -40 D U U +0 TINGA --6500 TINGA -0.1 M M -0.2 -70 -80 -0.3 -90 -0.4 -100 -0.5 20 50 100200 500 1k 2k 5k 10k20k 20 50 100200 500 1k 2k 5k 10k20k FREQUENCY (Hz) FREQUENCY (Hz) Figure45. Figure46. MONOADCFrequencyResponse MONOADCFrequencyResponseZoom f =24kHz,36dBMIC f =24kHz,36dBMIC S S +10 +0.5 +0 +0.4 -10 +0.3 -20 )B )B +0.2 d -30 d ( E ( E +0.1 D -40 D U U +0 TINGA --6500 TINGA -0.1 M M -0.2 -70 -80 -0.3 -90 -0.4 -100 -0.5 20 50 100200 500 1k 2k 5k 10k20k 20 50 100200 500 1k 2k 5k 10k20k FREQUENCY (Hz) FREQUENCY (Hz) Figure47. Figure48. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 49 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD MONOADCFrequencyResponse MONOADCFrequencyResponseZoom f =32kHz,6dBMIC f =32kHz,6dBMIC S S +10 +0.5 +0 +0.4 -10 +0.3 -20 )B )B +0.2 d -30 d ( E ( E +0.1 D -40 D U U +0 TINGA --6500 TINGA -0.1 M M -0.2 -70 -80 -0.3 -90 -0.4 -100 -0.5 20 50 100200 500 1k 2k 5k 10k20k 20 50 100200 500 1k 2k 5k 10k20k FREQUENCY (Hz) FREQUENCY (Hz) Figure49. Figure50. MONOADCFrequencyResponse MONOADCFrequencyResponseZoom f =32kHz,36dBMIC f =32kHz,36dBMIC S S +10 +0.5 +0 +0.4 -10 +0.3 -20 )B )B +0.2 d -30 d ( E ( E +0.1 D -40 D U U +0 TINGA --6500 TINGA -0.1 M M -0.2 -70 -80 -0.3 -90 -0.4 -100 -0.5 20 50 100200 500 1k 2k 5k 10k20k 20 50 100200 500 1k 2k 5k 10k20k FREQUENCY (Hz) FREQUENCY (Hz) Figure51. Figure52. MONOADCHPFFrequencyResponse MONOADCHPFFrequencyResponse f =8kHz,36dBMIC f =16kHz,36dBMIC S S (fromlefttoright:HPF_MODE'00','10','01') (fromlefttoright:HPF_MODE'00','10','01') +10 +10 +0 +0 -10 -10 -20 -20 )B )B d -30 d -30 ( E ( E D -40 D -40 U U TIN -50 TIN -50 GA -60 GA -60 M M -70 -70 -80 -80 -90 -90 -100 -100 20 50 100 200 500 1k 2k 20 50 100 200 500 1k 2k FREQUENCY (Hz) FREQUENCY (Hz) Figure53. Figure54. 50 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD MONOADCHPFFrequencyResponse MONOADCHPFFrequencyResponse f =24kHz,36dBMIC f =32kHz,36dBMIC S S (fromlefttoright:HPF_MODE'00','10','01') (fromlefttoright:HPF_MODE'00','10','01') +10 +10 +0 +0 -10 -10 -20 -20 )B )B d -30 d -30 ( E ( E D -40 D -40 U U TIN -50 TIN -50 GA -60 GA -60 M M -70 -70 -80 -80 -90 -90 -100 -100 20 50 100 200 500 1k 2k 20 50 100 200 500 1k 2k FREQUENCY (Hz) FREQUENCY (Hz) Figure55. Figure56. MONOADCTHD+N MONOADCTHD+N vsMICInputVoltage vsMICInputVoltage (f =8kHz,6dBMIC) (f =8kHz,36dBMIC) S S 10 10 5 5 2 2 1 1 0.5 0.5 )%( N+ 00..12 )%( N+ 00..12 D D H 0.05 H 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m20m50m100m200m500m1 100P200P500P1m 2m 5m 10m20m40m MIC INPUT VOLTAGE (Vrms) MIC INPUT VOLTAGE (Vrms) Figure57. Figure58. MONOADCPSRR MONOADCPSRR vs vs Frequency Frequency AV =3.3V,6dBMIC AV =5V,6dBMIC DD DD 0 0 -10 -10 -20 -20 -30 -30 )B -40 )B -40 d d ( R -50 ( R -50 R R SP -60 SP -60 -70 -70 -80 -80 -90 -90 -100 -100 20 50 100200 500 1k 2k 5k 10k 20k 20 50 100200 500 1k 2k 5k 10k 20k FREQUENCY (Hz) FREQUENCY (Hz) Figure59. Figure60. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 51 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD MONOADCPSRR MONOADCPSRR vs vs Frequency Frequency AV =3.3V,36dBMIC AV =5V,36dBMIC DD DD 0 0 -10 -10 -20 -20 -30 -30 )B -40 )B -40 d d ( R -50 ( R -50 R R SP -60 SP -60 -70 -70 -80 -80 -90 -90 -100 -100 20 50 100200 500 1k 2k 5k 10k20k 20 50 100200 500 1k 2k 5k 10k20k FREQUENCY (Hz) FREQUENCY (Hz) Figure61. Figure62. AUXOUTPSRR AUXOUTPSRR vs vs FrequencyAV =3.3V,0dBAUX FrequencyAV =5V,0dBAUX DD DD (AUXinputsterminated) (AUXinputsterminated) 0 0 -10 -10 -20 -20 -30 -30 )B -40 )B -40 d d ( R -50 ( R -50 R R SP -60 SP -60 -70 -70 -80 -80 -90 -90 -100 -100 20 50100200 5001k 2k 5k10k20k 50k100k 20 50100200 5001k 2k 5k10k20k 50k100k FREQUENCY (Hz) FREQUENCY (Hz) Figure63. Figure64. AUXOUTPSRR AUXOUTPSRR vs vs FrequencyAV =3.3V,0dBCPI FrequencyAV =5V,0dBCPI DD DD (CPIinputsterminated) (CPIinputsterminated) 0 0 -10 -10 -20 -20 -30 -30 )B -40 )B -40 d d ( R -50 ( R -50 R R SP -60 SP -60 -70 -70 -80 -80 -90 -90 -100 -100 20 50100200 5001k 2k 5k10k20k 50k100k 20 50100200 5001k 2k 5k10k20k 50k100k FREQUENCY (Hz) FREQUENCY (Hz) Figure65. Figure66. 52 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD AUXOUTPSRR AUXOUTPSRR vs vs FrequencyAV =3.3V,0dBDAC FrequencyAV =5V,0dBDAC DD DD (DACinputsselected) (DACinputsselected) 0 0 -10 -10 -20 -20 -30 -30 )B -40 )B -40 d d ( R -50 ( R -50 R R SP -60 SP -60 -70 -70 -80 -80 -90 -90 -100 -100 20 50100200 5001k 2k 5k10k20k 50k100k 20 50100200 5001k 2k 5k10k20k 50k100k FREQUENCY (Hz) FREQUENCY (Hz) Figure67. Figure68. CPOUTPSRR CPOUTPSRR vs vs FrequencyAV =3.3V,0dBAUX FrequencyAV =5V,0dBAUX DD DD (AUXinputsterminated) (AUXinputsterminated) 0 0 -10 -10 -20 -20 -30 -30 )B -40 )B -40 d d ( R -50 ( R -50 R R SP -60 SP -60 -70 -70 -80 -80 -90 -90 -100 -100 20 50100200 5001k 2k 5k10k20k 50k100k 20 50100200 5001k 2k 5k10k20k 50k100k FREQUENCY (Hz) FREQUENCY (Hz) Figure69. Figure70. CPOUTPSRR CPOUTPSRR vs vs FrequencyAV =3.3V,0dBDAC FrequencyAV =5V,0dBDAC DD DD (DACinputsselected) (DACinputsselected) 0 0 -10 -10 -20 -20 -30 -30 )B -40 )B -40 d d ( R -50 ( R -50 R R SP -60 SP -60 -70 -70 -80 -80 -90 -90 -100 -100 20 50100200 5001k 2k 5k10k20k 50k100k 20 50100200 5001k 2k 5k10k20k 50k100k FREQUENCY (Hz) FREQUENCY (Hz) Figure71. Figure72. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 53 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD EarpiecePSRR EarpiecePSRR vs vs FrequencyAV =3.3V,0dBAUX FrequencyAV =5V,0dBAUX DD DD (AUXinputsterminated) (AUXinputsterminated) 0 0 -10 -10 -20 -20 -30 -30 )B -40 )B -40 d d ( R -50 ( R -50 R R SP -60 SP -60 -70 -70 -80 -80 -90 -90 -100 -100 20 50100200 5001k 2k 5k10k20k 50k100k 20 50100200 5001k 2k 5k10k20k 50k100k FREQUENCY (Hz) FREQUENCY (Hz) Figure73. Figure74. EarpiecePSRR EarpiecePSRR vs vs FrequencyAV =3.3V,0dBCPI FrequencyAV =5V,0dBCPI DD DD (CPIinputterminated) (CPIinputterminated) 0 0 -10 -10 -20 -20 -30 -30 )B -40 )B -40 d d ( R -50 ( R -50 R R SP -60 SP -60 -70 -70 -80 -80 -90 -90 -100 -100 20 50100200 5001k 2k 5k10k20k 50k100k 20 50100200 5001k 2k 5k10k20k 50k100k FREQUENCY (Hz) FREQUENCY (Hz) Figure75. Figure76. EarpiecePSRR EarpiecePSRR vs vs FrequencyAV =3.3V,0dBDAC FrequencyAV =5V,0dBDAC DD DD (DACinputselected) (DACinputselected) 0 0 -10 -10 -20 -20 -30 -30 )B -40 )B -40 d d ( R -50 ( R -50 R R SP -60 SP -60 -70 -70 -80 -80 -90 -90 -100 -100 20 50100200 5001k 2k 5k10k20k 50k100k 20 50100200 5001k 2k 5k10k20k 50k100k FREQUENCY (Hz) FREQUENCY (Hz) Figure77. Figure78. 54 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD HeadphonePSRR HeadphonePSRR vs vs FrequencyAV =3.3V,0dBAUX,OCL1.2V FrequencyAV =5V,0dBAUX,OCL1.2V DD DD (AUXinputsterminated) (AUXinputsterminated) 0 0 -10 -10 -20 -20 -30 -30 )B -40 )B -40 d d ( R -50 ( R -50 R R SP -60 SP -60 -70 -70 -80 -80 -90 -90 -100 -100 20 50100200 5001k 2k 5k10k20k 50k100k 20 50100200 5001k 2k 5k10k20k 50k100k FREQUENCY (Hz) FREQUENCY (Hz) Figure79. Figure80. HeadphonePSRR HeadphonePSRR vs vs FrequencyAV =3.3V,0dBCPI,OCL1.2V FrequencyAV =5V,0dBCPI,OCL1.2V DD DD (CPIinputterminated) (CPIinputterminated) 0 0 -10 -10 -20 -20 -30 -30 )B -40 )B -40 d d ( R -50 ( R -50 R R SP -60 SP -60 -70 -70 -80 -80 -90 -90 -100 -100 20 50100200 5001k 2k 5k10k20k 50k100k 20 50100200 5001k 2k 5k10k20k 50k100k FREQUENCY (Hz) FREQUENCY (Hz) Figure81. Figure82. HeadphonePSRR HeadphonePSRR vs vs FrequencyAV =3.3V,0dBADC,OCL1.2V FrequencyAV =5V,0dBADC,OCL1.2V DD DD (DACinputselected) (DACinputselected) 0 0 -10 -10 -20 -20 -30 -30 )B -40 )B -40 d d ( R -50 ( R -50 R R SP -60 SP -60 -70 -70 -80 -80 -90 -90 -100 -100 20 50100200 5001k 2k 5k10k20k 50k100k 20 50100200 5001k 2k 5k10k20k 50k100k FREQUENCY (Hz) FREQUENCY (Hz) Figure83. Figure84. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 55 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD HeadphonePSRR HeadphonePSRR vs vs FrequencyAV =3.3V,0dBAUX,OCL1.5V FrequencyAV =5V,0dBAUX,OCL1.5V DD DD (AUXinputsterminated) (AUXinputsterminated) 0 0 -10 -10 -20 -20 -30 -30 )B -40 )B -40 d d ( R -50 ( R -50 R R SP -60 SP -60 -70 -70 -80 -80 -90 -90 -100 -100 20 50100200 5001k 2k 5k10k20k 50k100k 20 50100200 5001k 2k 5k10k20k 50k100k FREQUENCY (Hz) FREQUENCY (Hz) Figure85. Figure86. HeadphonePSRR HeadphonePSRR vs vs FrequencyAV =3.3V,0dBCPI,OCL1.5V FrequencyAV =5V,0dBCPI,OCL1.5V DD DD (CPIinputterminated) (CPIinputterminated) 0 0 -10 -10 -20 -20 -30 -30 )B -40 )B -40 d d ( R -50 ( R -50 R R SP -60 SP -60 -70 -70 -80 -80 -90 -90 -100 -100 20 50100200 5001k 2k 5k10k20k 50k100k 20 50100200 5001k 2k 5k10k20k 50k100k FREQUENCY (Hz) FREQUENCY (Hz) Figure87. Figure88. HeadphonePSRR HeadphonePSRR vs vs FrequencyAV =3.3V,0dBDAC,OCL1.5V FrequencyAV =5V,0dBDAC,OCL1.5V DD DD (DACinputselected) (DACinputselected) 0 0 -10 -10 -20 -20 -30 -30 )B -40 )B -40 d d ( R -50 ( R -50 R R SP -60 SP -60 -70 -70 -80 -80 -90 -90 -100 -100 20 50100200 5001k 2k 5k10k20k 50k100k 20 50100200 5001k 2k 5k10k20k 50k100k FREQUENCY (Hz) FREQUENCY (Hz) Figure89. Figure90. 56 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD HeadphonePSRR HeadphonePSRR vs vs FrequencyAV =3.3V,0dBAUX,SE FrequencyAV =5V,0dBAUX,SE DD DD (AUXinputsterminated) (AUXinputsterminated) 0 0 -10 -10 -20 -20 -30 -30 )B -40 )B -40 d d ( R -50 ( R -50 R R SP -60 SP -60 -70 -70 -80 -80 -90 -90 -100 -100 20 50100200 5001k 2k 5k10k20k 50k100k 20 50100200 5001k 2k 5k10k20k 50k100k FREQUENCY (Hz) FREQUENCY (Hz) Figure91. Figure92. HeadphonePSRR HeadphonePSRR vs vs FrequencyAV =3.3V,0dBCPI,SE FrequencyAV =5V,0dBCPI,SE DD DD (CPIinputterminated) (CPIinputterminated) 0 0 -10 -10 -20 -20 -30 -30 )B -40 )B -40 d d ( R -50 ( R -50 R R SP -60 SP -60 -70 -70 -80 -80 -90 -90 -100 -100 20 50100200 5001k 2k 5k10k20k 50k100k 20 50100200 5001k 2k 5k10k20k 50k100k FREQUENCY (Hz) FREQUENCY (Hz) Figure93. Figure94. HeadphonePSRR HeadphonePSRR vs vs FrequencyAV =3.3V,0dBDAC,SE FrequencyAV =5V,0dBDAC,SE DD DD (DACinputselected) (DACinputselected) 0 0 -10 -10 -20 -20 -30 -30 )B -40 )B -40 d d ( R -50 ( R -50 R R SP -60 SP -60 -70 -70 -80 -80 -90 -90 -100 -100 20 50100200 5001k 2k 5k10k20k 50k100k 20 50100200 5001k 2k 5k10k20k 50k100k FREQUENCY (Hz) FREQUENCY (Hz) Figure95. Figure96. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 57 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD LoudspeakerPSRR LoudspeakerPSRR vs vs FrequencyAV =3.3V,0dBAUX FrequencyAV =5V,0dBAUX DD DD (AUXinputsterminated) (AUXinputsterminated) +0 +0 -5 -5 -10 -10 -15 -15 -20 -20 -25 -25 -30 -30 -35 -35 )B -40 )B -40 d( R --5405 d( R --5405 R -55 R -55 SP -60 SP -60 -65 -65 -70 -70 -75 -75 -80 -80 -85 -85 -90 -90 -95 -95 -100 -100 20 50100200 500 1k 2k 5k 10k20k 20 50100200 500 1k 2k 5k 10k20k FREQUENCY (Hz) FREQUENCY (Hz) Figure97. Figure98. LoudspeakerPSRR LoudspeakerPSRR vs vs FrequencyAV =3.3V,0dBCPI FrequencyAV =5V,0dBCPI DD DD (CPIinputterminated) (CPIinputterminated) +0 +0 -5 -5 -10 -10 -15 -15 -20 -20 -25 -25 -30 -30 -35 -35 )B -40 )B -40 d( R --5405 d( R --5405 R -55 R -55 SP -60 SP -60 -65 -65 -70 -70 -75 -75 -80 -80 -85 -85 -90 -90 -95 -95 -100 -100 20 50100200 500 1k 2k 5k 10k20k 20 50100200 500 1k 2k 5k 10k20k FREQUENCY (Hz) FREQUENCY (Hz) Figure99. Figure100. LoudspeakerPSRR LoudspeakerPSRR vs vs FrequencyAV =3.3V,0dBDAC FrequencyAV =5V,0dBDAC DD DD (DACinputselected) (DACinputselected) +0 +0 -5 -5 -10 -10 -15 -15 -20 -20 -25 -25 -30 -30 -35 -35 )B -40 )B -40 d( R --5405 d( R --5405 R -55 R -55 SP -60 SP -60 -65 -65 -70 -70 -75 -75 -80 -80 -85 -85 -90 -90 -95 -95 -100 -100 20 50100200 500 1k 2k 5k 10k20k 20 50100200 500 1k 2k 5k 10k20k FREQUENCY (Hz) FREQUENCY (Hz) Figure101. Figure102. 58 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD INT/EXTMICBIASPSRR INT/EXTMICBIASPSRR vs vs Frequency Frequency AV =3.3V,MICBIAS=2.0V AV =5V,MICBIAS=2.0V DD DD 0 0 -10 -10 -20 -20 -30 -30 )B -40 )B -40 d d ( R -50 ( R -50 R R SP -60 SP -60 -70 -70 -80 -80 -90 -90 -100 -100 20 50100200 5001k 2k 5k10k20k 50k100k 20 50100200 5001k 2k 5k10k20k 50k100k FREQUENCY (Hz) FREQUENCY (Hz) Figure103. Figure104. INT/EXTMICBIASPSRR INT/EXTMICBIASPSRR vs vs Frequency Frequency AV =3.3V,MICBIAS=2.5V AV =5V,MICBIAS=2.5V DD DD 0 0 -10 -10 -20 -20 -30 -30 )B -40 )B -40 d d ( R -50 ( R -50 R R SP -60 SP -60 -70 -70 -80 -80 -90 -90 -100 -100 20 50100200 5001k 2k 5k10k20k 50k100k 20 50100200 5001k 2k 5k10k20k 50k100k FREQUENCY (Hz) FREQUENCY (Hz) Figure105. Figure106. INT/EXTMICBIASPSRR INT/EXTMICBIASPSRR vs vs Frequency Frequency AV =3.3V,MICBIAS=2.8V AV =5V,MICBIAS=2.8V DD DD 0 0 -10 -10 -20 -20 -30 -30 )B -40 )B -40 d d ( R -50 ( R -50 R R SP -60 SP -60 -70 -70 -80 -80 -90 -90 -100 -100 20 50100200 5001k 2k 5k10k20k 50k100k 20 50100200 5001k 2k 5k10k20k 50k100k FREQUENCY (Hz) FREQUENCY (Hz) Figure107. Figure108. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 59 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD INT/EXTMICBIASPSRR AUXOUTTHD+N vs vs Frequency Frequency AV =5V,MICBIAS=3.3V AV =3.3V,0dB,V =1V ,5kΩ DD DD OUT RMS 0 10 -10 5 -20 2 1 -30 0.5 )Bd( RRSP ---654000 )%( N+DHT 000.0..125 -70 0.02 0.01 -80 0.005 -90 0.002 -100 0.001 20 50100200 5001k 2k 5k10k20k 50k100k 20 50 100200 500 1k 2k 5k 10k20k FREQUENCY (Hz) FREQUENCY (Hz) Figure109. Figure110. AUXOUTTHD+N CPOUTTHD+N vs vs Frequency Frequency AV =5V,0dB,V =1V ,5kΩ AV =3.3V,0dB,V =1V ,5kΩ DD OUT RMS DD OUT RMS 10 10 5 5 2 2 1 1 0.5 0.5 )%( N+ 00..12 )%( N+ 00..12 D D H 0.05 H 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 20 50 100200 500 1k 2k 5k 10k20k 20 50 100200 500 1k 2k 5k 10k20k FREQUENCY (Hz) FREQUENCY (Hz) Figure111. Figure112. CPOUTTHD+N EarpieceTHD+N vs vs Frequency Frequency AV =5V,0dB,V =1V ,5kΩ AV =3.3V,0dB,P =500mW,32Ω DD OUT RMS DD OUT 10 10 5 5 2 2 1 0.5 1 )%( N+D 00..12 )%( N+D 00..25 H 0.05 H T T 0.02 0.1 0.01 0.05 0.005 0.02 0.002 0.001 0.01 20 50 100200 500 1k 2k 5k 10k20k 20 50 100200 500 1k 2k 5k 10k20k FREQUENCY (Hz) FREQUENCY (Hz) Figure113. Figure114. 60 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD EarpieceTHD+N HeadphoneTHD+N vs vs Frequency FrequencyAV =3.3V,OCL1.5V,0dB DD AV =5V,0dB,P =50mW,32Ω P =7.5mW,32Ω DD OUT OUT 10 10 5 5 2 2 1 1 )%( N 0.5 )%( N 0.5 + + D 0.2 D 0.2 H H T T 0.1 0.1 0.05 0.05 0.02 0.02 0.01 0.01 20 50 100200 500 1k 2k 5k 10k20k 20 50 100200 500 1k 2k 5k 10k20k FREQUENCY (Hz) FREQUENCY (Hz) Figure115. Figure116. HeadphoneTHD+N HeadphoneTHD+N vs vs FrequencyAV =5V,OCL1.5V,0dB FrequencyAV =3.3V,OCL1.2V,0dB DD DD P =10mW,32Ω P =7.5mW,32Ω OUT OUT 10 10 5 5 2 2 1 1 )%( N+ 0.5 )%( N + 0.5 DHT 0.2 DHT 0.2 0.1 0.1 0.05 0.05 0.02 0.02 0.01 0.01 20 50 100200 500 1k 2k 5k 10k20k 20 50 100200 500 1k 2k 5k 10k20k FREQUENCY (Hz) FREQUENCY (Hz) Figure117. Figure118. HeadphoneTHD+N HeadphoneTHD+N vs vs FrequencyAV =5V,OCL1.2V,0dB FrequencyAV =3.3V,SE,0dB DD DD P =10mW,32Ω P =7.5mW,32Ω OUT OUT 10 10 5 5 2 2 1 1 )%( N 0.5 )%( N 0.5 + + D 0.2 D 0.2 H H T T 0.1 0.1 0.05 0.05 0.02 0.02 0.01 0.01 20 50 100200 500 1k 2k 5k 10k20k 20 50 100200 500 1k 2k 5k 10k20k FREQUENCY (Hz) FREQUENCY (Hz) Figure119. Figure120. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 61 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD HeadphoneTHD+N LoudspeakerTHD+N vs vs FrequencyAV =5V,SE,0dB FrequencyAV =3.3V,P =400mW DD DD OUT P =10mW,32Ω 15μH+8Ω+15μH OUT 10 10 5 5 2 2 1 1 0.5 )%( N+D 00..25 )%( N+D 00..12 H H 0.05 T T 0.1 0.02 0.05 0.01 0.005 0.02 0.002 0.01 0.001 20 50 100200 500 1k 2k 5k 10k20k 20 50 100200 500 1k 2k 5k 10k20k FREQUENCY (Hz) FREQUENCY (Hz) Figure121. Figure122. LoudspeakerTHD+N EarpieceTHD+N vs vs FrequencyAV =5V,P =400mW OutputPowerAV =3.3V,0dBAUX DD OUT DD 15μH+8Ω+15μH f =1kHz,16Ω OUT 10 10 5 5 2 2 1 1 0.5 0.5 )%( N+DH 000.0..125 )%( N+DH 000.0..125 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 20 50 100200 500 1k 2k 5k 10k20k 1m 2m 5m 10m20m50m100m200m500m1 FREQUENCY (Hz) OUTPUT POWER (W) Figure123. Figure124. EarpieceTHD+N EarpieceTHD+N vs vs OutputPowerAV =5V,0dBAUX OutputPowerAV =3.3V,0dBAUX DD DD f =1kHz,16Ω f =1kHz,32Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )%( N+ 00..12 )%( N+ 00..12 D D H 0.05 H 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m20m50m100m200m500m1 1m 2m 5m 10m20m50m100m200m500m1 OUTPUT POWER (W) OUTPUT POWER (W) Figure125. Figure126. 62 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD EarpieceTHD+N EarpieceTHD+N vs vs OutputPowerAV =5V,0dBAUX OutputPowerAV =3.3V,0dBCPI DD DD f =1kHz,32Ω f =1kHz,16Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )%( N+ 00..12 )%( N+ 00..12 D D H 0.05 H 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m20m50m100m200m500m1 1m 2m 5m 10m20m50m100m200m500m1 OUTPUT POWER (W) OUTPUT POWER (W) Figure127. Figure128. EarpieceTHD+N EarpieceTHD+N vs vs OutputPowerAV =5V,0dBCPI OutputPowerAV =3.3V,0dBCPI DD DD f =1kHz,16Ω f =1kHz,32Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )%( N+DH 000.0..125 )%( N+DH 000.0..125 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m20m50m100m200m500m1 1m 2m 5m 10m 20m 50m100m200m OUTPUT POWER (W) OUTPUT POWER (W) Figure129. Figure130. EarpieceTHD+N HeadphoneTHD+N vs vs OutputPowerAV =5V,0dBCPI OutputPowerAV =3.3V,OCL1.2V,0dBDAC DD DD f =1kHz,32Ω f =1kHz,16Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )%( N+ 00..12 )%( N+ 00..12 DH 0.05 DH 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m20m50m100m200m500m1 1m 2m 5m 10m 20m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure131. Figure132. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 63 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =5V,OCL1.2V,0dBDAC OutputPowerAV =3.3V,OCL1.2V,0dBDAC DD DD f =1kHz,16Ω f =1kHz,32Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )% 0.2 )% 0.2 ( N+ 0.1 ( N+ 0.1 DH 0.05 DH 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m 100m 1m 2m 5m 10m 20m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure133. Figure134. HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =5V,OCL1.2V,0dBDAC OutputPowerAV =3.3V,OCL1.2V,12dBDAC DD DD f =1kHz,32Ω f =1kHz,16Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )% 0.2 )% 0.2 ( N+ 0.1 ( N+ 0.1 DH 0.05 DH 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m 100m 1m 2m 5m 10m 20m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure135. Figure136. HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =5V,OCL1.2V,12dBDAC OutputPowerAV =3.3V,OCL1.2V,12dBDAC DD DD f =1kHz,16Ω f =1kHz,32Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )% 0.2 )% 0.2 ( N+ 0.1 ( N+ 0.1 DH 0.05 DH 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m 100m 1m 2m 5m 10m 20m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure137. Figure138. 64 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =5V,OCL1.2V,12dBDAC OutputPowerAV =3.3V,OCL1.5V,0dBDAC DD DD f =1kHz,32Ω f =1kHz,16Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )% 0.2 )% 0.2 ( N+ 0.1 ( N+ 0.1 DH 0.05 DH 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m 100m 1m 2m 5m 10m 20m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure139. Figure140. HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =5V,OCL1.5V,0dBDAC OutputPowerAV =3.3V,OCL1.5V,0dBDAC DD DD f =1kHz,16Ω f =1kHz,32Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )% 0.2 )% 0.2 ( N+ 0.1 ( N+ 0.1 DH 0.05 DH 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m 100m 1m 2m 5m 10m 20m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure141. Figure142. HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =5V,OCL1.5V,0dBDAC OutputPowerAV =3.3V,OCL1.5V,12dBDAC DD DD f =1kHz,32Ω f =1kHz,16Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )% 0.2 )% 0.2 ( N+ 0.1 ( N+ 0.1 DH 0.05 DH 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m 100m 1m 2m 5m 10m 20m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure143. Figure144. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 65 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =5V,OCL1.5V,12dBDAC OutputPowerAV =3.3V,OCL1.5V,12dBDAC DD DD f =1kHz,16Ω f =1kHz,32Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )% 0.2 )% 0.2 ( N+ 0.1 ( N+ 0.1 DH 0.05 DH 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m 100m 1m 2m 5m 10m 20m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure145. Figure146. HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =5V,OCL1.5V,12dBDAC OutputPowerAV =3.3V,SE,0dBDAC DD DD f =1kHz,32Ω f =1kHz,16Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )%( N+ 00..12 )%( N+ 00..12 DH 0.05 DH 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m 100m 1m 2m 5m 10m 20m 50m100m200m OUTPUT POWER (W) OUTPUT POWER (W) Figure147. Figure148. HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =5V,SE,0dBDAC OutputPowerAV =3.3V,SE,0dBDAC DD DD f =1kHz,16Ω f =1kHz,32Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )%( N+ 00..12 )%( N+ 00..12 DH 0.05 DH 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m100m200m 1m 2m 5m 10m 20m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure149. Figure150. 66 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =5V,SE,0dBDAC OutputPowerAV =3.3V,SE,12dBDAC DD DD f =1kHz,32Ω f =1kHz,16Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )%( N+ 00..12 )%( N+ 00..12 DH 0.05 DH 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m 100m 1m 2m 5m 10m 20m 50m100m200m OUTPUT POWER (W) OUTPUT POWER (W) Figure151. Figure152. HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =5V,SE,12dBDAC OutputPowerAV =3.3V,SE,12dBDAC DD DD f =1kHz,16Ω f =1kHz,32Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )%( N+ 00..12 )%( N+ 00..12 DH 0.05 DH 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m100m200m 1m 2m 5m 10m 20m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure153. Figure154. HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =5V,SE,12dBDAC OutputPowerAV =3.3V,OCL1.2V,0dBAUX DD DD f =1kHz,32Ω f =1kHz,16Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )% 0.2 )% 0.2 ( N+ 0.1 ( N+ 0.1 DH 0.05 DH 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m 100m 1m 2m 5m 10m 20m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure155. Figure156. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 67 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =3.3V,OCL1.2V,12dBAUX OutputPowerAV =5V,OCL1.2V,0dBAUX DD DD f =1kHz,16Ω f =1kHz,16Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )% 0.2 )% 0.2 ( N+ 0.1 ( N+ 0.1 DH 0.05 DH 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m 100m 1m 2m 5m 10m 20m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure157. Figure158. HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =5V,OCL1.2V,12dBAUX OutputPowerAV =3.3V,OCL1.2V,0dBAUX DD DD f =1kHz,16Ω f =1kHz,32Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )% 0.2 )% 0.2 ( N+ 0.1 ( N+ 0.1 DH 0.05 DH 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m 100m 1m 2m 5m 10m 20m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure159. Figure160. HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =3.3V,OCL1.2V,12dBAUX OutputPowerAV =5V,OCL1.2V,0dBAUX DD DD f =1kHz,32Ω f =1kHz,32Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )% 0.2 )% 0.2 ( N+ 0.1 ( N+ 0.1 DH 0.05 DH 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m 100m 1m 2m 5m 10m 20m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure161. Figure162. 68 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =5V,OCL1.2V,12dBAUX OutputPowerAV =3.3V,OCL1.2V,0dBCPI DD DD f =1kHz,32Ω f =1kHz,16Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )% 0.2 )% 0.2 ( N+ 0.1 ( N+ 0.1 DH 0.05 DH 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m 100m 1m 2m 5m 10m 20m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure163. Figure164. HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =5V,OCL1.2V,0dBCPI OutputPowerAV =3.3V,OCL1.2V,0dBCPI DD DD f =1kHz,16Ω f =1kHz,32Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )% 0.2 )% 0.2 ( N+ 0.1 ( N+ 0.1 DH 0.05 DH 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m 100m 1m 2m 5m 10m 20m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure165. Figure166. HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =5V,OCL1.2V,0dBCPI OutputPowerAV =3.3V,OCL1.5V,0dBAUX DD DD f =1kHz,32Ω f =1kHz,16Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )% 0.2 )% 0.2 ( N+ 0.1 ( N+ 0.1 DH 0.05 DH 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m 100m 1m 2m 5m 10m 20m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure167. Figure168. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 69 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =3.3V,OCL1.5V,12dBAUX OutputPowerAV =5V,OCL1.5V,0dBAUX DD DD f =1kHz,16Ω f =1kHz,16Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )% 0.2 )% 0.2 ( N+ 0.1 ( N+ 0.1 DH 0.05 DH 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m 100m 1m 2m 5m 10m 20m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure169. Figure170. HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =5V,OCL1.5V,12dBAUX OutputPowerAV =3.3V,OCL1.5V,0dBAUX DD DD f =1kHz,16Ω f =1kHz,32Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )% 0.2 )% 0.2 ( N+ 0.1 ( N+ 0.1 DH 0.05 DH 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m 100m 1m 2m 5m 10m 20m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure171. Figure172. HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =3.3V,OCL1.5V,12dBAUX OutputPowerAV =5V,OCL1.5V,0dBAUX DD DD f =1kHz,32Ω f =1kHz,32Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )% 0.2 )% 0.2 ( N+ 0.1 ( N+ 0.1 DH 0.05 DH 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m 100m 1m 2m 5m 10m 20m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure173. Figure174. 70 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =5V,OCL1.5V,12dBAUX OutputPowerAV =3.3V,OCL1.5V,0dBCPI DD DD f =1kHz,32Ω f =1kHz,16Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )% 0.2 )% 0.2 ( N+ 0.1 ( N+ 0.1 DH 0.05 DH 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m 100m 1m 2m 5m 10m 20m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure175. Figure176. HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =5V,OCL1.5V,0dBCPI OutputPowerAV =3.3V,OCL1.5V,0dBCPI DD DD f =1kHz,16Ω f =1kHz,32Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )%( N+ 00..12 )%( N + 00..21 DHT 0.05 DHT 0.05 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m 100m 1m 2m 5m 10m 20m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure177. Figure178. HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =5V,OCL1.5V,0dBCPI OutputPowerAV =3.3V,SE,0dBAUX DD DD f =1kHz,32Ω f =1kHz,16Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )% )% ( N 0.2 ( N 0.2 + 0.1 + 0.1 DH 0.05 DH 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m 100m 1m 2m 5m 10m 20m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure179. Figure180. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 71 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =5V,SE,0dBAUX OutputPowerAV =3.3V,SE,0dBAUX DD DD f =1kHz,16Ω f =1kHz,32Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )%( N + 00..21 )%( N+ 00..12 DHT 0.05 DHT 0.05 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m 100m 1m 2m 5m 10m 20m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure181. Figure182. HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =5V,SE,0dBAUX OutputPowerAV =3.3V,SE,0dBCPI DD DD f =1kHz,32Ω f =1kHz,16Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )% 0.2 )% 0.2 ( N+ 0.1 ( N+ 0.1 DH 0.05 DH 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m 100m 1m 2m 5m 10m 20m 50m 100m OUTPUT POWER (W) OUTPUT POWER (W) Figure183. Figure184. HeadphoneTHD+N HeadphoneTHD+N vs vs OutputPowerAV =5V,SE,0dBCPI OutputPowerAV =3.3V,SE,0dBCPI DD DD f =1kHz,16Ω f =1kHz,32Ω OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )%( N+ 00..12 )%( N+ 00..12 D D H 0.05 H 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m100m200m 1m 2m 5m 10m 20m 50m100m200m OUTPUT POWER (W) OUTPUT POWER (W) Figure185. Figure186. 72 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD HeadphoneTHD+N LoudspeakerTHD+N vs vs OutputPowerAV =5V,SE,0dBCPI OutputPowerAV =3.3V,0dBAUX DD DD f =1kHz,32Ω f =1kHz,15μH+8Ω+15μH OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )%( N+ 00..12 )%( N+ 00..12 D D H 0.05 H 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 2m 5m 10m 20m 50m100m200m 10m 20m 50m 100m 200m500m 1 2 OUTPUT POWER (W) OUTPUT POWER (W) Figure187. Figure188. LoudspeakerTHD+N LoudspeakerTHD+N vs vs OutputPowerAV =4.2V,0dBAUX OutputPowerAV =5V,0dBAUX DD DD f =1kHz,15μH+8Ω+15μH f =1kHz,15μH+8Ω+15μH OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )%( N+ 00..12 )%( N+ 00..12 D D H 0.05 H 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 10m 20m 50m 100m 200m500m 1 2 10m 20m 50m 100m 200m500m 1 2 OUTPUT POWER (W) OUTPUT POWER (W) Figure189. Figure190. LoudspeakerTHD+N LoudspeakerTHD+N vs vs OutputPowerAV =3.3V,0dBCPI OutputPowerAV =4.2V,0dBCPI DD DD f =1kHz,15μH+8Ω+15μH f =1kHz,15μH+8Ω+15μH OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )%( N+ 00..12 )%( N+ 00..12 D D H 0.05 H 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 10m 20m 50m 100m 200m500m 1 2 10m 20m 50m 100m 200m500m 1 2 OUTPUT POWER (W) OUTPUT POWER (W) Figure191. Figure192. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 73 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD LoudspeakerTHD+N LoudspeakerTHD+N vs vs OutputPowerAV =5V,0dBCPI OutputPowerAV =3.3V,0dBDAC DD DD f =1kHz,15μH+8Ω+15μH f =1kHz,15μH+8Ω+15μH OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )%( N+ 00..12 )%( N+ 00..12 D D H 0.05 H 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 10m 20m 50m 100m 200m500m 1 2 10m 20m 50m 100m 200m500m 1 2 OUTPUT POWER (W) OUTPUT POWER (W) Figure193. Figure194. LoudspeakerTHD+N LoudspeakerTHD+N vs vs OutputPowerAV =4.2V,0dBDAC OutputPowerAV =5V,0dBDAC DD DD f =1kHz,15μH+8Ω+15μH f =1kHz,15μH+8Ω+15μH OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )%( N+ 00..12 )%( N+ 00..12 D D H 0.05 H 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 10m 20m 50m 100m 200m500m 1 2 10m 20m 50m 100m 200m500m 1 2 OUTPUT POWER (W) OUTPUT POWER (W) Figure195. Figure196. AUXOUTTHD+N AUXOUTTHD+N vs vs OutputVoltageAV =3.3V,0dBAUX OutputVoltageAV =5V,0dBAUX DD DD f =1kHz,5kΩ f =1kHz,5kΩ OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )% )% ( N 0.2 ( N 0.2 + 0.1 + 0.1 D 0.05 D 0.05 H H T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m2m 5m10m20m50m 200m 1 2 3 1m2m 5m10m20m50m 200m 1 2 3 100m 500m 100m 500m OUTPUT VOLTAGE (VRMS) OUTPUT VOLTAGE (VRMS) Figure197. Figure198. 74 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD AUXOUTTHD+N AUXOUTTHD+N vs vs OutputVoltageAV =3.3V,0dBCPI OutputVoltageAV =5V,0dBCPI DD DD f =1kHz,5kΩ f =1kHz,5kΩ OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )% )% ( N 0.2 ( N 0.2 + 0.1 + 0.1 D 0.05 D 0.05 H H T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m2m 5m10m20m50m 200m 1 2 3 1m2m 5m10m20m50m 200m 1 2 4 100m 500m 100m 500m OUTPUT VOLTAGE (VRMS) OUTPUT VOLTAGE (VRMS) Figure199. Figure200. AUXOUTTHD+N AUXOUTTHD+N vs vs OutputVoltageAV =3.3V,0dBDAC OutputVoltageAV =5V,0dBDAC DD DD f =1kHz,5kΩ f =1kHz,5kΩ OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )% )% ( N 0.2 ( N 0.2 + 0.1 + 0.1 D 0.05 D 0.05 H H T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 6m10m20m 50m100m 500m 1 2 3 6m10m20m 50m100m 500m 1 2 4 200m 200m OUTPUT VOLTAGE (VRMS) OUTPUT VOLTAGE (VRMS) Figure201. Figure202. AUXOUTTHD+N AUXOUTTHD+N vs vs OutputVoltageAV =3.3V,12dBDAC OutputVoltageAV =5V,12dBDAC DD DD f =1kHz,5kΩ f =1kHz,5kΩ OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )%( N + D 0.000..521 )%( N + D 0.000..521 H H T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 20m 50m 100m200m 500m 1 2 3 20m 50m100m200m 500m 1 2 4 OUTPUT VOLTAGE (VRMS) OUTPUT VOLTAGE (VRMS) Figure203. Figure204. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 75 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD CPOUTTHD+N CPOUTTHD+N vs vs OutputVoltageAV =3.3V,0dBAUX OutputVoltageAV =5V,0dBAUX DD DD f =1kHz,5kΩ f =1kHz,5kΩ OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )% )% ( N 0.2 ( N 0.2 + 0.1 + 0.1 D 0.05 D 0.05 H H T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m2m 5m10m20m50m 200m 1 2 3 1m2m 5m10m20m50m 200m 1 2 3 100m 500m 100m 500m OUTPUT VOLTAGE (VRMS) OUTPUT VOLTAGE (VRMS) Figure205. Figure206. CPOUTTHD+N CPOUTTHD+N vs vs OutputVoltageAV =3.3V,0dBDAC OutputVoltageAV =5V,0dBDAC DD DD f =1kHz,5kΩ f =1kHz,5kΩ OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )%( N + 00..21 )%( N+ 00..12 DHT 0.05 DHT 0.05 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 20m 50m 100m200m 500m 1 2 3 6m10m 20m 50m100m200m 500m 1 OUTPUT VOLTAGE (VRMS) OUTPUT VOLTAGE (VRMS) Figure207. Figure208. CPOUTTHD+N CPOUTTHD+N vs vs OutputVoltageAV =3.3V,6dBMIC OutputVoltageAV =5V,6dBMIC DD DD f =1kHz,5kΩ f =1kHz,5kΩ OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )% 0.2 )% 0.2 ( N+ 0.1 ( N+ 0.1 DH 0.05 DH 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 1m 5m 20m 100m 500m 2 1m 5m 20m 100m 500m 2 2m 10m 50m 200m 1 4 2m 10m 50m 200m 1 4 OUTPUT VOLTAGE (VRMS) OUTPUT VOLTAGE (VRMS) Figure209. Figure210. 76 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD CPOUTTHD+N CPOUTTHD+N vs vs OutputVoltageAV =3.3V,12dBDAC OutputVoltageAV =5V,12dBDAC DD DD f =1kHz,5kΩ f =1kHz,5kΩ OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )%( N+ 00..12 )%( N+ 00..12 D D H 0.05 H 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 20m 50m100m200m500m 1 2 3 20m 50m100m200m500m1 2 4 OUTPUT VOLTAGE (VRMS) OUTPUT VOLTAGE (VRMS) Figure211. Figure212. CPOUTTHD+N CPOUTTHD+N vs vs OutputVoltageAV =3.3V,36dBMIC OutputVoltageAV =5V,36dBMIC DD DD f =1kHz,5kΩ f =1kHz,5kΩ OUT OUT 10 10 5 5 2 2 1 1 0.5 0.5 )%( N+ 00..12 )%( N+ 00..12 D D H 0.05 H 0.05 T T 0.02 0.02 0.01 0.01 0.005 0.005 0.002 0.002 0.001 0.001 10m20m50m100m200m500m1 2 4 10m20m50m100m200m500m1 2 4 OUTPUT VOLTAGE (VRMS) OUTPUT VOLTAGE (VRMS) Figure213. Figure214. HeadphoneCrosstalk HeadphoneCrosstalk vs vs Frequency Frequency OCL1.2V,0dBAUX,32Ω OCL1.5V,0dBAUX,32Ω +0 +0 -5 -5 -10 -10 -15 -15 -20 -20 -25 -25 )Bd --3305 )Bd --3305 ( K -40 ( K -40 L -45 L -45 AT -50 AT -50 S -55 S -55 SO -60 SO -60 R -65 R -65 C -70 C -70 -75 -75 -80 -80 -85 -85 -90 -90 -95 -95 -100 -100 20 50100200 500 1k 2k 5k 10k20k 20 50100200 500 1k 2k 5k 10k20k FREQUENCY (Hz) FREQUENCY (Hz) Figure215. Figure216. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 77 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com Typical Performance Characteristics (continued) (ForallperformancecurvesAV referstothevoltageappliedtotheA_V andLS_V pins.DV referstothevoltage DD DD DD DD appliedtotheD_V andPLL_V pins;AV =3.3VandDV =3.3Vunlessotherwisespecified. DD DD DD DD HeadphoneCrosstalk vs Frequency SE,0dBAUX,32Ω +0 -5 -10 -15 -20 -25 )Bd --3305 ( K -40 L -45 AT -50 S -55 SO -60 R -65 C -70 -75 -80 -85 -90 -95 -100 20 50100200 500 1k 2k 5k 10k20k FREQUENCY (Hz) Figure217. 78 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 APPLICATION NOTE MICROPHONE BIAS CONFIGURATIONS SchematicConsiderationsforMEMsMicrophones TheinternalmicrophonebiasoftheLM49370isprovidedthroughatwostageamplifier.Addingacapacitorlarger than 100pF directly to this pin can cause instability. In many cases, when using MEMs microphones, a larger bypass capacitor is required on the INT_MIC_BIAS pin. To avoid oscillations and to keep the device stable, it is recommended to add a resistor (R ) greater than 10Ω in series with the capacitor (C ). Another option is to bias B B theMEMsmicrophonefromthe1.8VsupplyusedforD_V /IO_V . DD DD VDD A_VDD LS_VDD EXT_MIC_BIAS MIC_DET EXT_MIC RB INT_MIC_BIAS CB INT_MIC_POS INT_MIC_NEG Figure218. SchematicforMEMsMicrophones SchematicConsiderationsforECMMicrophones WhenusingECMmicrophones,refertotheconfigurationsshowninFigure219tobiasthemicrophones. VDD A_VDD LS_VDD EXT_MIC_BIAS MIC_DET EXT_MIC INT_MIC_BIAS INT_MIC_POS INT_MIC_NEG Figure219. SchematicOptionforECMMicrophones PCB LAYOUT CONSIDERATIONS A_V andLS_V DD DD DuetointernalESDdiodesstructure,forbestperformance,inthePCBboardA_V andLS_V needtobetied DD DD tothesameplane,butrequiresseparatebypassingcapacitorsforeachsupplyrail. MicrophoneInputs When routing the differential microphone inputs the electrical length of the two traces should be well matched. The differential input pair can be routed in parallel on the same plane or the traces can overlap on two adjacent planes.Itisimportanttosurroundthesetraceswithagroundplaneortracetoisolatethemicrophoneinputsfrom thenoisecouplingfromtheclassDamplifier. Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 79 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com ClassDLoudspeaker To minimize trace resistance and therefore maintain the highest possible output power, the power (LS_V ) and DD class D output (LS-, LS+) traces should be as wide as possible. It is also essential to keep these same traces as shortandwellshieldedaspossibletodecreasetheamountofEMIradiation. Capacitors All supply bypass capacitors (for A_V , D_V . I/O V , and LS_V ), and charge pump capacitors should be DD DD DD DD as close to the device as possible. Careful consideration should be taken with the ground connection of the analog supply (A_V ) bypass cap, for proper performance it should be referenced to a low noise ground plane. DD The charge pump capacitors and traces connecting the capacitor to the device should be kept away from the inputandoutputtracestoavoidnoisecouplingissues. LM49370 Demonstration Board Schematic Diagram 80 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Demoboard PCB Layout Figure220. TopSilkscreen Figure221. TopLayer Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 81 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com Figure222. MidLayer1 Figure223. MidLayer2 82 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

LM49370 www.ti.com SNAS356D–FEBRUARY2007–REVISEDMARCH2012 Figure224. BottomLayer Figure225. BottomSilkscreen Copyright©2007–2012,TexasInstrumentsIncorporated SubmitDocumentationFeedback 83 ProductFolderLinks:LM49370

LM49370 SNAS356D–FEBRUARY2007–REVISEDMARCH2012 www.ti.com REVISION HISTORY Rev Date Description 1.0 02/14/07 Initialrelease. 1.01 01/08/08 FixedatypoonX3value(PhysicalDimensionsection)inthelastpage. 1.02 02/11/08 Textedits. 1.03 03/31/11 Inputeditsandaddedthesection”PLLLOOPFILTER”. 1.04 05/26/11 AddedtheApplicationNotesection. Edited(tweak)Figures16and17(schematicsforMEMandECM microphones)respectively.Alsoaddedtheparagraph“Innon-OCL 1.05 06/02/11 mode,two1kohmresistorsareoptional.......(underFigure9,Connection ofHeadset....) 1.06 03/09/12 Replacedcurve20191721(stereoDACcrosstalk,32Ω)with201917k5 84 SubmitDocumentationFeedback Copyright©2007–2012,TexasInstrumentsIncorporated ProductFolderLinks:LM49370

PACKAGE OPTION ADDENDUM www.ti.com 14-Sep-2018 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LM49370RL/NOPB ACTIVE DSBGA YPG 49 250 Green (RoHS SNAG Level-1-260C-UNLIM -40 to 85 GI3 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 15-Sep-2018 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) LM49370RL/NOPB DSBGA YPG 49 250 178.0 12.4 4.19 4.19 0.76 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 15-Sep-2018 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) LM49370RL/NOPB DSBGA YPG 49 250 210.0 185.0 35.0 PackMaterials-Page2

MECHANICAL DATA YPG0049xxx D 0.650±0.075 E RLA49XXX (Rev B) D: Max = 3.94 mm, Min = 3.88 mm E: Max = 3.94 mm, Min = 3.88 mm 4214898/A 12/12 NOTES: A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994. B. This drawing is subject to change without notice. www.ti.com

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