LM4871 www.ti.com SNAS002F–FEBRUARY2000–REVISEDMAY2013 LM4871 3W Audio Power Amplifier with Shutdown Mode CheckforSamples:LM4871 FEATURES DESCRIPTION 1 • NoOutputCouplingCapacitors,Bootstrap The LM4871 is a mono bridged audio power amplifier 2 capable of delivering 3W of continuous average Capacitors,orSnubberCircuitsRequired power into a 3Ω load with less than 10% THD when • Unity-gainStable powered by a 5V power supply (see Note). To • WSON,VSSOP,SOIC,orPDIPPackaging conserve power in portable applications, the • ExternalGainConfigurationCapability LM4871's micropower shutdown mode (IQ = 0.6µA, typ) is activated when V is applied to the • PinCompatiblewiththeLM4861 DD SHUTDOWNpin. APPLICATIONS Boomer audio power amplifiers are designed specifically to provide high power, high fidelity audio • PortableComputers output. They require few external components and • DesktopComputers operate on low supply voltages from 2.0V to 5.5V. Since the LM4871 does not require output coupling • LowVoltageAudioSystems capacitors, bootstrap capacitors, or snubber networks, it is ideally suited for low-power portable KEY SPECIFICATIONS systemsthatrequireminimumvolumeandweight. • POat10%THD+N,1kHz Additional LM4871 features include thermal shutdown – LM4871LD:3Ω ,4Ω Loads;3W(typ), protection,unity-gainstability,andexternalgainset. 2.5W(typ) Note: An LM4871LD that has been properly mounted – AllotherLM4871Packages:8Ω load to a circuit board will deliver 3W into 3Ω (at 10% 1.5W(typ) THD). The other package options for the LM4871 will • ShutdownCurrent0.6µA(typ) deliver 1.5W into 8Ω (at 10% THD). See the Application Information section for further information • SupplyVoltageRange2.0Vto5.5V concerning the LM4871LD, LM4871MM, LM4871M, • THDat1kHzat1WContinuousAverage andtheLM4871N. OutputPowerinto8Ω 0.5%(max) Connection Diagrams Figure1. VSSOP,SmallOutline,andPDIP Figure2.WSONPackage(TopView) Package SeePackageNumberNGN0008A TopView SeePackageNumberDGK0008A,D0008A,or D0008E 1 Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsof TexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet. Alltrademarksarethepropertyoftheirrespectiveowners. 2 PRODUCTIONDATAinformationiscurrentasofpublicationdate. Copyright©2000–2013,TexasInstrumentsIncorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarilyincludetestingofallparameters.

LM4871 SNAS002F–FEBRUARY2000–REVISEDMAY2013 www.ti.com Typical Application Figure3. TypicalAudioAmplifierApplicationCircuit Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoam duringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates. 2 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM4871

LM4871 www.ti.com SNAS002F–FEBRUARY2000–REVISEDMAY2013 Absolute Maximum Ratings(1)(2) SupplyVoltage 6.0V SupplyTemperature −65°Cto+150°C InputVoltage −0.3VtoV to+0.3V DD PowerDissipation(3) InternallyLimited ESDSusceptibility(4) 5000V ESDSusceptibility(5) 250V JunctionTemperature 150°C SolderingInformation SmallOutlinePackage VaporPhase(60sec.) 215°C Infrared(15sec.) 220°C θ (typ)—D0008A 35°C/W JC θ (typ)—D0008A 140°C/W JA θ (typ)—D0008E 37°C/W JC θ (typ)—D0008E 107°C/W JA θ (typ)—DGK0008A 56°C/W JC θ (typ)—DGK0008A 210°C/W JA θ (typ)—NGN0008A 4.3°C/W JC θ (typ)—NGN0008A 56°C/W(6) JA (1) AbsoluteMaximumRatingsindicatelimitsbeyondwhichdamagetothedevicemayoccur.OperatingRatingsindicateconditionsfor whichthedeviceisfunctional,butdonotensurespecificperformancelimits.ElectricalCharacteristicsstateDCandACelectrical specificationsunderparticulartestconditionswhichensurespecificperformancelimits.Thisassumesthatthedeviceiswithinthe OperatingRatings.Specificationsarenotensuredforparameterswherenolimitisgiven,however,thetypicalvalueisagoodindication ofdeviceperformance. (2) IfMilitary/Aerospacespecifieddevicesarerequired,pleasecontacttheTexasInstrumentsSalesOffice/Distributorsforavailabilityand specifications. (3) ThemaximumpowerdissipationmustbederatedatelevatedtemperaturesandisdictatedbyT ,θ ,andtheambienttemperature JMAX JA T .ThemaximumallowablepowerdissipationisP =(T –T )/θ orthenumbergiveninAbsoluteMaximumRatings,whichever A DMAX JMAX A JA islower.FortheLM4871,T =150°C.Fortheθ 'sfordifferentpackages,pleaseseetheApplicationInformationsectionorthe JMAX JA absolutemaximumratingssection. (4) Humanbodymodel,100pFdischargedthrougha1.5kΩresistor. (5) MachineModel,220pF–240pFdischargedthroughallpins. (6) Thegivenθ isforanLM4871packagedinanNGN0008AwiththeExposed–DAPsolderedtoanexposed1in2areaof1ozprinted JA circuitboardcopper. Operating Ratings TemperatureRangeT ≤T ≤T −40°C≤T ≤85°C MIN A MAX A SupplyVoltage 2.0V≤V ≤5.5V DD Electrical Characteristics(1)(2) ThefollowingspecificationsapplyforV =5VandR =8Ωunlessotherwisespecified.LimitsapplyforT =25°C. DD L A LM4871 Symbol Parameter Conditions Min(3) Typical(4) Limit(3) Units (Limits) V SupplyVoltage 2.0 5.5 V DD I QuiescentPowerSupply V =0V,I =0A 6.5 10.0 mA DD IN o Current I ShutdownCurrent V =V 0.6 2 µA SD PIN1 DD V OutputOffsetVoltage V =0V 5.0 50 mV OS IN (1) AbsoluteMaximumRatingsindicatelimitsbeyondwhichdamagetothedevicemayoccur.OperatingRatingsindicateconditionsfor whichthedeviceisfunctional,butdonotensurespecificperformancelimits.ElectricalCharacteristicsstateDCandACelectrical specificationsunderparticulartestconditionswhichensurespecificperformancelimits.Thisassumesthatthedeviceiswithinthe OperatingRatings.Specificationsarenotensuredforparameterswherenolimitisgiven,however,thetypicalvalueisagoodindication ofdeviceperformance. (2) Allvoltagesaremeasuredwithrespecttothegroundpin,unlessotherwisespecified. (3) Typicalsarespecifiedat25°Candrepresenttheparametricnorm. (4) LimitsarespecifiedtoTI'sAOQL(AverageOutgoingQualityLevel). Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLinks:LM4871

LM4871 SNAS002F–FEBRUARY2000–REVISEDMAY2013 www.ti.com Electrical Characteristics(1)(2) (continued) ThefollowingspecificationsapplyforV =5VandR =8Ωunlessotherwisespecified.LimitsapplyforT =25°C. DD L A LM4871 Symbol Parameter Conditions Min(3) Typical(4) Limit(3) Units (Limits) P OutputPower THD=1%,f=1kHz o LM4871LD,RL=3Ω(5) 2.38 W LM4871LD,R =4Ω(5) 2 L LM4871,R =8Ω(5) 1.2 L THD+N=10%,f=1kHz LM4871LD,R =3Ω(5) 3 LM4871LD,RL=4Ω(5) 2.5 W L LM4871,R =8Ω(5) 1.5 L THD+N TotalHarmonic 20Hz≤f≤20kHz,A =2 VD Distortion+Noise LM4871LD,R =4Ω,P =1.6W 0.13 % L O LM4871,R =8Ω,P =1W 0.25 L O PSRR PowerSupplyRejectionRatio V =4.9Vto5.1V 60 dB DD (5) Whendriving3Ωor4Ωloadsfroma5Vsupply,theLM4871LDmustbemountedtoacircuitboard. External Components Description (Figure3) Components FunctionalDescription 1. R Invertinginputresistancethatsetstheclosed-loopgaininconjunctionwithR.Thisresistoralsoformsahighpassfilter i f withC atf =1/(2πRC). i C i i 2. C InputcouplingcapacitorthatblockstheDCvoltageattheamplifiersinputterminals.Alsocreatesahighpassfilterwith i R atf =1/(2πRC).Refertothesection,ProperSelectionofExternalComponents,foranexplanationofhowto i c i i determinethevalueofC. i 3. R Feedbackresistancethatsetstheclosed-loopgaininconjunctionwithR. f i 4. C Supplybypasscapacitorthatprovidespowersupplyfiltering.RefertothePowerSupplyBypassingsectionfor S informationconcerningproperplacementandselectionofthesupplybypasscapacitor. 5. C Bypasspincapacitorthatprovideshalf-supplyfiltering.Refertothesection,ProperSelectionofExternalComponents, B forinformationconcerningproperplacementandselectionofC . B 4 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM4871

LM4871 www.ti.com SNAS002F–FEBRUARY2000–REVISEDMAY2013 Typical Performance Characteristics NGN Specific Characteristics LM4871LDTHD+NvsOutputPower LM4871LDTHD+NvsFrequency Figure4. Figure5. LM4871LDTHD+NvsFrequency LM4871LDTHD+NvsOutputPower Figure6. Figure7. LM4871LDPowerDissipationvsOutputPower LM4871LDPowerDeratingCurve ThiscurveshowstheLM4871LD'sthermaldissipationabilityat differentambienttemperaturesgiventheexposed-DAPofthepartis solderedtoaplaneof1oz.Cuwithanareagiveninthelabelofeach curve.Thislabelalsodesignateswhethertheplaneexistsonthe same(top)layerasthechip,onthebottomlayer,oronbothlayers. Infiniteheatsinkandunattached(noheatsink)conditionsarealso shown. Figure8. Figure9. Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLinks:LM4871

LM4871 SNAS002F–FEBRUARY2000–REVISEDMAY2013 www.ti.com Typical Performance Characteristics Non-NGN Specific Characteristics THD+NvsFrequency THD+NvsFrequency Figure10. Figure11. THD+NvsFrequency THD+NvsOutputPower Figure12. Figure13. THD+NvsOutputPower THD+NvsOutputPower Figure14. Figure15. 6 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM4871

LM4871 www.ti.com SNAS002F–FEBRUARY2000–REVISEDMAY2013 Typical Performance Characteristics Non-NGN Specific Characteristics (continued) OutputPowervsSupplyVoltage OutputPowervsSupplyVoltage Figure16. Figure17. OutputPowervsSupplyVoltage OutputPowervsLoadResistance Figure18. Figure19. PowerDissipationvsOutputPower PowerDeratingCurve Figure20. Figure21. Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLinks:LM4871

LM4871 SNAS002F–FEBRUARY2000–REVISEDMAY2013 www.ti.com Typical Performance Characteristics Non-NGN Specific Characteristics (continued) ClippingVoltagevsSupplyVoltage NoiseFloor Figure22. Figure23. FrequencyResponsevsInputCapacitorSize PowerSupplyRejectionRatio Figure24. Figure25. OpenLoopFrequencyResponse SupplyCurrentvsSupplyVoltage Figure26. Figure27. 8 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM4871

LM4871 www.ti.com SNAS002F–FEBRUARY2000–REVISEDMAY2013 APPLICATION INFORMATION EXPOSED-DAP PACKAGE PCB MOUNTING CONSIDERATION The LM4871's exposed-DAP (die attach paddle) package (NGN) provides a low thermal resistance between the die and the PCB to which the part is mounted and soldered. This allows rapid heat transfer from the die to the surrounding PCB copper traces, ground plane, and surrounding air. The result is a low voltage audio power amplifier that produces 2W at ≤ 1% THD with a 4Ω load. This high power is achieved through careful consideration of necessary thermal design. Failing to optimize thermal design may compromise the LM4871's highpowerperformanceandactivateunwanted,thoughnecessary,thermalshutdownprotection. The NGN package must have its DAP soldered to a copper pad on the PCB. The DAP's PCB copper pad is connected to a large plane of continuous unbroken copper. This plane forms a thermal mass, heat sink, and radiation area. Place the heat sink area on either outside plane in the case of a two-sided PCB, or on an inner layer of a board with more than two layers. Connect the DAP copper pad to the inner layer or backside copper heatsinkareawith4(2x2)vias.Theviadiametershouldbe0.012in-0.013inwitha1.27mmpitch.Ensureefficient thermalconductivitybyplatingthroughthevias. Bestthermalperformanceisachievedwiththelargestpracticalheatsinkarea.Iftheheatsinkandamplifiershare the same PCB layer, a nominal 2.5in2 area is necessary for 5V operation with a 4Ω load. Heatsink areas not placed on the same PCB layer as the LM4871 should be 5in2 (min) for the same supply voltage and load resistance. The last two area recommendations apply for 25°C ambient temperature. Increase the area to compensate for ambient temperatures above 25°C. The LM4871's power de-rating curve in the Typical Performance Characteristics shows the maximum power dissipation versus temperature. An example PCB layout for the NGN package is shown in the Demonstration Board Layout section. Further detailed and specific information concerning PCB layout, fabrication, and mounting an NGN (WSON) package is available from TI's PackageEngineeringGroupunderapplicationnoteAN-1187(LiteratureNumberSNOA401). PCB LAYOUT AND SUPPLY REGULATION CONSIDERATIONS FOR DRIVING 3Ω AND 4Ω LOADS Power dissipated by a load is a function of the voltage swing across the load and the load's impedance. As load impedance decreases, load dissipation becomes increasingly dependant on the interconnect (PCB trace and wire) resistance between the amplifier output pins and the load's connections. Residual trace resistance causes a voltage drop, which results in power dissipated in the trace and not in the load as desired. For example, 0.1Ω trace resistance reduces the output power dissipated by a 4Ω load from 2.0W to 1.95W. This problem of decreased load dissipation is exacerbated as load impedance decreases. Therefore, to maintain the highest load dissipation and widest output voltage swing, PCB traces that connect the output pins to a load must be as wide aspossible. Poor power supply regulation adversely affects maximum output power. A poorly regulated supply's output voltage decreases with increasing load current. Reduced supply voltage causes decreased headroom, output signal clipping, and reduced output power. Even with tightly regulated supplies, trace resistance creates the same effects as poor supply regulation. Therefore, making the power supply traces as wide as possible helps maintainfulloutputvoltageswing. BRIDGE CONFIGURATION EXPLANATION As shown in Figure 3, the LM4871 has two operational amplifiers internally, allowing for a few different amplifier configurations. The first amplifier's gain is externally configurable; the second amplifier is internally fixed in a unity-gain,invertingconfiguration.Theclosed-loopgainofthefirstamplifierissetbyselectingtheratioofR toR f i while the second amplifier's gain is fixed by the two internal 40kΩ resistors. Figure 3 shows that the output of amplifier one serves as the input to amplifier two, which results in both amplifiers producing signals identical in magnitude,but180°outofphase.Consequently,thedifferentialgainfortheICis A =2*(R/R) (1) VD f i BydrivingtheloaddifferentiallythroughoutputsVo1andVo2,anamplifierconfigurationcommonlyreferredtoas “bridged mode” is established. Bridged mode operation is different from the classical single-ended amplifier configurationwhereonesideofitsloadisconnectedtoground. Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLinks:LM4871

LM4871 SNAS002F–FEBRUARY2000–REVISEDMAY2013 www.ti.com A bridge amplifier design has a few distinct advantages over the single-ended configuration, as it provides differential drive to the load, thus doubling output swing for a specified supply voltage. Four times the output powerispossibleascomparedtoasingle-endedamplifierunderthesameconditions.Thisincreaseinattainable output power assumes that the amplifier is not current limited or clipped. In order to choose an amplifier's closed- loopgainwithoutcausingexcessiveclipping,pleaserefertotheAudioPowerAmplifierDesignsection. Another advantage of the differential bridge output is no net DC voltage across load. This results from biasing V 1 and V 2 at the same DC voltage, in this case V /2 . This eliminates the coupling capacitor that single O O DD supply, single-ended amplifiers require. Eliminating an output coupling capacitor in a single-ended configuration forces a single supply amplifier's half-supply bias voltage across the load. The current flow created by the half- supply bias voltage increases internal IC power dissipation and my permanently damage loads such as speakers. POWER DISSIPATION Power dissipation is a major concern when designing a successful amplifier, whether the amplifier is bridged or single-ended. A direct consequence of the increased power delivered to the load by a bridge amplifier is an increase in internal power dissipation. Equation 2 states the maximum power dissipation point for a bridge amplifieroperatingatagivensupplyvoltageanddrivingaspecifiedoutputload. P =4*(V )2/(2π2R ) (2) DMAX DD L Since the LM4871 has two operational amplifiers in one package, the maximum internal power dissipation is 4 times that of a single-ended ampifier. Even with this substantial increase in power dissipation, the LM4871 does not require heatsinking under most operating conditions and output loading. From Equation 2, assuming a 5V powersupplyandan8Ω load,themaximumpowerdissipationpointis625mW.Themaximumpowerdissipation pointobtainedfromEquation2mustnotbegreaterthanthepowerdissipationthatresultsfromEquation3: P =(T –T )/θ (3) DMAX JMAX A JA For the SOIC package, θ = 140°C/W, for the PDIP package, θ = 107°C/W, and for the VSSOP package, θ JA JA JA = 210°C/W assuming free air operation. For the NGN package soldered to a DAP pad that expands to a copper area of 1.0in2 on a PCB, the LM4871's θ is 56°C/W. T = 150°C for the LM4871. The θ can be decreased JA JMAX JA by using some form of heat sinking. The resultant θ will be the summation of the θ , θ , and θ . θ is the JA JC CS SA JC junction to case of the package (or to the exposed DAP, as is the case with the NGN package), θ is the case CS to heat sink thermal resistance and θ is the heat sink to ambient thermal resistance. By adding additional SA copper area around the LM4871, the θ can be reduced from its free air value for the SOIC and VSSOP JA packages. Increasing the copper area around the NGN package from 1.0in2 to 2.0in2 area results in a θ JA decreaseto46°C/W.Dependingontheambienttemperature,T ,andtheθ ,Equation3canbeusedtofindthe A JA maximum internal power dissipation supported by the IC packaging. If the result of Equation 2 is greater than that of Equation 3, then either the supply voltage must be decreased, the load impedance increased, the θ JA decreased, or the ambient temperature reduced. For the typical application of a 5V power supply, with an 8Ω load, and no additional heatsinking, the maximum ambient temperature possible without violating the maximum junction temperature is approximately 61°C provided that device operation is around the maximum power dissipation point and assuming surface mount packaging. For the NGN package in a typical application of a 5V power supply, with a 4Ω load, and 1.0in2 copper area soldered to the exposed DAP pad, the maximum ambient temperature is approximately 77°C providing device operation is around the maximum power dissipation point. Internal power dissipation is a function of output power. If typical operation is not around the maximum power dissipation point, the ambient temperature can be increased. Refer to the Typical Performance Characteristics curvesforpowerdissipationinformationfordifferentoutputpowersandoutputloading. POWER SUPPLY BYPASSING As with any amplifier, proper supply bypassing is critical for low noise performance and high power supply rejection. The capacitor location on both the bypass and power supply pins should be as close to the LM4871 as possible. The capacitor connected between the bypass pin and ground improves the internal bias voltage's stability,producingimprovedPSRR.TheimprovementstoPSRRincreaseasthebypasspincapacitorincreases. Typicalapplicationsemploya5Vregulatorwith10µFanda0.1µFbypasscapacitorswhichaidinsupplystability. This does not eliminate the need for bypassing the supply nodes of the LM4871 with a 1µF tantalum capacitor. The selection of bypass capacitors, especially C , is dependent upon PSRR requirements, click and pop B performance as explained in the section, Proper Selection of External Components, system cost, and size constraints. 10 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM4871

LM4871 www.ti.com SNAS002F–FEBRUARY2000–REVISEDMAY2013 SHUTDOWN FUNCTION Inordertoreducepowerconsumptionwhilenotinuse,theLM4871containsashutdownpintoexternallyturnoff the amplifier's bias circuitry. This shutdown feature turns the amplifier off when a logic high is placed on the shutdown pin. The trigger point between a logic low and logic high level is typically half- supply. It is best to switch between ground and supply to provide maximum device performance. By switching the shutdown pin to V , the LM4871 supply current draw will be minimized in idle mode. While the device will be disabled with DD shutdown pin voltages less then V , the idle current may be greater than the typical value of 0.6µA. In either DD case,theshutdownpinshouldbetiedtoadefinitevoltagetoavoidunwantedstatechanges. In many applications, a microcontroller or microprocessor output is used to control the shutdown circuitry which provides a quick, smooth transition into shutdown. Another solution is to use a single-pole, single-throw switch in conjunction with an external pull-up resistor. When the switch is closed, the shutdown pin is connected to ground and enables the amplifier. If the switch is open, then the external pull-up resistor will disable the LM4871. This schemeensuresthattheshutdownpinwillnotfloatthuspreventingunwantedstatechanges. PROPER SELECTION OF EXTERNAL COMPONENTS Proper selection of external components in applications using integrated power amplifiers is critical to optimize device and system performance. While the LM4871 is tolerant of external component combinations, considerationtocomponentvaluesmustbeusedtomaximizeoverallsystemquality. TheLM4871isunity-gainstablewhichgivesadesignermaximumsystemflexibility.TheLM4871shouldbeused in low gain configurations to minimize THD+N values, and maximize the signal to noise ratio. Low gain configurations require large input signals to obtain a given output power. Input signals equal to or greater than 1 Vrms are available from sources such as audio codecs. Please refer to the section, Audio Power Amplifier Design,foramorecompleteexplanationofpropergainselection. Besidesgain,oneofthemajorconsiderationsistheclosed-loopbandwidthoftheamplifier.Toalargeextent,the bandwidth is dictated by the choice of external components shown in Audio Power Amplifier Design. The input coupling capacitor, C, forms a first order high pass filter which limits low frequency response. This value should i bechosenbasedonneededfrequencyresponseforafewdistinctreasons. SelectionOfInputCapacitorSize Large input capacitors are both expensive and space hungry for portable designs. Clearly, a certain sized capacitor is needed to couple in low frequencies without severe attenuation. But in many cases the speakers used in portable systems, whether internal or external, have little ability to reproduce signals below 100Hz to 150Hz.Thus,usingalargeinputcapacitormaynotincreaseactualsystemperformance. In addition to system cost and size, click and pop performance is effected by the size of the input coupling capacitor, C A larger input coupling capacitor requires more charge to reach its quiescent DC voltage (nominally i. 1/2 V ). This charge comes from the output via the feedback and is apt to create pops upon device enable. DD Thus, by minimizing the capacitor size based on necessary low frequency response, turn-on pops can be minimized. Besides minimizing the input capacitor size, careful consideration should be paid to the bypass capacitor value. Bypass capacitor, C , is the most critical component to minimize turn-on pops since it determines how fast the B LM4871 turns on. The slower the LM4871's outputs ramp to their quiescent DC voltage (nominally 1/2 V ), the DD smaller the turn-on pop. Choosing C equal to 1.0µF along with a small value of C (in the range of 0.1µF to B i 0.39µF), should produce a virtually clickless and popless shutdown function. While the device will function properly, (no oscillations or motorboating), with C equal to 0.1µF, the device will be much more susceptible to B turn-on clicks and pops. Thus, a value of C equal to 1.0µF is recommended in all but the most cost sensitive B designs. Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLinks:LM4871

LM4871 SNAS002F–FEBRUARY2000–REVISEDMAY2013 www.ti.com AUDIO POWER AMPLIFIER DESIGN Designa1W/8Ω AudioAmplifier Given: PowerOutput 1Wrms LoadImpedance 8Ω InputLevel 1Vrms InputImpedance 20kΩ Bandwidth 100Hz–20kHz ±0.25dB A designer must first determine the minimum supply rail to obtain the specified output power. By extrapolating from the Output Power vs Supply Voltage graphs in the Typical Performance Characteristics section, the supply rail can be easily found. A second way to determine the minimum supply rail is to calculate the required V opeak using Equation 4 and add the output voltage. Using this method, the minimum supply voltage would be (V + opeak (V +V )),whereV andV areextrapolatedfromtheDropoutVoltagevsSupplyVoltagecurvein ODTOP ODBOT ODBOT ODTOP theTypicalPerformanceCharacteristicssection. (4) UsingtheOutputPowervsSupplyVoltagegraphforan8Ω load,theminimumsupplyrailis4.6V.Butsince5Vis a standard voltage in most applications, it is chosen for the supply rail. Extra supply voltage creates headroom thatallowstheLM4871toreproducepeaksinexcessof1Wwithoutproducingaudibledistortion.Atthistime,the designer must make sure that the power supply choice along with the output impedance does not violate the conditionsexplainedinthePOWERDISSIPATIONsection. Once the power dissipation equations have been addressed, the required differential gain can be determined fromEquation5. (5) R/R =A /2 (6) f i VD FromEquation5,theminimumA is2.83;useA =3. VD VD Since the desired input impedance was 20kΩ, and with a A impedance of 2, a ratio of 1.5:1 of R to R results VD f i in an allocation of R = 20kΩ and R = 30kΩ. The final design step is to address the bandwidth requirements i f which must be stated as a pair of −3dB frequency points. Five times away from a −3dB point is 0.17dB down frompassbandresponsewhichisbetterthantherequired±0.25dBspecified. f =100Hz/5=20Hz L f =20kHz*5=100kHz H AsstatedintheExternalComponentsDescriptionsection,R inconjunctionwithC createahighpassfilter. i i C ≥1/(2π*20kΩ*20Hz)=0.397µF;use0.39µF i The high frequency pole is determined by the product of the desired frequency pole, f , and the differential gain, H A . With a A = 3 and f = 100kHz, the resulting GBWP = 150kHz which is much smaller than the LM4871 VD VD H GBWP of 4MHz. This figure displays that if a designer has a need to design an amplifier with a higher differential gain,theLM4871canstillbeusedwithoutrunningintobandwidthlimitations. 12 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM4871

LM4871 www.ti.com SNAS002F–FEBRUARY2000–REVISEDMAY2013 Demonstration Board Layout Figure28.RecommendedNGNPCBoardLayout: Figure29.RecommendedNGNPCBoardLayout: Component-SideSilkscreen Component-SideLayout Figure30.RecommendedNGNPCBoardLayout:Bottom-SideLayout LM4871 MDA MWA 3W Audio Power Amplifier With Shutdown Mode Figure31. DieLayout(C-Step) Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLinks:LM4871

LM4871 SNAS002F–FEBRUARY2000–REVISEDMAY2013 www.ti.com Die/Wafer Characteristics FabricationAttributes GeneralDieInformation PhysicalDieIdentification LM4871C BondPadOpeningSize(min) 102µmx102µm DieStep C BondPadMetalization 0.5%COPPER_BAL. ALUMINUM PhysicalAttributes Passivation NITRIDE WaferDiameter 150mm BackSideMetal BAREBACK DiseSize(Drawn) 1372µmx1758µm BackSideConnection GND 54milsx69mils Thickness 406µmNominal MinPitch 164µmNominal SpecialAssemblyRequirements: Note:Actualdiesizeisroundedtothenearestmicron. DieBondPadCoordinateLocations(C-Step) (Referencedtodiecenter,coordinatesinµm)NC=NoConnection X/YCOORDINATES PADSIZE SIGNALNAME PAD#NUMBER X Y X Y SHUTDOWN 1 -559 541 102 x 102 BYPASS 2 -559 376 102 x 102 NC 3 -559 -45 102 x 210 INPUT+ 4 -559 -248 102 x 102 INPUT- 5 -559 -486 102 x 102 GND 6 -476 -725 102 x 102 VOUT1 7 -135 -598 102 x 210 GND 8 554 -686 102 x 102 VDD 9 554 -4 102 x 210 GND 10 554 568 102 x 102 VOUT2 11 -135 598 102 x 210 GND 12 -473 752 102 x 102 14 SubmitDocumentationFeedback Copyright©2000–2013,TexasInstrumentsIncorporated ProductFolderLinks:LM4871

LM4871 www.ti.com SNAS002F–FEBRUARY2000–REVISEDMAY2013 REVISION HISTORY ChangesfromRevisionE(May2013)toRevisionF Page • ChangedlayoutofNationalDataSheettoTIformat.......................................................................................................... 14 Copyright©2000–2013,TexasInstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLinks:LM4871

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) (6) (3) (4/5) LM4871LD/NOPB ACTIVE WSON NGN 8 1000 Green (RoHS SN Level-3-260C-168 HR -40 to 85 L4871 & no Sb/Br) LM4871M ACTIVE SOIC D 8 95 TBD Call TI Call TI -40 to 85 4871 LM4871M/NOPB ACTIVE SOIC D 8 95 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 4871 & no Sb/Br) LM4871MM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 G71 & no Sb/Br) LM4871MMX/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 G71 & no Sb/Br) LM4871MX ACTIVE SOIC D 8 2500 TBD Call TI Call TI -40 to 85 4871 LM4871MX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS SN Level-1-260C-UNLIM -40 to 85 4871 & no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 1

PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 15-Sep-2018 TAPE AND REEL INFORMATION *Alldimensionsarenominal Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1(mm) LM4871LD/NOPB WSON NGN 8 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 LM4871MM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM4871MMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM4871MX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM4871MX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 PackMaterials-Page1

PACKAGE MATERIALS INFORMATION www.ti.com 15-Sep-2018 *Alldimensionsarenominal Device PackageType PackageDrawing Pins SPQ Length(mm) Width(mm) Height(mm) LM4871LD/NOPB WSON NGN 8 1000 210.0 185.0 35.0 LM4871MM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LM4871MMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0 LM4871MX SOIC D 8 2500 367.0 367.0 35.0 LM4871MX/NOPB SOIC D 8 2500 367.0 367.0 35.0 PackMaterials-Page2

PACKAGE OUTLINE NGN0008A WSON - 0.8 mm max height SCALE 3.000 PLASTIC SMALL OUTLINE - NO LEAD 4.1 B A 3.9 PIN 1 INDEX AREA 4.1 3.9 PIN 1 ID DETAIL A PIN 1 ID C 0.8 MAX SEATING PLANE 0.05 0.08 C 0.00 2.2 0.05 EXPOSED SYMM (0.2) TYP THERMAL PAD 6X 0.8 4 5 2X 9 SYMM 2.4 3 0.05 SEE DETAIL A 8 1 0.35 (0.25) 8X 0.25 0.6 (0.25) (0.2) 8X 0.1 C A B 0.4 PIN 1 ID (0.15) 0.05 C 4214794/A 11/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. www.ti.com

EXAMPLE BOARD LAYOUT NGN0008A WSON - 0.8 mm max height PLASTIC SMALL OUTLINE - NO LEAD (2.2) 8X (0.5) SYMM 1 8X (0.3) 8 SYMM 9 (3) (1.25) 6X (0.8) 4 5 (R0.05) TYP ( 0.2) VIA TYP (0.85) (3.3) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X 0.07 MAX 0.07 MIN ALL AROUND ALL AROUND EXPOSED EXPOSED METAL METAL SOLDER MASK METAL METAL UNDER SOLDER MASK OPENING SOLDER MASK OPENING NON SOLDER MASK SOLDER MASK DEFINED DEFINED (PREFERRED) SOLDER MASK DETAILS 4214794/A 11/2019 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. www.ti.com

EXAMPLE STENCIL DESIGN NGN0008A WSON - 0.8 mm max height PLASTIC SMALL OUTLINE - NO LEAD 0.59 SYMM METAL 8X (0.5) TYP 1 8X (0.3) 8 4X (1.31) SYMM 9 (0.755) 6X (0.8) 5 4 (R0.05) TYP 4X (0.98) (3.3) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 9: 78% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SCALE:20X 4214794/A 11/2019 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com

PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] .004 [0.1] C A PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .189-.197 [4.81-5.00] .150 NOTE 3 [3.81] 4X (0 -15 ) 4 5 8X .012-.020 B .150-.157 [0.31-0.51] .069 MAX [3.81-3.98] .010 [0.25] C A B [1.75] NOTE 4 .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 0 - 8 [0.11-0.25] .016-.050 [0.41-1.27] DETAIL A (.041) TYPICAL [1.04] 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com

EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SOLDER MASK SOLDER MASK METAL OPENING OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL .0028 MAX .0028 MIN [0.07] [0.07] ALL AROUND ALL AROUND NON SOLDER MASK SOLDER MASK DEFINED DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com

EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] SYMM (R.002 ) TYP [0.05] 5 4 6X (.050 ) [1.27] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com

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