High Accuracy Instrumentation Amplifier AMP02 FEATURES FUNCTIONAL BLOCK DIAGRAM Low Offset Voltage: 100 (cid:1)V max Low Drift: 2 (cid:1)V/(cid:2)C max 8-Lead PDIP and CERDIP 16-Lead SOIC Wide Gain Range: 1 to 10,000 High Common-Mode Rejection: 115 dB min High Bandwidth (G = 1000): 200 kHz typ RG1 1 8 RG2 NC 1 16 NC Gain Equation Accuracy: 0.5% max –IN 2 7 V+ RG1 2 15 RG2 Single Resistor Gain Set +IN 3 6 OUT NC 3 14 NC Input Overvoltage Protection V– 4 5 REFERENCE –IN 4 13 V+ Low Cost +IN 5 12 SENSE Available in Die Form NC 6 11 OUT V– 7 10 REFERENCE APPLICATIONS Differential Amplifier NC 8 9 NC Strain Gage Amplifier NC = NO CONNECT Thermocouple Amplifier V+ RTD Amplifier Programmable Gain Instrumentation Amplifier 3 7 +IN – MDaetdai cAacl qInusistirtuiomne Snytasttieomns –IN RG 182 +RRGG12 5 6 OUT 4 REFERENCE V– G = V O U T = ( 5 0 k (cid:3) ) + 1 (+IN) – (–IN) RG FOR SOL CONNECT SENSE TO OUTPUT Figure 1.Basic Circuit Connections GENERAL DESCRIPTION Due to the AMP02’s design, its bandwidth remains very high The AMP02 is the first precision instrumentation amplifier over a wide range of gain. Slew rate is over 4 V/µs, making the available in an 8-lead package. Gain of the AMP02 is set by a AMP02 ideal for fast data acquisition systems. single external resistor and can range from 1 to 10,000. No A reference pin is provided to allow the output to be referenced gain set resistor is required for unity gain. The AMP02 includes to an external dc level. This pin may be used for offset correc- an input protection network that allows the inputs to be taken tion or level shifting as required. In the 8-lead package, sense is 60 V beyond either supply rail without damaging the device. internally connected to the output. Laser trimming reduces the input offset voltage to under 100 µV. For an instrumentation amplifier with the highest precision, Output offset voltage is below 4 mV, and gain accuracy is better consult the AMP01 data sheet. than 0.5% for a gain of 1000. ADI’s proprietary thin-film resis- tor process keeps the gain temperature coefficient under 50 ppm/°C. REV.E Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. under any patent or patent rights of Analog Devices. Trademarks and Tel: 781/329-4700 www.analog.com registered trademarks are the property of their respective companies. Fax: 781/326-8703 © Analog Devices, Inc., 2002. All rights reserved.

AMP02–SPECIFICATIONS ELECTRICAL CHARACTERISTICS (@ V = (cid:4)15 V, V = 0 V, T = 25(cid:2)C, unless otherwise noted.) S CM A AMP02E AMP02F Parameter Symbol Conditions Min Typ Max Min Typ Max Unit OFFSET VOLTAGE Input Offset Voltage V T = 25°C 20 100 40 200 µV IOS A –40°C ≤ T ≤ +85°C 50 200 100 350 µV A Input Offset Voltage Drift TCV –40°C ≤ T ≤ +85°C 0.5 2 1 4 µV/°C IOS A Output Offset Voltage V T = 25°C 1 4 2 8 mV OOS A –40°C ≤ T ≤ +85°C 4 10 9 20 mV A Output Offset Voltage Drift TCV –40°C ≤ T ≤ +85°C 50 100 100 200 µV/°C OOS A Power Supply Rejection PSR V = ±4.8 V to ±18 V S G = 100, 1000 115 125 110 115 dB G = 10 100 110 95 100 dB G = 1 80 90 75 80 dB V = ±4.8 V to ±18 V S –40°C ≤ T ≤ +85°C A G = 1000, 100 110 120 105 110 dB G = 10 95 110 90 95 dB G = 1 75 90 70 75 dB INPUT CURRENT Input Bias Current I T = 25°C 2 10 4 20 nA B A Input Bias Current Drift TCI –40°C ≤ T ≤ +85°C 150 250 pA/°C B A Input Offset Current I T = 25°C 1.2 5 2 10 nA OS A Input Offset Current Drift TCI –40°C ≤ T ≤ +85°C 9 15 pA/°C OS A INPUT Input Resistance R Differential, G ≤ 1000 10 10 GΩ IN Common Mode, G = 1000 16.5 16.5 GΩ Input Voltage Range IVR T = 25°C1 ±11 ±11 V A Common-Mode Rejection CMR V = ±11 V CM G = 1000, 100 115 120 110 115 dB G = 10 100 115 95 110 dB G = 1 80 95 75 90 dB V = ±11 V CM –40°C ≤ T ≤ +85°C A G = 100, 1000 110 120 105 115 dB G = 10 95 110 90 105 dB G = 1 75 90 70 85 dB GAIN Gain Equation 50 kΩ G = 1000 0.50 0.70 % Accuracy G = +1 G = 100 0.30 0.50 % RG G = 10 0.25 0.40 % G = 1 0.02 0.05 % Gain Range G 1 10k 1 10k V/V Nonlinearity G = 1 to 1000 0.006 0.006 % Temperature Coefficient G 1 ≤ G ≤ 10002, 3 20 50 20 50 ppm/°C TC OUTPUT RATING Output Voltage Swing V T = 25°C, R = 1 kΩ ±12 ±13 ±12 ±13 V OUT A L R = 1 kΩ, –40°C ≤ T ≤ +85°C ±11 ±12 ±11 ±12 V L A Positive Current Limit Output-to-Ground Short 22 22 mA Negative Current Limit Output-to-Ground Short 32 32 mA NOISE Voltage Density, RTI e f = 1 kHz n O G = 1000 9 9 nV/√Hz G = 100 10 10 nV/√Hz G = 10 18 18 nV/√Hz G = 1 120 120 nV/√Hz Noise Current Density, RTI i f = 1 kHz, G = 1000 0.4 0.4 pA/√Hz n O Input Noise Voltage e p-p 0.1 Hz to 10 Hz n G = 1000 0.4 0.4 µV p-p G = 100 0.5 0.5 µV p-p G = 10 1.2 1.2 µV p-p DYNAMIC RESPONSE Small-Signal Bandwidth BW G = 1 1200 1200 kHz (–3 dB) G = 10 300 300 kHz G = 100, 1000 200 200 kHz Slew Rate SR G = 10, R = 1 kΩ 4 6 4 6 V/µs L Settling Time t To 0.01% ±10 V Step S G = 1 to 1000 10 10 µs SENSE INPUT Input Resistance R 25 25 kΩ IN Voltage Range ±11 ±11 V REFERENCE INPUT Input Resistance R 50 50 kΩ IN Voltage Range ±11 ±11 V Gain to Output 1 1 V/V –2– REV. E

AMP02 AMP02E AMP02F Parameter Symbol Conditions Min Typ Max Min Typ Max Unit POWER SUPPLY Supply Voltage Range V ±4.5 ±18 ±4.5 ±18 V S Supply Current I T = 25°C 5 6 5 6 mA SY A –40°C ≤ T ≤ +85°C 5 6 5 6 mA A NOTES 1Input voltage range guaranteed by common-mode rejection test. 2Guaranteed by design. 3Gain tempco does not include the effects of external component drift. Specifications subject to change without notice. ABSOLUTE MAXIMUM RATINGS1, 2 NOTES Supply Voltage ±18 V 1Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the Common-Mode Input Voltage [(V–) – 60 V] to [(V+) + 60 V] device at these or any other conditions above those listed in the operational sections Differential Input Voltage [(V–) – 60 V] to [(V+) + 60 V] of this specifications is not implied. Exposure to absolute maximum rating Output Short-Circuit Duration Continuous conditions for extended periods may affect device reliability. Operating Temperature Range –40°C to +85°C 2Absolute maximum ratings apply to both DICE and packaged parts, unless Storage Temperature Range –65°C to +150°C otherwise noted. 3θ is specified for worst case mounting conditions, i.e., θ is specified for Function Temperature Range –65°C to +150°C dJeAvice in socket for P-DIP package; θ is specified for deJvAice soldered to Lead Temperature (Soldering, 10 sec) 300°C printed circuit board for SOIC packagJAe. Package Type (cid:5) 3 (cid:5) Unit JA JC 8-Lead Plastic DIP (P) 96 37 °C/W 16-Lead SOIC (S) 92 27 °C/W ORDERING GUIDE V max @ V max @ Temperature Package IOS OOS Model T = 25(cid:2)C T = 25(cid:2)C Range Description A A AMP02EP 100 µV 4 mV –40°C to +85°C 8-Lead Plastic DIP AMP02FP 200 µV 8 mV –40°C to +85°C 8-Lead Plastic DIP AMP02AZ/883C 200 µV 10 mV –55°C to +125°C 8-Lead CERDIP AMP02FS 200 µV 8 mV –40°C to +85°C 16-Lead SOIC AMP02GBC Die AMP02FS-REEL 200 µV 8 mV –40°C to +85°C 16-Lead SOIC V+ 25k(cid:3) SENSE 25k(cid:3) 25k(cid:3) OUT 25k(cid:3) REFERENCE –IN +IN RG1RG2 V– Figure 2.Simplified Schematic REV. E –3–

AMP02 8 1. RG1 2. –IN 3. +IN 4. V– 5. REFERENCE 6. OUT 7. V+ 8. RG2 9. SENSE CONNECT SUBSTRATE TO V– 1 DIE SIZE 0.103 inch (cid:6) 0.116 inch, 11,948 sq. mils (2.62 mm (cid:6) 2.95 mm, 7.73 sq. mm) NOTE: PINS 1 and 8 are KELVIN CONNECTED Die Characteristics WAFER TEST LIMITS* (@ V = (cid:4)15 V, V = 0 V, T = 25(cid:2)C, unless otherwise noted.) S CM A AMP02 GBC Parameter Symbol Conditions Limits Unit Input Offset Voltage V 200 µV max IOS Output Offset Voltage V 8 mV max OOS V = ±4.8 V to ±18 V S G = 1000 110 Power Supply PSR G = 100 110 dB Rejection G = 10 95 G = 1 75 Input Bias Current I 20 nA max B Input Offset Current I 10 nA max OS Input Voltage Range IVR Guaranteed by CMR Tests ±11 V min V = ±11 V CM G = 1000 110 Common-Mode CMR G = 100 110 dB Rejection G = 10 95 G = 1 75 50kΩ Gain Equation Accuracy G= +1,G=1000 0.7 % max RG Output Voltage Swing V R = 1 kΩ ±12 V min OUT L Supply Current I 6 mA max SY *Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AMP02 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. –4– REV. E

Typical Performance Characteristics–AMP02 1100 160 20 TA = 25(cid:2)C 3000 UNITS 400 UNITS TA = 25(cid:2)C 1900000 VS = (cid:4)15V FROM 3 RUNS 140 FVRS O=M (cid:4) 31 5RVUNS V 15 (cid:1) S800 S120 E – UNIT700 UNIT100 LTAG 10 MBER OF 654000000 MBER OF 8600 FFSET VO 5 U U O 0 N300 N 40 UT P 200 IN –5 20 100 0 0 –10 –100–80–60–40–30 0 20 40 60 80 100 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0 (cid:4)5 (cid:4)10 (cid:4)15 (cid:4)20 INPUT OFFSET VOLTAGE – (cid:1)V TCVIOS – (cid:1)V/(cid:2)C POWER SUPPLY VOLTAGE – V TPC 1.Typical Distribution of TPC 2.Typical Distribution TPC 3.Input Offset Voltage Input Offset Voltage of TCV Change vs. Supply Voltage IOS 1100 200 1.5 TA = 25(cid:2)C 3000 UNITS 400 UNITS TA = 25(cid:2)C 1090000 VS = (cid:4)15V FROM 3 RUNS 175 FVRS O=M (cid:4) 31 5RVUNS mV 1.0 S800 S150 E – F UNIT760000 F UNIT125 OLTAG 0.5 MBER O540000 MBER O17050 FFSET V 0 U U O–0.5 N300 N 50 UT P 200 IN–1.0 25 100 0 0 –1.5 –5 –4 –3 –2 –1 0 1 2 3 4 5 0 20 40 60 80 100 120 140 160 0 (cid:4)5 (cid:4)10 (cid:4)15 (cid:4)20 OUTPUT OFFSET VOLTAGE – mV TCVOOS – (cid:1)V/(cid:2)C POWER SUPPLY VOLTAGE – V TPC 4.Typical Distribution of TPC 5.Typical Distribution TPC 6.Output Offset Voltage Output Offset Voltage of TCV Change vs. Supply Voltage OOS 3.0 32 6 VS = (cid:4)15V VS = (cid:4)15V VS = (cid:4)15V VCM = 0V 28 VCM = 0V VCM = 0V A 2.5 5 n A A ENT – 2.0 NT – n 24 NT – n 4 R E 20 E R R R U R R ET C 1.5 S CU 16 S CU 3 S A A OFF 1.0 T BI 12 T BI 2 UT PU 8 PU P N N N 0.5 I I 1 I 4 0 0 0 –50 –25 0 25 50 75 100 –50 –25 0 25 50 75 100 0 (cid:4)5 (cid:4)10 (cid:4)15 (cid:4)20 TEMPERATURE – (cid:2)C TEMPERATURE – (cid:2)C POWER SUPPLY VOLTAGE – V TPC 7.Input Offset Current TPC 8.Input Bias Current TPC 9.Input Bias Current vs. Temperature vs. Temperature vs. Supply Voltage REV. E –5–

AMP02 80 140 140 TA = 25(cid:2)C TA = 25(cid:2)C 60 G = 1000 VS = (cid:4)15V N – dB120 G = 1000 G = 100 N – dB130 VS = (cid:4)15V –dB 40 G = 100 CTIO100 G = 10 CTIO120 GE GAIN 20 G = 10 DE REJE 6800 DE REJE110100 A O G = 1 O VOLT 0 G = 1 ON-M 40 ON-M 90 M M –20 COM 20 TVAS == 2(cid:4)51(cid:2)5CV COM 80 VCM = 2V p-p –40 0 70 1k 10k 100k 1M 10M 1 10 100 1k 10k 100k 1 10 100 1k FREQUENCY – Hz FREQUENCY – Hz VOLTAGE GAIN – G TPC 10.Closed-Loop Voltage TPC 11.Common-Mode Rejection TPC 12.Common-Mode Rejection Gain vs. Frequency vs. Frequency vs. Voltage Gain 140 140 1.000 G = 1000 TA = 25(cid:2)C N – dB120 G = 10 G = 100 N – dB120 GG == 110000 G = 100 ON – % VRVOSL U==T (cid:4)6 =01 025(cid:3)0VV p-p O100 O100 TI EJECTI 80 G = 1 EJECTI 80 G = 1 DISTOR0.100 PLY R 60 PLY R 60 ONIC R SUP 40 R SUP 40 HARM0.010 G = 100 POWE 20 TVAS == 2(cid:4)51(cid:2)5CV POWE 20 TVAS == 2(cid:4)51(cid:2)5CV TOTAL G = 1 G = 10 (cid:7)VS = (cid:4)1V (cid:7)VS = (cid:4)1V 0 0 0.01 1 10 100 1k 10k 100k 1 10 100 1k 10k 100k 10 100 1k 10k FREQUENCY – Hz FREQUENCY – Hz FREQUENCY – Hz TPC 13.Positive PSR vs. Frequency TPC 14.Negative PSR vs. Frequency TPC 15.Total Harmonic Distortion vs. Frequency 70 1k E NOISE DENSITY – nV/ Hz 2345600000 GTVAS = == 1 2(cid:4)0501(cid:2)05CV LTAGE NOISE – nV/ Hz 11000 fTV =AS 1==k 2(cid:4)H51z(cid:2)5CV E VOLTAGE – 200nV/DIV 100mV 1s G O S LTA V NOI O 10 V 0 1 1 10 100 1k 10k 100k 1 10 100 1k TIME – S FREQUENCY – Hz VOLTAGE GAIN – G TPC 16.Voltage Noise Density TPC 17.RTI Voltage Noise TPC 18.0.1 Hz to 10 Hz Noise vs. Frequency Density vs. Gain A = 1000 V –6– REV. E

AMP02 30 16 120 TA = 25(cid:2)C TA = 25(cid:2)C TA = 25(cid:2)C – V 25 VRSL == (cid:4)1k1(cid:3)5V 14 VS = (cid:4)15V 100 VIOSU =T =(cid:4) 2105mVA p-p K AMPLITUDE 2105 VOLTAGE – V 11208 (cid:3)PEDANCE – 6800 K- TO-PEA 10 OUTPUT 46 UTPUT IM 2400 A O PE 5 2 0 0 0 –20 100 1k 10k 100k 1M 10 100 1k 10k 100k 100 1k 10k 100k 1M 10M FREQUENCY – Hz LOAD RESISTANCE – (cid:3) FREQUENCY – Hz TPC 19.Maximum Output Swing TPC 20.Maximum Output Voltage TPC 21.Closed Loop Output vs. Frequency vs. Load Resistance Impedance vs. Frequency 8 8 VS = (cid:4)15V 7 7 A TA = –40(cid:2)C, +25(cid:2)C, +85(cid:2)C m 6 T – 6 (cid:1)Vs RREN 5 TA = –25(cid:2)C, +25(cid:2)C, +85(cid:2)C ATE – 5 U R UPPLY C 4 SLEW 34 S 3 2 1 1 0 (cid:4)5 (cid:4)10 (cid:4)15 (cid:4)20 1 10 100 1k SUPPLY VOLTAGE – V VOLTAGE GAIN – G TPC 22.Supply Current TPC 23.Slew Rate vs. vs. Supply Voltage Voltage Gain REV. E –7–

AMP02 APPLICATIONS INFORMATION The voltage gain can range from 1 to 10,000. A gain set resistor is Input and Output Offset Voltages not required for unity-gain applications. Metal-film or wirewound Instrumentation amplifiers have independent offset voltages resistors are recommended for best results. associated with the input and output stages. The input offset The total gain accuracy of the AMP02 is determined by the component is directly multiplied by the amplifier gain, whereas tolerance of the external gain set resistor, R , combined with the output offset is independent of gain. Therefore at low gain, G gain equation accuracy of the AMP02. Total gain drift combines output-offset errors dominate while at high gain, input-offset the mismatch of the external gain set resistor drift with that of the errors dominate. Overall offset voltage, VOS, referred to the internal resistors (20 ppm/°C typ). Maximum gain drift of the output (RTO) is calculated as follows: AMP02 independent of the external gain set resistor is 50 ppm/°C. ( ) ( ) V RTO = V ×G +V All instrumentation amplifiers require attention to layout so OS IOS OOS thermocouple effects are minimized. Thermocouples formed where V and V are the input and output offset voltage IOS OOS between copper and dissimilar metals can easily destroy the specifications and G is the amplifier gain. TCV performance of the AMP02, which is typically 0.5 µV/°C. OS The overall offset voltage drift TCV , referred to the output, is Resistors themselves can generate thermoelectric EMFs when OS a combination of input and output drift specifications. Input mounted parallel to a thermal gradient. offset voltage drift is multiplied by the amplifier gain, G, and The AMP02 uses the triple op amp instrumentation amplifier summed with the output offset drift: configuration with the input stage consisting of two transimped- ( ) ( ) TCV RTO = TCV ×G +TCV ance amplifiers followed by a unity-gain differential amplifier. OS IOS OOS The input stage and output buffer are laser-trimmed to increase where TCVIOS is the input offset voltage drift, and TCVOOS is gain accuracy. The AMP02 maintains wide bandwidth at all the output offset voltage drift. Frequently, the amplifier drift is gains as shown in Figure 3. For voltage gains greater than 10, referred back to the input (RTI), which is then equivalent to an the bandwidth is over 200 kHz. At unity gain, the bandwidth of input signal change: the AMP02 exceeds 1 MHz. ( ) TCV TCV RTI =TCV + OOS 80 OS IOS G TA = 25(cid:2)C VS = (cid:4)15V For example, the maximum input-referred drift of an 60 G = 1000 AMP02EP set to G = 1000 becomes: T CVOS (RTI)=2µV oC +1001µ00V0 oC =2.1µV oC AIN – dB 40 GG == 11000 G 20 Input Bias and Offset Currents GE A Input transistor bias currents are additional error sources that LT G = 1 O 0 can degrade the input signal. Bias currents flowing through the V signal source resistance appear as an additional offset voltage. Equal source resistance on both inputs of an IA will minimize –20 offset changes due to bias current variations with signal voltage and temperature; however, the difference between the two bias –40 1k 10k 100k 1M 10M currents (the input offset current) produces an error. The mag- FREQUENCY – Hz nitude of the error is the offset current times the source resistance. Figure 3.The AMP02 Keeps Its Bandwidth at A current path must always be provided between the differential High Gains inputs and analog ground to ensure correct amplifier operation. Common-Mode Rejection Floating inputs such as thermocouples should be grounded Ideally, an instrumentation amplifier responds only to the differ- close to the signal source for best common-mode rejection. ence between the two input signals and rejects common-mode Gain voltages and noise. In practice, there is a small change in output The AMP02 only requires a single external resistor to set the voltage when both inputs experience the same common-mode voltage gain. The voltage gain, G, is: voltage change; the ratio of these voltages is called the common-mode gain. Common-mode rejection (CMR) is the 50kΩ G= +1 logarithm of the ratio of differential-mode gain to common-mode R G gain, expressed in dB. Laser trimming is used to achieve the and high CMR of the AMP02. 50kΩ R = G G–1 –8– REV. E

AMP02 3 +IN V1 25k(cid:3) 25k(cid:3) SENSE (SOIC-16 ONLY) RG2 8 R 25k(cid:3) 6 RG OUT RG1 1 R 25k(cid:3) 25k(cid:3) 25k(cid:3) 5 REFERENCE –IN 2 V2 Figure 4.Triple Op Amp Topology Figure 4 shows the triple op amp configuration of the AMP02. Grounding With all instrumentation amplifiers of this type, it is critical not The majority of instruments and data acquisition systems have to exceed the dynamic range of the input amplifiers. The ampli- separate grounds for analog and digital signals. Analog ground may fied differential input signal and the input common-mode volt- also be divided into two or more grounds that will be tied together age must not force the amplifier’s output voltage beyond ±12 V at one point, usually at the analog power supply ground. In (V = ±15 V) or nonlinear operation will result. addition, the digital and analog grounds may be joined—normally S at the analog ground pin on the A/D converter. Following this The input stage amplifier’s output voltages at V and V equal: 1 2 basic practice is essential for good circuit performance.  2RV V = –1+  D +V Mixing grounds causes interactions between digital circuits and the 1  RG 2 CM analog signals. Since the ground returns have finite resistance and inductance, hundreds of millivolts can be developed between the system ground and the data acquisition components. Using V = –G D +V separate ground returns minimizes the current flow in the sensitive 2 CM analog return path to the system ground point. Consequently, noisy ground currents from logic gates interact with the analog signals.  2RV V = 1+  D +V Inevitably, two or more circuits will be joined together with 2  R  2 CM G their grounds at differential potentials. In these situations, the differential input of an instrumentation amplifier, with its high V CMR, can accurately transfer analog information from one = G 2D +VCM circuit to another. where: Sense and Reference Terminals The sense terminal completes the feedback path for the instrumen- V = Differential input voltage D tation amplifier output stage and is internally connected directly = (+IN) – (–IN) to the output. For SOIC devices, connect the sense terminal to the output. The output signal is specified with respect to the refer- V = Common-mode input voltage CM ence terminal, which is normally connected to analog ground. G = Gain of instrumentation amplifier The reference may also be used for offset correction level shift- If V and V can equal ±12 V maximum, the common-mode ing. A reference source resistance will reduce the common-mode 1 2 input voltage range is: rejection by the ratio of 25 kΩ/RREF. If the reference source resis- tance is 1 Ω, the CMR will be reduced 88 dB (25 kΩ/1 Ω = 88 dB).  GV  CMVR=±12V − D  2  REV. E –9–

AMP02 Overvoltage Protection Power Supply Considerations Instrumentation amplifiers invariably sit at the front end of Achieving the rated performance of precision amplifiers in a instrumentation systems where there is a high probability of practical circuit requires careful attention to external influences. exposure to overloads. Voltage transients, failure of a transducer, For example, supply noise and changes in the nominal voltage or removal of the amplifier power supply while the signal source is directly affect the input offset voltage. A PSR of 80 dB means connected may destroy or degrade the performance of an unpro- that a change of 100 mV on the supply (not an uncommon tected device. A common technique is to place limiting resistors in value) will produce a 10 µV input offset change. Consequently, series with each input, but this adds noise. The AMP02 includes care should be taken in choosing a power unit that has a low internal protection circuitry that limits the input current to ±4 mA output noise level, good line and load regulation, and good for a 60 V differential overload (see Figure 5) with power off, temperature stability. In addition, each power supply should be ±2.5 mA with power on. properly bypassed. 4 TA = 25(cid:2)C VS = (cid:4)15V POWER OFF 3 A 2 – m POWER ON NT 1 E R R U 0 C E AG –1 K A E L –2 –3 –4 –100 –80 –60 –40 –20 0 20 40 60 80 100 DIFFERENTIAL INPUT VOLTAGE Figure 5.AMP02’s Input Protection Circuitry Limits Input Current During Overvoltage Conditions –10– REV. E

AMP02 OUTLINE DIMENSIONS 8-Lead Plastic Dual-in-Line Package [PDIP] 8-Lead Ceramic DIP - Glass Hermetic Seal [CERDIP] (N-8) (Q-8) Dimensions shown in inches and (millimeters) Dimensions shown in inches and (millimeters) 0.005 (0.13) 0.055 (1.40) 0.375 (9.53) MIN MAX 0.365 (9.27) 0.355 (9.02) 8 5 0.310 (7.87) 8 5 0.295 (7.49) PIN 1 0.220 (5.59) 0.285 (7.24) 1 4 1 4 0.275 (6.98) 0.325 (8.26) 0.100 (2.54) BSC 0.310 (7.87) 0.405 (10.29) MAX 0.320 (8.13) 0.100 (2.54) 0.300 (7.62) 0.150 (3.81) 0.290 (7.37) BSC 0.060 (1.52) 0.135 (3.43) 0.015 0.120 (3.05) 0.200 (5.08) 0.015 (0.38) (04..15870) (0.38) MAX MAX MIN 0.200 (5.08) 0.150 (3.81) 0.015 (0.38) 0.125 (3.18) MIN 0.150 (3.81) SEATING 0.010 (0.25) 0.023 (0.58) SEATING 0.015 (0.38) 00..113100 ((32..3709)) 0.06P0L A(1N.5E2) 0.008 (0.20) 0.014 (0.36) 00..007300 ((10..7786)) PLANE 1 05 0.008 (0.20) 0.022 (0.56) 0.050 (1.27) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS 0.018 (0.46) 0.045 (1.14) (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR 0.014 (0.36) REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN COMPLIANT TO JEDEC STANDARDS MO-095AA CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN 16-Lead Standard Small Outline Package [SOIC] Wide Body (R-16) Dimensions shown in millimeters and (inches) 10.50 (0.4134) 10.10 (0.3976) 16 9 7.60 (0.2992) 7.40 (0.2913) 10.65 (0.4193) 1 8 10.00 (0.3937) 1.27B (0S.C0500) 2.65 (0.1043) 0.75 (0.0295)(cid:6) 45(cid:2) 2.35 (0.0925) 0.25 (0.0098) 0.30 (0.0118) 0.10 (0.0039) 8(cid:2) COPL0A.1N0ARITY 00..5313 ((00..00210310)) SPELAANTIENG 00..3223 ((00..00102961)) 0(cid:2) 10..2470 ((00..00510507)) COMPLIANT TO JEDEC STANDARDS MS-013AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN REV. E –11–

AMP02 Revision History Location Page 1/03—Data Sheet changed from REV. D to REV. E. Edits to Figure 2 .............................................................................................................................................................................3 Edits to Die Characteristics.............................................................................................................................................................4 E) 3( Updated OUTLINE DIMENSIONS.............................................................................................................................................11 0 1/ – 0 – 8 4 2 0 0 C A. S. U. N D I E T N RI P –12– REV. E