Low Cost Microprocessor Supervisory Circuits Data Sheet ADM705/ADM706/ADM707/ADM708 FEATURES FUNCTIONAL BLOCK DIAGRAMS Guaranteed RESET valid with V = 1 V CC 190 μA quiescent current WINAPTUCTH (DWODGI) TWRAATNCSHIDTIOOGN WATTICMHEDROG WATCHDOG DETECTOR OUTPUT (WDO) Precision supply voltage monitor 4.65 V (ADM705/ADM707) VCC RESETAND WATCHDOG 4.40 V (ADM706/ADM708) TIMEBASE 250μA 200 ms reset pulse width Debounced TTL/CMOS manual reset input (MR) MR RESET GENERATOR RESET Independent watchdog timer (ADM705/ADM706) VCC 1.60 sec timeout (ADM705/ADM706) 4.65V* ADM705/ Active high reset output (ADM707/ADM708) POWER-FAIL ADM706 INPUT (PFI) POWER-FAIL Voltage monitor for power fail or low battery warning 1.25V OUTPUT (PFO) Superior upgrade for MAX705 to MAX708 *VOLTAGE REFERENCE = 4.65V (ADM705), 4.40V (ADM706) 00088-001 APPLICATIONS Figure 1. ADM705/ADM706 Microprocessor systems Computers VCC Controllers 250μA RESET Intelligent instruments MR RESET RESET Critical microprocessor supply monitoring VCC GENERATOR 4.65V* ADM707/ POWER-FAIL ADM708 INPUT (PFI) POWER-FAIL 1.25V OUTPUT (PFO) *VOLTAGE REFERENCE = 4.65V (ADM707), 4.40V (ADM708) 00088-002 Figure 2. ADM707/ADM708 GENERAL DESCRIPTION The ADM705/ADM706/ADM707/ADM708 microprocessor The ADM705 and ADM706 are identical except for the reset supervisory circuits are suitable for monitoring 5 V power threshold monitor levels, which are 4.65 V and 4.40 V, respectively. supplies/batteries and microprocessor activity. The ADM707 and ADM708 provide a similar functionality to The ADM705/ADM706 provide power-supply monitoring the ADM705 and ADM706 and only differ in that a watchdog circuitry that generate a reset output during power-up, power- timer function is not available. Instead, an active high reset down, and brownout conditions. The reset output remains output (RESET) is available as well as the active low reset output operational with VCC as low as 1 V. Independent watchdog (RESET). The ADM707 and ADM708 are identical except for monitoring circuitry is also provided. This is activated if the the reset threshold monitor levels, which are 4.65 V and 4.40 V, watchdog input has not been toggled within 1.60 sec. respectively. In addition, there is a 1.25 V threshold detector to warn of All devices are available in narrow 8-lead PDIP and 8-lead SOIC power failures, to detect low battery conditions, or to monitor an packages. additional power supply. An active low, debounced manual reset input (MR) is also included. Rev. H Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2002–2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com

ADM705/ADM706/ADM707/ADM708 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Power Fail RESET Output ............................................................8 Applications ....................................................................................... 1 Manual Reset ..................................................................................8 Functional Block Diagrams ............................................................. 1 Watchdog Timer (ADM705/ADM706) .....................................8 General Description ......................................................................... 1 Power Fail Comparator .................................................................8 Revision History ............................................................................... 2 Valid RESET Below 1 V V ........................................................9 CC Specifications ..................................................................................... 3 Applications Information .............................................................. 10 Absolute Maximum Ratings ............................................................ 4 Monitoring Additional Supply Levels ...................................... 10 ESD Caution .................................................................................. 4 Microprocessor with Bidirectional RESET ............................. 10 Pin Configurations and Function Descriptions ........................... 5 Outline Dimensions ....................................................................... 11 Typical Performance Characteristics ............................................. 6 Ordering Guide .......................................................................... 12 Circuit Information .......................................................................... 8 REVISION HISTORY 1/16—Rev. G to Rev. H 7/06—Rev. D to Rev. E Changes to Table 3 ............................................................................ 5 Added RM-8 (MSOP) Package ......................................... Universal Changes to Power Fail Comparator Section and Figure 15 ........ 8 Changes to Table 2 ............................................................................. 4 Changes to Figure 16 ........................................................................ 9 Updated Outline Dimensions ....................................................... 12 Changes to Figure 18 and Figure 20 ............................................. 10 Changes to Ordering Guide .......................................................... 12 Updated Outline Dimensions ....................................................... 12 Changes to Ordering Guide .......................................................... 12 11/05—Rev. C to Rev. D Updated Format .................................................................. Universal 3/08—Rev. F to Rev. G Deleted Figure 2 ................................................................................. 4 Changes to Applications .................................................................. 1 Updated Outline Dimensions ....................................................... 11 Changes to Table 2 ............................................................................ 4 Changes to Ordering Guide .......................................................... 12 Changes to Figure 9 .......................................................................... 6 Changes to Figure 10, Figure 11, and Figure 12 ........................... 7 8/02—Rev. B to Rev. C Changes to Figure 14 ........................................................................ 8 Removed RM-8 (µSOIC) Package .................................... Universal Changes to Ordering Guide .......................................................... 12 Updated N-8 and R-8 Packages ....................................................... 8 2/07—Rev. E to Rev. F Updated Format .................................................................. Universal Changes to Watchdog Timeout Period .......................................... 3 Replaced Pin Configurations and Function Descriptions Section .. 5 Rev. H | Page 2 of 12

Data Sheet ADM705/ADM706/ADM707/ADM708 SPECIFICATIONS V = 4.75 V to 5.5 V, T = T to T , unless otherwise noted. CC A MIN MAX Table 1. Parameter Min Typ Max Unit Test Conditions/Comments POWER SUPPLY VCC Operating Voltage Range 1.0 5.5 V Supply Current 190 250 µA LOGIC OUTPUT Reset Threshold 4.5 4.65 4.75 V ADM705/ADM707 4.25 4.40 4.50 V ADM706/ADM708 Reset Threshold Hysteresis 40 mV RESET PULSE WIDTH 160 200 280 ms RESET OUTPUT VOLTAGE VCC − 1.5 V ISOURCE = 800 µA 0.4 V ISINK = 3.2 mA 0.3 V VCC = 1 V, ISINK = 50 µA 0.3 V VCC = 1.2 V, ISINK = 100 µA RESET OUTPUT VOLTAGE VCC − 1.5 V ADM707/ADM708, ISOURCE = 800 µA 0.4 V ADM707/ADM708, ISINK = 1.2 mA WATCHDOG TIMEOUT PERIOD (t ) 1.00 1.60 2.25 sec V = 0.4 V, V = V × 0.8, WDI = V WD IL IH CC CC WDI Pulse Width (tWP) 50 ns WATCHDOG INPUT WDI Input Threshold Logic Low 0.8 V Logic High 3.5 V WDI Input Current 50 150 µA WDI = 0 V −150 −50 µA WDI = 0 V WDO OUTPUT VOLTAGE VCC − 1.5 V ISOURCE = 800 µA 0.4 V ISINK = 1.2 mA MANUAL RESET INPUT MR Pull-Up Current 100 250 600 µA MR = 0 V MR Pulse Width 150 ns MR INPUT THRESHOLD Logic Low 0.8 V Logic High 2.0 V MR TO RESET OUTPUT DELAY 250 ns POWER FAIL INPUT PFI Input Threshold 1.2 1.25 1.3 V PFI Input Current −25 +0.01 +25 nA PFO OUTPUT VOLTAGE VCC − 1.5 V ISOURCE = 800 µA 0.4 V ISINK = 3.2 mA Rev. H | Page 3 of 12

ADM705/ADM706/ADM707/ADM708 Data Sheet ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. Stresses at or above those listed under Absolute Maximum A Ratings may cause permanent damage to the product. This is a Table 2. stress rating only; functional operation of the product at these Parameter Rating or any other conditions above those indicated in the operational V −0.3 V to +6 V CC section of this specification is not implied. Operation beyond All Other Inputs −0.3 V to V + 0.3 V CC the maximum operating conditions for extended periods may Input Current affect product reliability. V 20 mA CC ESD CAUTION GND 20 mA Digital Output Current 20 mA Power Dissipation, N-8 PDIP 727 mW θ Thermal Impedance 135°C/W JA Power Dissipation, R-8 SOIC 470 mW θ Thermal Impedance 110°C/W JA Power Dissipation, RM-8 MSOP 900 mW θ Thermal Impedance 206°C/W JA Operating Temperature Range Industrial (Version A) −40°C to +85°C Lead Temperature (Soldering, 10 sec) 300°C Vapor Phase (60 sec) 215°C Infrared (15 sec) 220°C Storage Temperature Range −65°C to +150°C ESD Rating >4.5 kV Rev. H | Page 4 of 12

Data Sheet ADM705/ADM706/ADM707/ADM708 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS MR 1 ADM705/ 8 WDO VCC 2 ADM706 7 RESET GND 3 TOP VIEW 6 WDI PFI 4 (Not to Scale) 5 PFO 00088-003 Figure 3. ADM705/ADM706 PDIP/SOIC Pin Configuration MR 1 ADM707/ 8 RESET VCC 2 ADM708 7 RESET GND 3 TOP VIEW 6 NC PFI N4C( =N oNtO to C SOcNaNleE)CT5 PFO 00088-004 Figure 4. ADM707/ADM708 PDIP/SOIC Pin Configuration RESET 1 ADM708 8 NC RESET 2 7 PFO MR 3 TOP VIEW 6 PFI VCC 4NC( N= oNtO to C SOcNaNleE)CT5 GND 00088-005 Figure 5. ADM708 MSOP Pin Configuration Table 3. Pin Function Descriptions Pin Number ADM705/ ADM707/ ADM706 ADM708 ADM708 Mnemonic (PDIP, SOIC) (PDIP, SOIC) (MSOP) Description MR 1 1 3 Manual Reset Input. When this pin is taken below 0.8 V, a reset is generated. MR can be driven from TTL, CMOS logic, or from a manual reset switch as it is internally debounced. An internal 250 μA pull-up current holds the input high when floating. VCC 2 2 4 5 V Power Supply Input. Place a 0.1 μF decoupling capacitor between the VCC and GND pins. GND 3 3 5 0 V Ground Reference for All Signals. PFI 4 4 6 Power Fail Input. PFI is the noninverting input to the power fail comparator. When PFI is less than 1.25 V, PFO goes low. If unused, PFI must be connected to GND. PFO 5 5 7 Power Fail Output. PFO is the output from the power fail comparator. It goes low when PFI is less than 1.25 V. WDI 6 Not Not Watchdog Input. WDI is a three-level input. If WDI remains either high or low for longer applicable applicable than the watchdog timeout period, the watchdog output (WDO) goes low. The timer resets with each transition at the WDI input. Either a high to low or a low to high transition clears the counter. The internal timer is also cleared whenever reset is asserted. The watchdog timer is disabled when WDI is left floating or connected to a three-state buffer. NC Not 6 8 No Connect. applicable RESET 7 7 1 Logic Output. RESET goes low for 200 ms when triggered. It can be triggered either by V being below the reset threshold or by a low signal on the manual reset input (MR). CC RESET remains low whenever V is below the reset threshold (4.65 V in ADM705/ADM707, CC 4.40 V in ADM706/ADM708). It remains low for 200 ms after V goes above the reset CC threshold or MR goes from low to high. A watchdog timeout does not trigger RESET unless WDO is connected to MR. WDO 8 Not Not Watchdog Output. WDO remains low until the watchdog timer is cleared. WDO also applicable applicable goes low during low line conditions. Whenever V is below the reset threshold, WDO CC goes low if the internal WDO remains low. As soon as V goes above the reset threshold, CC WDO goes high. RESET Not 8 2 Logic Output. RESET is an active high output suitable for systems that use active high applicable reset logic. It is the inverse of RESET. Rev. H | Page 5 of 12

ADM705/ADM706/ADM707/ADM708 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS A1 4.50V VCC = 5V TA = 25°C VCC 100 1.3V 90 PFI 1.2V 4.4V 10 PFO 0% RESET 1V 1V 500msHO 00088-012 0V 00088-015 500ns/DIV Figure 6. RESET Output Voltage vs. Supply Voltage Figure 9. PFI Comparator Deassertion Response Time A1 4.50V 5V 5V RESET RESET VCC 100 90 RESET VCC = VRT TA = 25°C 10 0% 0V 0V 1V 1V 500msHO 00088-013 00088-016 100ns/DIV Figure 7. ADM707/ADM708 RESET Output Voltage vs. Supply Voltage Figure 10. RESET, RESET Assertion VTAC C= =2 55°VC 5V 5V RESET RESET 1.3V PFI 1.2V VCC = VRT TA = 25°C 5V PFO 0V 0V 0V 00088-014 00088-017 500ns/DIV 100ns/DIV Figure 8. PFI Comparator Assertion Response Time Figure 11. RESET, RESET Deassertion Rev. H | Page 6 of 12

Data Sheet ADM705/ADM706/ADM707/ADM708 TA = 25°C 5V VCC 4V 5V RESET 0V 00088-018 2μs/DIV Figure 12. ADM705/ADM707 RESET Response Time Rev. H | Page 7 of 12

ADM705/ADM706/ADM707/ADM708 Data Sheet CIRCUIT INFORMATION POWER FAIL RESET OUTPUT The watchdog timer is cleared by either a high to low or a low to high transition on WDI. It is also cleared by RESET going low; RESET is an active low output that provides a reset signal to therefore, the watchdog timeout period begins after RESET the microprocessor whenever the V input is below the reset CC goes high. threshold. An internal timer holds RESET low for 200 ms after the voltage on VCC rises above the threshold. This functions as a When VCC falls below the reset threshold, WDO is forced low, power-on reset signal for the microprocessor. It allows time for whether or not the watchdog timer has timed out. Normally, this both the power supply and the microprocessor to stabilize after generates an interrupt, but it is overridden by RESET going low. power-up. The RESET output is guaranteed to remain valid (low) The watchdog monitor can be deactivated by floating the WDI. with V as low as 1 V. This ensures that the microprocessor is CC The WDO can then be used as a low line output because it goes held in a stable shutdown condition as the power supply voltage low only when V falls below the reset threshold. CC ramps up. tWP tWD tWD tWD In addition to RESET, an active high RESET output is also available WDI on the ADM707/ADM708. This is the complement of RESET and is useful for processors requiring an active high reset signal. WDO MANUAL RESET Ta hmea mnuaanlu raels reet ssewt iitncphu, tt o( MgeRn)e raalltoew as p ortohceers sroers erte ssoetu. rTcehse, isnupcuht a iss RESET RTREISGEGTE ERXETDE BRYN AMLRLY tRS 00088-008 effectively debounced by the timeout period (200 ms typically). Figure 14. Watchdog Timing The MR input is TTL-/CMOS-compatible, so it can also be driven POWER FAIL COMPARATOR by any logic reset output. The power fail comparator is an independent comparator that VCC VRT VRT can monitor the input power supply. The comparator inverting tRS tRS input is internally connected to a 1.25 V reference voltage. The noninverting input is available at the PFI input. This input can RESET monitor the input power supply via a resistive divider network. When the voltage on the PFI input drops below 1.25 V, the MR MR EXTERNALLY DRIVEN LOW comparator output (PFO) goes low, indicating a power failure. For early warning of power failure, the comparator monitors the WDO 00088-007 pnreetwreogrukl.a tTohre i nPpFuOt boyu tcphuoto csainng i natne rarpupprto tphreia ptero rceessisstoivr es od iav ider Figure 13. RESET, MR, and WDO Timing shutdown procedure is implemented before power is lost. WATCHDOG TIMER (ADM705/ADM706) As the voltage on the PFI pin is limited to V + 0.3 V, it is CC The watchdog timer circuit can monitor the activity of the micro- recommended to connect the PFI pin with a Schottky diode to processor to check that it is not stalled in an indefinite loop. An the RESET pin as shown in Figure 15. This helps clamping the output line on the processor toggles the watchdog input (WDI) PFI pin voltage during device power up and operation. line. If this line is not toggled within the timeout period (1.60 sec), INPUT then the watchdog output (WDO) goes low. The WDO can be POWER R1 1.25V PFO connected to a nonmaskable interrupt (NMI) on the processor; POWER-FAIL OUTPUT therefore, if the watchdog timer times out, an interrupt is gen- POWER-FAIL PFI RESET RESET erated. The interrupt service routine then rectifies the problem. R2 INPUT OUTPUT ADM705/ADM706/ If a RESET signal is required when a timeout occurs, the WDO ADM707/ADM708 must connect to the manual reset input (MR). 00088-009 Figure 15. Power Fail Comparator Rev. H | Page 8 of 12

Data Sheet ADM705/ADM706/ADM707/ADM708 Adding Hysteresis to the Power Fail Comparator When PFO is low, Resistor R3 sinks current from the summing For increased noise immunity, hysteresis can be added to the junction at the PFI pin. When PFO is high, Resistor R3 sources power fail comparator. Because the comparator circuit is current into the PFI summing junction. This results in differing noninverting, hysteresis can be added by connecting a resistor trip levels for the comparator. Further noise immunity can be between the PFO output and the PFI input as shown in Figure 16. achieved by connecting a capacitor between PFI and GND. The equations calculate the hysteresis are as follows: 7VTO 15V 5V INPUT ADP3367 POWER  R2R3  R1 VCC TO VH 1.251R2R3R1 MICROPROCESSOR 1.25V – PFO NMI 1.25 V 1.25 V 1.25R1  CC  + L  R2 R3  PFI RESET R2 AADDMM770057//AADDMM770068/ TMROEICSREOTPROCESSOR VMID 1.25R1R2R2 R3 VALID RESET BELOW 1 V V CC The ADM705/ADM706/ADM707/ADM708 are guaranteed to 5V provide a valid reset level with V as low as 1 V (see the Typical CC PFO Performance Characteristics section). As VCC drops below 1 V, the internal transistor does not have sufficient drive to hold the voltage RESET at 0 V. A pull-down resistor can connect externally, 0V0V VL VINVH 00088-010 as shown in Figure 17, to hold the line low if required. Figure 16. Adding Hysteresis to the Power Fail Comparator ADM705/ADM706/ ADM707/ADM708 RESET GND R1 00088-011 Figure 17. RESET Valid Below 1 V Rev. H | Page 9 of 12

ADM705/ADM706/ADM707/ADM708 Data Sheet APPLICATIONS INFORMATION A typical application circuit is shown in Figure 18. The un- MONITORING ADDITIONAL SUPPLY LEVELS regulated dc input supply is monitored using PFI via the resistive It is possible to use the power fail comparator to monitor a divider network. Resistor R1 and Resistor R2 must be selected second supply as shown in Figure 20. The two sensing resistors, so when the supply voltage drops below the desired level (such R1 and R2, are selected so the voltage on PFI drops below 1.25 V at as 8 V), the voltage on PFI drops below the 1.25 V threshold, the minimum acceptable input supply. PFO can connect to MR so thereby generating an interrupt to the microprocessor. Monitoring a reset is generated when the supply drops out of tolerance. In the preregulator input provides additional time to execute an this case, if either supply drops out of tolerance, a reset is generated. orderly shutdown procedure before power is lost. VX 5V 7VTO 15V 5V INPUT ADP3367 POWER VCC R1 VCC RESET RESET MICROPROCESSOR ADM705/ 1.25V – PFO R1 ADM706 MICROPROCESSOR INTERRUPT + PFI PFI R2 RESET RESET R2 MR GNDPFO ADM705/ADM706/ ADM707/ADM708 00088-020 00088-022 Figure 18. Typical Application Circuit Figure 20. Monitoring 5 V and an Additional Supply, VX Microprocessor activity is monitored using WDI. This is driven MICROPROCESSOR WITH BIDIRECTIONAL RESET using an output line from the processor. The software routines To prevent contention for microprocessors with a bidirectional toggle this line at least once every 1.60 seconds. If a problem occurs reset line, a current limiting resistor must be inserted between and this line is not toggled, WDO goes low and a nonmaskable the ADM705/ADM706/ADM707/ADM708 RESET output pin interrupt is generated. This interrupt routine can clear the problem. and the microprocessor RESET pin. This limits the current to a If, in the event of inactivity on the WDI line, a system reset is safe level if there are conflicting output reset levels. A suitable required, WDO must connect to MR as shown in Figure 19. resistor value is 4.7 kΩ. If the reset output is required for other uses, it must be buffered, as shown in Figure 21. RESET RESET ADM705/ 5V BUFFERED ADM706 MICROPROCESSOR RESET WDI I/O LINE MR WDO VCC GNFDigure 19. RESET From WDO 00088-021 ADGMNDR7E0SxET MRIECSREOTPGRNODCESSOR 00088-023 Figure 21. Bidirectional Input/Output RESET Rev. H | Page 10 of 12

Data Sheet ADM705/ADM706/ADM707/ADM708 OUTLINE DIMENSIONS 0.400 (10.16) 0.365 (9.27) 0.355 (9.02) 8 5 0.280 (7.11) 0.250 (6.35) 1 4 0.240 (6.10) 0.325 (8.26) PIN 1 0.310 (7.87) 0.100 (2.54) 0.300 (7.62) BSC 0.060 (1.52) 0.195 (4.95) (05..23130) MAX 0.130 (3.30) MAX 0.115 (2.92) 0.015 0.150 (3.81) (0.38) 0.015 (0.38) 0.130 (3.30) MIN GAUGE 0.115 (2.92) SEATING PLANE 0.014 (0.36) PLANE 0.010 (0.25) 0.022 (0.56) 0.008 (0.20) 0.005 (0.13) 0.430 (10.92) 0.018 (0.46) MIN MAX 0.014 (0.36) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) COMPLIANT TO JEDEC STANDARDS MS-001-BA CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS. Figure 22. 8-Lead Plastic Dual-in-Line Package [PDIP] Narrow Body (N-8) Dimensions shown in inches and (millimeters) 5.00 (0.1968) 4.80 (0.1890) 8 5 4.00 (0.1574) 6.20 (0.2440) 3.80 (0.1497) 1 4 5.80 (0.2284) 1.27B (0S.C0500) 1.75 (0.0688) 00..5205 ((00..00109969))× 45° 0.25 (0.0098) 1.35 (0.0532) 0.10 (0.0040) 0.51 (0.0201) 8° COPL0A.1N0ARITY SEPALTAINNGE 0.31 (0.0122) 00..2157 ((00..00009687)) 0° 10..2470 ((00..00510507)) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 23. 8-Lead Standard Small Outline Package [SOIC_N] (R-8) Dimensions shown in millimeters and (inches) Rev. H | Page 11 of 12

ADM705/ADM706/ADM707/ADM708 Data Sheet 3.20 3.00 2.80 8 5 5.15 3.20 4.90 3.00 4.65 2.80 1 4 PIN 1 IDENTIFIER 0.65 BSC 0.95 15° MAX 0.85 1.10 MAX 0.75 0.80 0.15 0.40 6° 0.23 0.55 CO0P.0L50A.1N0ARICTOYMPLIANT0. 2T5O JEDEC STA0°NDARDS 0M.0O9-187-AA 0.40 10-07-2009-B Figure 24. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters ORDERING GUIDE Model1 Temperature Range Package Description Package Option Branding ADM705AN −40°C to +85°C 8-Lead Plastic Dual-in-Line Package [PDIP] N-8 ADM705ANZ −40°C to +85°C 8-Lead Plastic Dual-in-Line Package [PDIP] N-8 ADM705AR −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 ADM705AR–REEL −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 ADM705AR–REEL7 −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 ADM705ARZ −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 ADM705ARZ–REEL −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 ADM705ARZ–REEL7 −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 ADM706ANZ −40°C to +85°C 8-Lead Plastic Dual-in-Line Package [PDIP] N-8 ADM706AR −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 ADM706AR-REEL −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 ADM706AR-REEL7 −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 ADM706ARZ −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 ADM706ARZ-REEL −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 ADM706ARZ-REEL7 −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 ADM707ANZ −40°C to +85°C 8-Lead Plastic Dual-in-Line Package [PDIP] N-8 ADM707AR −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 ADM707AR-REEL −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 ADM707ARZ −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 ADM707ARZ-REEL −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 ADM708ANZ −40°C to +85°C 8-Lead Plastic Dual-in-Line Package [PDIP] N-8 ADM708AR −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 ADM708AR-REEL −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 ADM708ARZ −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 ADM708ARZ-REEL −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8 ADM708ARMZ −40°C to +85°C 8-Lead Mini Small Outline Package [MSOP] RM-8 M8F ADM708ARMZ-REEL −40°C to +85°C 8-Lead Mini Small Outline Package [MSOP] RM-8 M8F 1 Z = RoHS Compliant Part. ©2002–2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00088-0-1/16(H) Rev. H | Page 12 of 12