Low Cost CMOS, High Speed, Rail-to-Rail Amplifiers Data Sheet ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 FEATURES CONNECTION DIAGRAMS Qualified for automotive applications ADA4891-1 High speed and fast settling NC 1 8 NC −3 dB bandwidth: 220 MHz (G = +1) –IN 2 7 +VS Slew rate: 170 V/μs +IN 3 6 OUT VidSeeott slipnegc tifiimcaet tioon 0s. 1(G% =: 2 +82 n, Rs L = 150 Ω) –VS N4C = NO CONNECT5 NC 08054-026 0.1 dB gain flatness: 25 MHz Figure 1. 8-Lead SOIC_N (R-8) Differential gain error: 0.05% ADA4891-1 Differential phase error: 0.25° Single-supply operation OUT 1 5 +VS Wide supply range: 2.7 V to 5.5 V –VS 2 Output swings to within 50 mV of supply rails LLoinwe adri sotuotrptiuotn c:u 7r9r ednBtc: 1S2F5D mR aAt a1t M−4H0z dBc +IN 3 4 –IN08054-001 Figure 2. 5-Lead SOT-23 (RJ-5) Low power: 4.4 mA per amplifier ADA4891-2 APPLICATIONS Automotive infotainment systems OUT1 1 8 +VS –IN1 2 7 OUT2 Automotive driver assistance systems +IN1 3 6 –IN2 ICAmoctanigsvuienm fgile tre vrsid eo –VS 4NC = NO CONNECT5 +IN2 08054-027 Figure 3. 8-Lead SOIC_N (R-8) and 8-Lead MSOP (RM-8) Coaxial cable drivers ADA4891-3 Clock buffers Photodiode preamp PD1 1 14 OUT2 Contact image sensor and buffers PD2 2 13 –IN2 GENERAL DESCRIPTION PD3 3 12 +IN2 The ADA4891-1 (single), ADA4891-2 (dual), ADA4891-3 (triple), +VS 4 11 –VS and ADA4891-4 (quad) are CMOS, high speed amplifiers that +IN1 5 10 +IN3 offer high performance at a low cost. The amplifiers feature true –IN1 6 9 –IN3 s3i0n0g lme-Vsu bpeplloyw c atphaeb nileitgya, twivieth r aainl. input voltage range that extends OUT1 7 8 OUT3 08054-073 Figure 4. 14-Lead SOIC_N (R-14) and 14-Lead TSSOP (RU-14) In spite of their low cost, the ADA4891-1/ADA4891-2/ADA4891-3/ ADA4891-4 ADA4891-4 family provides high performance and versatility. The rail-to-rail output stage enables the output to swing to within OUT1 1 14 OUT4 50 mV of each rail, enabling maximum dynamic range. –IN1 2 13 –IN4 +IN1 3 12 +IN4 The ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 family of +VS 4 11 –VS amplifiers is ideal for imaging applications, such as consumer +IN2 5 10 +IN3 video, CCD buffers, and contact image sensor and buffers. Low –IN2 6 9 –IN3 dfiilstetor ratpiopnli caantdio fnass.t settling time also make them ideal for active OUT2 7 8 OUT3 08054-074 Figure 5. 14-Lead SOIC_N (R-14) and 14-Lead TSSOP (RU-14) The ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 are avail- able in a wide variety of packages. The ADA4891-1 is available in 8-lead SOIC and 5-lead SOT-23 packages. The ADA4891-2 14-lead TSSOP packages. The amplifiers are specified to operate is available in 8-lead SOIC and 8-lead MSOP packages. The over the extended temperature range of −40°C to +125°C. ADA4891-3 and ADA4891-4 are available in 14-lead SOIC and R ev. F Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2010–2015 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com

ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Effect of R on 0.1 dB Gain Flatness ........................................ 17 F Applications ....................................................................................... 1 Driving Capacitive Loads .......................................................... 18 General Description ......................................................................... 1 Terminating Unused Amplifiers .............................................. 19 Connection Diagrams ...................................................................... 1 Disable Feature (ADA4891-3 Only) ......................................... 19 Revision History ............................................................................... 3 Single-Supply Operation ........................................................... 19 Specifications ..................................................................................... 4 Video Reconstruction Filter ...................................................... 20 5 V Operation ............................................................................... 4 Multiplexer .................................................................................. 20 3 V Operation ............................................................................... 5 Layout, Grounding, and Bypassing .............................................. 21 Absolute Maximum Ratings ............................................................ 7 Power Supply Bypassing ............................................................ 21 Maximum Power Dissipation ..................................................... 7 Grounding ................................................................................... 21 ESD Caution .................................................................................. 7 Input and Output Capacitance ................................................. 21 Typical Performance Characteristics ............................................. 8 Input-to-Output Coupling ........................................................ 21 Applications Information .............................................................. 16 Leakage Currents ........................................................................ 21 Using the ADA4891-1/ADA4891-2/ADA4891-3/ Outline Dimensions ....................................................................... 22 ADA4891-4 ................................................................................. 16 Ordering Guide .......................................................................... 24 Wideband, Noninverting Gain Operation .............................. 16 Automotive Products ................................................................. 24 Wideband, Inverting Gain Operation ..................................... 16 Recommended Values ................................................................ 16 Rev. F | Page 2 of 24

Data Sheet ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 REVISION HISTORY 9/15—Rev. E to Rev. F 7/10—Rev. A to Rev. B Changes to Features .......................................................................... 1 Added ADA4891-3 and ADA4891-4 ............................... Universal Moved Revision History Section ..................................................... 3 Added 14-Lead SOIC and 14-Lead TSSOP Packages ... Universal Changes to Table 1 ............................................................................ 4 Deleted Figure 4; Renumbered Figures Sequentially ................... 1 Changes to Table 2 ............................................................................ 5 Changes to Features Section and General Description Section .. 1 Changes to Figure 7 and Figure 10 ................................................. 8 Added Figure 4 and Figure 5 ........................................................... 1 Changes to Figure 15 and Figure 18 ............................................... 9 Changes to Table 1 ............................................................................ 3 Changes to Figure 19, Figure 21, and Figure 22 .......................... 10 Changes to Table 2 ............................................................................ 4 Changes to Figure 25 and Figure 29 ............................................. 11 Changes to Maximum Power Dissipation Section Changes to Figure 32, Figure 33, and Figure 36 .......................... 12 and Figure 6 ....................................................................................... 6 Change to Figure 47 ........................................................................ 14 Added Table 4; Renumbered Tables Sequentially ......................... 6 Changes to Ordering Guide ........................................................... 24 Deleted Figure 11 .............................................................................. 6 Change to Automotive Products Section ..................................... 24 Changes to Typical Performance Characteristics Section ........... 7 Deleted Figure 12 .............................................................................. 7 3/13—Rev. D to Rev. E Changes to Wideband, Noninverting Gain Operation Section, Change to Features Section .............................................................. 1 Wideband, Inverting Gain Operation Section, and Table 5 ...... 15 Changes to DC Performance Parameter, Table 1 .......................... 3 Added Table 6 .................................................................................. 16 Changes to DC Performance Parameter, Table 2 .......................... 4 Changes to Figure 52 ...................................................................... 16 Changes to Ordering Guide ........................................................... 23 Added Figure 53 .............................................................................. 16 Changes to Automotive Products Section ................................... 23 Changed Layout of Driving Capacitive Loads Section .............. 17 Added Disable Feature (ADA4891-3 Only) Section 3/12—Rev. C to Rev. D and Single-Supply Operation Section .......................................... 18 Added ADA4891-1W and ADA4891-2W ........................ Universal Added Multiplexer Section ............................................................ 19 Changes to Features Section and Applications Section ............... 1 Updated Outline Dimensions........................................................ 21 Changes to Input Offset Voltage, Input Bias Current, and Open- Changes to Ordering Guide ........................................................... 23 Loop Gain Parameters, Table 1 ........................................................ 4 Changes to Input Offset Voltage, Input Bias Current, and Open- 6/10—Rev. 0 to Rev. A Loop Gain Parameters, Table 2 ........................................................ 5 Changes to Figure 26 ........................................................................ 9 Changes to Ordering Guide ........................................................... 23 Changes to Figure 33 and Figure 34 ............................................. 10 Added Automotive Products Section ........................................... 23 Updated Outline Dimensions........................................................ 18 Changes to Ordering Guide ........................................................... 18 9/10—Rev. B to Rev. C Changes to Figure 23 and Figure 24 ............................................... 9 2/10—Revision 0: Initial Version Rev. F | Page 3 of 24

ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Data Sheet SPECIFICATIONS 5 V OPERATION T = 25°C, V = 5 V, R = 1 kΩ to 2.5 V, unless otherwise noted. All specifications are for the ADA4891-1, ADA4891-2, ADA4891-3, and A S L ADA4891-4, unless otherwise noted. For the ADA4891-1 and ADA4891-2, R = 604 Ω; for the ADA4891-3 and ADA4891-4, R = 453 Ω, F F unless otherwise noted. Table 1. Parameter Test Conditions/Comments Min Typ Max Unit DYNAMIC PERFORMANCE −3 dB Small-Signal Bandwidth ADA4891-1/ADA4891-2, G = +1, V = 0.2 V p-p 240 MHz O ADA4891-3/ADA4891-4, G = +1, V = 0.2 V p-p 220 MHz O ADA4891-1/ADA4891-2, G = +2, V = 0.2 V p-p, 90 MHz O R = 150 Ω to 2.5 V L ADA4891-3/ADA4891-4, G = +2, V = 0.2 V p-p, 96 MHz O R = 150 Ω to 2.5 V L Bandwidth for 0.1 dB Gain Flatness ADA4891-1/ADA4891-2, G = +2, V = 2 V p-p, 25 MHz O R = 150 Ω to 2.5 V, R = 604 Ω L F ADA4891-3/ADA4891-4, G = +2, V = 2 V p-p, 25 MHz O R = 150 Ω to 2.5 V, R = 374 Ω L F Slew Rate, t/t G = +2, V = 2 V step, 10% to 90% 170/210 V/µs R F O −3 dB Large-Signal Frequency Response G = +2, V = 2 V p-p, R = 150 Ω 40 MHz O L Settling Time to 0.1% G = +2, V = 2 V step 28 ns O NOISE/DISTORTION PERFORMANCE Harmonic Distortion, HD2/HD3 f = 1 MHz, V = 2 V p-p, G = +1 −79/−93 dBc C O f = 1 MHz, V = 2 V p-p, G = −1 −75/−91 dBc C O Input Voltage Noise f = 1 MHz 9 nV/√Hz Differential Gain Error (NTSC) G = +2, R = 150 Ω to 2.5 V 0.05 % L Differential Phase Error (NTSC) G = +2, R = 150 Ω to 2.5 V 0.25 Degrees L All-Hostile Crosstalk f = 5 MHz, G = +2, V = 2 V p-p −80 dB O DC PERFORMANCE Input Offset Voltage ±2.5 ±10 mV T to T ±3.1 mV MIN MAX W grade only, T to T ±3.1 ±16 mV MIN MAX Offset Drift 6 µV/°C Input Bias Current −50 +2 +50 pA W grade only, T to T −50 +50 nA MIN MAX Open-Loop Gain R = 1 kΩ to 2.5 V 77 83 dB L W grade only, T to T , R = 1 kΩ to 2.5 V 66 dB MIN MAX L R = 150 Ω to 2.5 V 71 dB L INPUT CHARACTERISTICS Input Resistance 5 GΩ Input Capacitance 3.2 pF Input Common-Mode Voltage Range −V − 0.3 to V S +V − 0.8 S Common-Mode Rejection Ratio (CMRR) V = 0 V to 3.0 V 88 dB CM OUTPUT CHARACTERISTICS Output Voltage Swing R = 1 kΩ to 2.5 V 0.01 to 4.98 V L R = 150 Ω to 2.5 V 0.08 to 4.90 V L Output Current 1% THD with 1 MHz, V = 2 V p-p 125 mA O Short-Circuit Current Sourcing 205 mA Sinking 307 mA Rev. F | Page 4 of 24

Data Sheet ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Parameter Test Conditions/Comments Min Typ Max Unit POWER-DOWN PINS (PD1, PD2, PD3) ADA4891-3, ADA4891-3W only Threshold Voltage, V 2.4 V TH Bias Current Device enabled 65 nA Device powered down −22 µA Turn-On Time Device enabled, output rises to 90% of final value 166 ns Turn-Off Time Device powered down, output falls to 10% of 49 ns final value POWER SUPPLY Operating Range 2.7 5.5 V Quiescent Current per Amplifier 4.4 mA Supply Current When Powered Down ADA4891-3, ADA4891-3W only 0.8 mA Power Supply Rejection Ratio (PSRR) Positive PSRR +V = 5 V to 5.25 V, −V = 0 V 65 dB S S Negative PSRR +V = 5 V, −V = −0.25 V to 0 V 63 dB S S OPERATING TEMPERATURE RANGE −40 +125 °C 3 V OPERATION T = 25°C, V = 3 V, R = 1 kΩ to 1.5 V, unless otherwise noted. All specifications are for the ADA4891-1, ADA4891-2, ADA4891-3, and A S L ADA4891-4, unless otherwise noted. For the ADA4891-1 and ADA4891-2, R = 604 Ω; for the ADA4891-3 and ADA4891-4, R = 453 Ω, F F unless otherwise noted. Table 2. Parameter Test Conditions/Comments Min Typ Max Unit DYNAMIC PERFORMANCE −3 dB Small-Signal Bandwidth ADA4891-1/ADA4891-2, G = +1, V = 0.2 V p-p 190 MHz O ADA4891-3/ADA4891-4, G = +1, V = 0.2 V p-p 175 MHz O ADA4891-1/ADA4891-2, G = +2, V = 0.2 V p-p, 75 MHz O R = 150 Ω to 1.5 V L ADA4891-3/ADA4891-4, G = +2, V = 0.2 V p-p, 80 MHz O R = 150 Ω to 1.5 V L Bandwidth for 0.1 dB Gain Flatness ADA4891-1/ADA4891-2, G = +2, V = 2 V p-p, 18 MHz O R = 150 Ω to 1.5 V, R = 604 Ω L F ADA4891-3/ADA4891-4, G = +2, V = 2 V p-p, 18 MHz O R = 150 Ω to 1.5 V, R = 374 Ω L F Slew Rate, t/t G = +2, V = 2 V step, 10% to 90% 140/230 V/µs R F O −3 dB Large-Signal Frequency Response G = +2, V = 2 V p-p, R = 150 Ω 40 MHz O L Settling Time to 0.1% G = +2, V = 2 V step 30 ns O NOISE/DISTORTION PERFORMANCE Harmonic Distortion, HD2/HD3 f = 1 MHz, V = 2 V p-p, G = −1 −70/−89 dBc C O Input Voltage Noise f = 1 MHz 9 nV/√Hz Differential Gain Error (NTSC) G = +2, R = 150 Ω to 0.5 V, +V = 2 V, −V = −1 V 0.23 % L S S Differential Phase Error (NTSC) G = +2, R = 150 Ω to 0.5 V, +V = 2 V, −V = −1 V 0.77 Degrees L S S All-Hostile Crosstalk f = 5 MHz, G = +2 −80 dB DC PERFORMANCE Input Offset Voltage ±2.5 ±10 mV T to T ±3.1 mV MIN MAX W grade only, T to T ±3.1 ±16 mV MIN MAX Offset Drift 6 µV/°C Input Bias Current −50 +2 +50 pA W grade only, T to T −50 +50 nA MIN MAX Open-Loop Gain R = 1 kΩ to 1.5 V 72 76 dB L W grade only, T to T , R = 1 kΩ to 1.5 V 60 dB MIN MAX L R = 150 Ω to 1.5 V 65 dB L Rev. F | Page 5 of 24

ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Data Sheet Parameter Test Conditions/Comments Min Typ Max Unit INPUT CHARACTERISTICS Input Resistance 5 GΩ Input Capacitance 3.2 pF Input Common-Mode Voltage Range −V − 0.3 to V S +V − 0.8 S Common-Mode Rejection Ratio (CMRR) V = 0 V to 1.5 V 87 dB CM OUTPUT CHARACTERISTICS Output Voltage Swing R = 1 kΩ to 1.5 V 0.01 to 2.98 V L R = 150 Ω to 1.5 V 0.07 to 2.87 V L Output Current 1% THD with 1 MHz, V = 2 V p-p 37 mA O Short-Circuit Current Sourcing 80 mA Sinking 163 mA POWER-DOWN PINS (PD1, PD2, PD3) ADA4891-3, ADA4891-3W only Threshold Voltage, V 1.3 V TH Bias Current Device enabled 48 nA Device powered down −13 µA Turn-On Time Device enabled, output rises to 90% of final value 185 ns Turn-Off Time Device powered down, output falls to 10% of 58 ns final value POWER SUPPLY Operating Range 2.7 5.5 V Quiescent Current per Amplifier 3.5 mA Supply Current When Powered Down ADA4891-3, ADA4891-3W only 0.73 mA Power Supply Rejection Ratio (PSRR) Positive PSRR +V = 3 V to 3.15 V, −V = 0 V 76 dB S S Negative PSRR +V = 3 V, −V = −0.15 V to 0 V 72 dB S S OPERATING TEMPERATURE RANGE −40 +125 °C Rev. F | Page 6 of 24

Data Sheet ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 ABSOLUTE MAXIMUM RATINGS To ensure proper operation, it is necessary to observe the maxi- Table 3. mum power derating curves shown in Figure 6. These curves Parameter Rating are derived by setting T = 150°C in Equation 1. Figure 6 shows Supply Voltage 6 V J the maximum safe power dissipation in the package vs. the Input Voltage (Common Mode) −V − 0.5 V to +V S S ambient temperature on a JEDEC standard 4-layer board. Differential Input Voltage ±V S Storage Temperature Range −65°C to +125°C 2.0 TJ = 150°C Operating Temperature Range −40°C to +125°C 14-LEAD TSSOP W) Lead Temperature (Soldering, 10 sec) 300°C N ( O 1.5 Stresses at or above those listed under Absolute Maximum ATI 8-LEAD SOIC_N P Ratings may cause permanent damage to the product. This is a SI S DI stress rating only; functional operation of the product at these R 1.0 E 8-LEAD MSOP or any other conditions above those indicated in the operational W O section of this specification is not implied. Operation beyond UM P 5-LEAD SOT-23 the maximum operating conditions for extended periods may M 0.5 affect product reliability. MAXI 14-LEAD SOIC_N MAXIMUM POWER DISSIPATION TAhDeA m48a9x1im-1u/AmD pAo4w8e9r1 -t2h/aAt DcaAn4 b8e9 1s-a3fe/AlyD dAis4si8p9a1t-e4d ibsy l itmheit ed 0–55 –35 –15 AM5BIENT2 T5EMP4E5RATU6R5E (°C8)5 105 125 08054-002 by the associated rise in junction temperature. The maximum Figure 6. Maximum Power Dissipation vs. Ambient Temperature safe junction temperature for plastic encapsulated devices is Table 4 lists the thermal resistance (θ ) for each ADA4891-1/ JA determined by the glass transition temperature of the plastic, ADA4891-2/ADA4891-3/ADA4891-4 package. approximately 150°C. Temporarily exceeding this limit can cause a shift in parametric performance due to a change in the Table 4. stresses exerted on the die by the package. Exceeding a junction Package Type θJA Unit temperature of 175°C for an extended period can result in 5-Lead SOT-23 146 °C/W device failure. 8-Lead SOIC_N 115 °C/W 8-Lead MSOP 133 °C/W The still-air thermal properties of the package (θ ), the ambient JA 14-Lead SOIC_N 162 °C/W temperature (T ), and the total power dissipated in the package A 14-Lead TSSOP 108 °C/W (P ) can be used to determine the junction temperature of the die. D The junction temperature can be calculated as ESD CAUTION T = T + (P × θ ) (1) J A D JA The power dissipated in the package (P ) is the sum of the D quiescent power dissipation and the power dissipated in the package due to the load drive for all outputs. It can be calculated by P = (V × I) + (V − V ) × (V /R) (2) D T S S OUT OUT L where: V is the total supply rail. T I is the quiescent current. S V is the positive supply rail. S V is the output of the amplifier. OUT R is the output load of the amplifier. L Rev. F | Page 7 of 24

ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS Unless otherwise noted, all plots are characterized for the ADA4891-1, ADA4891-2, ADA4891-3, and ADA4891-4. For the ADA4891-1 and ADA4891-2, the typical R value is 604 Ω. For the ADA4891-3 and ADA4891-4, the typical R value is 453 Ω. F F 4 5 3 4 dB) 2 dB) 3 G = –1 OR +2 AIN ( 1 AIN ( 2 G = +1 G 0 G 1 OP –1 G = +1 OP 0 SED-LO ––32 GO R= +–21 SED-LO––12 O O–3 L –4 G = +10 L D C –5 G = +5 D C–4 G = +5 E E–5 LIZ –6 LIZ–6 A A M –7 M–7 G = +10 NOR ––98 VVRSOL U==T 51 =Vk Ω200mV p-p NOR––89 VVRSOL U==T 51 =Vk Ω200mV p-p –100.1 1 FREQUE1N0CY (MHz) 100 1k 08054-028 –100.1 1 FREQUE1N0CY (MHz) 100 1k 08054-076 Figure 7. Small-Signal Frequency Response vs. Gain, VS = 5 V, Figure 10. Small-Signal Frequency Response vs. Gain, VS = 5 V, ADA4891-1/ADA4891-2 ADA4891-3/ADA4891-4 6 VS = 2.7V VS = 3V 6 3 3 VS = 2.7V VS = 3V B) B) AIN (d 0 VS = 5V AIN (d 0 VS = 5V OP G –3 OP G–3 O O D-L –6 D-L–6 E E S S O O CL –9 CL–9 G = +1 –12 G = +1 –12 VOUT = 200mV p-p VOUT = 200mV p-p RL = 1kΩ RL = 1kΩ –150.1 1 FREQUE1N0CY (MHz) 100 1k 08054-029 –150.1 1 FREQUE1N0CY (MHz) 100 1k 08054-077 Figure 8. Small-Signal Frequency Response vs. Supply Voltage, Figure 11. Small-Signal Frequency Response vs. Supply Voltage, ADA4891-1/ADA4891-2 ADA4891-3/ADA4891-4 5 5 +125°C +85°C 4 4 +25°C +25°C 0°C 3 3 –40°C B) +85°C B) N (d 2 +125°C 0°C N (d 2 AI AI P G 1 P G 1 O O LO 0 –40°C LO 0 D- D- E E OS –1 OS–1 L L C C –2 –2 VS = 5V GVS = = + 51V –3 GVROL = U= T+ 1 1=k Ω200mV p-p –3 VROL U=T 1 =k Ω200mV p-p –40.1 1 FREQUE1N0CY (MHz) 100 1k 08054-030 –40.1 1 FREQUE1N0CY (MHz) 100 1k 08054-078 Figure 9. Small-Signal Frequency Response vs. Temperature, VS = 5 V, Figure 12. Small-Signal Frequency Response vs. Temperature, VS = 5 V, ADA4891-1/ADA4891-2 ADA4891-3/ADA4891-4 Rev. F | Page 8 of 24

Data Sheet ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 7 7 6 +25°C 6 +85°C +85°C +125°C –40°C 5 0°C 5 +25°C 4 +125°C 4 0°C B) B) d 3 d 3 N ( N ( AI 2 AI 2 G G P 1 P 1 O O O 0 O 0 ED-L –1 –40°C ED-L –1 S S O –2 O –2 L L C –3 C –3 –4 VS = 3V –4 VS = 3V G = +1 G = +1 –5 VOUT = 200mV p-p –5 VOUT = 200mV p-p RL = 1kΩ RL = 1kΩ –60.1 1 FREQUE1N0CY (MHz) 100 1k 08054-031 –60.1 1 FREQUE1N0CY (MHz) 100 1k 08054-079 Figure 13. Small-Signal Frequency Response vs. Temperature, VS = 3 V, Figure 16. Small-Signal Frequency Response vs. Temperature, VS = 3 V, ADA4891-1/ADA4891-2 ADA4891-3/ADA4891-4 0.1 0.1 B) B) N (d 0 N (d 0 OP GAI –0.1 VOUT =V 2SV = p 3-Vp OP GAI–0.1 VVSO U=T 5 =V 1.4V p-p D-LO VOUT = 1V.4SV = p 5-Vp D-LO OSE –0.2 OSE–0.2 VS = 3V CL CL VOUT = 2V p-p D D ALIZE –0.3 VOUT =V 2SV = p 5-Vp ALIZE–0.3 VVOS U=T 5 =V 2V p-p M M NOR ––00..540.1GRRFL = == + 6120540ΩΩ 1FREQUEVNOCUYT (=M 1HV.z4S)V1 =0 p 3-Vp 10008054-019 NOR––00..450.1GRRFL = == + 3127540ΩΩ 1FREQUENVVCSOY U =(T M3 =VH 1z.)140V p-p 100 08054-080 Figure 14. 0.1 dB Gain Flatness vs. Supply Voltage, G = +2, Figure 17. 0.1 dB Gain Flatness vs. Supply Voltage, G = +2, ADA4891-1/ADA4891-2 ADA4891-3/ADA4891-4 1 1 P GAIN (dB) ––210 VOUT = G2V = p +-p2 GVO =U T+ 1= 1V p-p P GAIN (dB)––120 GVGVO O ==UU T+T– 1 1== 12VV pp--pp ED-LOO ––43 G = +5 GVO =U T– 1= 2V p-p ED-LOO––34 VOUT = 2GV =p -+p5 LOS –5 VOUT = 2V p-p LOS–5 C C D –6 D –6 E E Z Z LI –7 LI–7 A A M M R –8 R–8 NO –9 VRSL == 51V50Ω NO–9 VRSL == 51V50Ω VOUT = G2V = p +-p2 –100.1 1 FREQUE1N0CY (MHz) 100 1k 08054-036 –100.1 1 FREQUE1N0CY (MHz) 100 1k 08054-081 Figure 15. Large-Signal Frequency Response vs. Gain, VS = 5 V, Figure 18. Large-Signal Frequency Response vs. Gain, VS = 5 V, ADA4891-1/ADA4891-2 ADA4891-3/ADA4891-4 Rev. F | Page 9 of 24

ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Data Sheet 1 1 dB) 0 G = –1 dB) 0 G = –1 N (–1 VOUT = 2V p-p N (–1 VOUT = 2V p-p AI AI G = +2 G–2 G–2 VOUT = 2V p-p P P D-LOO––34 GVO =U T+ 2= 2V p-p GVO =U T+ 1= 1V p-p D-LOO––34 GVO =U T+ 1= 1V p-p E E ED CLOS––56 GVO =U T+ 5= 2V p-p ED CLOS––56 GVO =U T+ 5= 2V p-p Z Z LI–7 LI–7 A A M M R–8 R–8 NO VS = 3V NO VS = 3V –9 RL = 150Ω –9 RL = 150Ω –100.1 1 FREQUE1N0CY (MHz) 100 1k 08054-037 –100.1 1 FREQUE1N0CY (MHz) 100 1k 08054-082 Figure 19. Large-Signal Frequency Response vs. Gain, VS = 3 V, Figure 22. Large-Signal Frequency Response vs. Gain, VS = 3 V, ADA4891-1/ADA4891-2 ADA4891-3/ADA4891-4 –40 –30 VS = 5V VS = 3V RL = 1kΩ G = +2 RL = 1kΩ –50 VOUT = 2V p-p SECOND HARMONIC VOUT = 2V p-p –40 G = +1 THIRD HARMONIC –60 G = +2 N (dBc) –70 SECONGD H= A+R1MONIC N (dBc) –50 G = +1SECOND HARMONIC ORTIO –80 ORTIO –60 SECOND HARMONIC +VS = +1.9V DIST –90 DIST –70 –100 G = +2 OUT THIRD HARMONIC IN 1kΩ –80 –110 G = +1 THIRDG H =A R+2MONIC 50Ω –VS = –1.1V THIRD HARMONIC G = +1 CONFIGURATION –1200.1 FREQUEN1CY (MHz) 10 08054-038 –900.1 FREQUEN1CY (MHz) 10 08054-039 Figure 20. Harmonic Distortion (HD2, HD3) vs. Frequency, VS = 5 V Figure 23. Harmonic Distortion (HD2, HD3) vs. Frequency, VS = 3 V –40 –40 VS = 5V G =+1 +VS = +1.9V G = +1 –50 RfCL == 11MkΩHz SECOND HARMONIC –50 CONFIGURATISOENCONGD H= A+R1MONIC OUT –60 –60 IN 1kΩ 50Ω dBc) –70 SECONGD H=A–R1MONIC dBc) –70 –VS = –1.1V N ( N ( O O TI –80 TI –80 R R O O DIST –90 DIST –90 SECOND HARMGO =N –IC1 –100 G =–1 –100 G = –1 G = +1 THIRD HARMONIC THIRD HARMONIC THIRD HARMONIC –110 –110 GTH =IR +D1 HARMONIC VfCS == 13MVHz –120 –120 0 0.5 1.0 1O.5UTP2U.0T VO2L.5TAGE3. 0(V p-3p.)5 4.0 4.5 5.0 08054-040 0 0.5 OU1.T0PUT VO1L.T5AGE (V 2p.-0p) 2.5 3.0 08054-041 Figure 21. Harmonic Distortion (HD2, HD3) vs. Output Voltage, VS = 5 V Figure 24. Harmonic Distortion (HD2, HD3) vs. Output Voltage, VS = 3 V Rev. F | Page 10 of 24

Data Sheet ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 –40 1k GRL = = + 1250Ω SECONVDS H=A 3RVMONIC –50 fC = 1MHz VS = 3V THIRD HARMONIC Hz) TORTION (dBc) ––7600 VS = 5V THIRDV SH A= R5MVONIC GE NOISE (nV/ 100 S SECOND HARMONIC A DI –80 LT 10 O V –90 VS = 5V G = +1 –100 1 0 0.5 1.0 1O.5UTP2U.0T VO2L.T5AGE3. 0(V p-3p.)5 4.0 4.5 5.0 08054-042 10 100 1kFREQU1E0NkCY (Hz)100k 1M 10M 08054-045 Figure 25. Harmonic Distortion (HD2, HD3) vs. Output Voltage, G = +2 Figure 28. Input Voltage Noise vs. Frequency 90 0 0.06 80 VRSL == 51VkΩ –18 NTIALOR (%) 00..0042 70 –36 RERR 0 OPEN-LOOP GAIN (dB) 2345600000 PHASE GAIN –––––119752002468 PHASE (Degrees) DIFFENTIALGAIN ER (Degrees)–––000...000000...642213 1RVSSLT == 512V5N0,D ΩG =3 R+D2 4TH 5TH 6TH 7TH 8TH 9TH 10TH 100 ––116424 DIFFEREASE ERRO ––00..120 RVSL == 51V50, ΩG = +2 –100.001 0.01 0.1FREQUEN1CY (MHz)10 100 1k–180 08054-043 PH –0.3 1ST 2ND M3RODDU4LTAHTIN5GT HRAM6PTH LEV7ETHL (IR8ETH) 9TH 10TH 08054-060 Figure 26. Open-Loop Gain and Phase vs. Frequency Figure 29. Differential Gain and Phase Errors 7 7 B) 6 B) 6 d d N ( 5 CL = 47pF N ( 5 CL = 47pF AI AI G 4 G 4 OOP 3 CL = 22pF OOP 3 CL = 22pF ED-L 2 CL = 10pF ED-L 2 CL = 10pF S S CLO 1 CLO 1 D 0 D 0 E E ALIZ–1 CL = 0pF ALIZ–1 CL = 0pF RM–2 VS = 5V RM–2 VS = 5V O G = +2 O G = +2 N–3 RL = 150Ω N–3 RL = 150Ω VOUT = 200mV p-p VOUT = 200mV p-p –40.1 1 FREQUE1N0CY (MHz) 100 1k 08054-044 –40.1 1 FREQUE1N0CY (MHz) 100 1k 08054-083 Figure 27. Small-Signal Frequency Response vs. CL, Figure 30. Small-Signal Frequency Response vs. CL, ADA4891-1/ADA4891-2 ADA4891-3/ADA4891-4 Rev. F | Page 11 of 24

ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Data Sheet 100 100k VS = 5V G = +1 10k Ω) 10 Ω) E ( E ( C C N N 1k A A D D PE 1 PE M M T I T I 100 U U P P T T U U O 0.1 O 10 VS = 5V G = +1 0.010.01 0.1 FREQU1ENCY (MHz)10 100 08054-046 10.01 0.1 FREQ1UENCY (MHz)10 100 08054-089 Figure 31. Closed-Loop Output Impedance vs. Frequency, Device Enabled Figure 34. Closed-Loop Output Impedance vs. Frequency, Device Disabled (ADA4891-3 Only) G = +1 1.5 VS = 3V VROL U=T 1 =k Ω200mV p-p RVL S= =1 k5ΩV GVO =U T+ 2= 2V p-p 1.0 mV) 100 V) RL V=S 1 =5 05ΩV VRSL == 31V50Ω GE ( VS = 5V GE ( 0.5 VS = 3V OLTA 0 OLTA 0 RL = 1kΩ UT V UT V UTP UTP–0.5 O–100 O –1.0 50mV/DIV 10ns/DIV 08054-048 –1.510 20 30 40 TIM5E0 (ns) 60 70 80 90 08054-047 Figure 32. Small-Signal Step Response, G = +1 Figure 35. Large-Signal Step Response, G = +2 VS = 5V VS = 3V RL = 1kΩ G = +1 RL = 1kΩ G = +1 1 VOUT = 2V p-p 0.5 VOUT = 1V p-p V) V) AGE ( RL = 150Ω AGE ( RL = 150Ω LT LT O 0 O 0 V V T T U U P P T T U U O O –1 –0.5 0.5V/DIV 10ns/DIV 08054-049 0.5V/DIV 10ns/DIV 08054-050 Figure 33. Large-Signal Step Response, VS = 5 V, G = +1 Figure 36. Large-Signal Step Response, VS = 3 V, G = +1 Rev. F | Page 12 of 24

Data Sheet ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 0.30 200 VS = 5V VS=5V G = +2 0.20 GRL==+1250Ω 190 RL = 150Ω VOUT=2Vp-p FALLING EDGE 0.10 s) 180 TLING (%) 0 RATE (V/µ 170 ET W S E –0.10 SL 160 RISING EDGE –0.20 150 –0.300 25 30TIME (ns)35 40 4508054-061 1401.0 1.5 2.0 2O.5UTPUT3 .S0TEP (3V.5) 4.0 4.5 5.0 08054-051 Figure 37. Short-Term Settling Time to 0.1% Figure 40. Slew Rate vs. Output Step 3 1 VS = ±2.5V VS = ±2.5V G = +1 G = +1 INPUT RL = 1kΩ RL = 1kΩ INPUT 2 OUTPUT 0 V) V) E ( E ( D D TU 1 TU –1 LI LI P P M M A A OUTPUT 0 –2 –1 1V/DIV 5ns/DIV 08054-071 –3 1V/DIV 5ns/DIV 08054-063 Figure 38. Input Overdrive Recovery from Positive Rail Figure 41. Input Overdrive Recovery from Negative Rail 3 3 OUTPUT GVS = = – ±22.5V INPUT GVS = = – ±22.5V RL = 1kΩ RL = 1kΩ 2 2 1 1 V) V) E ( E ( D INPUT D TU 0 TU 0 LI LI P P M M A A –1 –1 –2 –2 OUTPUT –3 1V/DIV 5ns/DIV 08054-070 –3 1V/DIV 5ns/DIV 08054-052 Figure 39. Output Overdrive Recovery from Positive Rail Figure 42. Output Overdrive Recovery from Negative Rail Rev. F | Page 13 of 24

ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Data Sheet –10 0 VS = 5V VS = 5V –10 G = +2 –20 RL = 150Ω –20 –30 –30 –40 B) TSSOP dB) N (d–40 CMRR ( ––6500 SOLATIO––6500 SOIC I –70 –70 –80 –80 –90 –900.01 0.1 FREQUEN1CY (MHz) 10 100 08054-090 –1000.1 1 FREQUE1N0CY (MHz) 100 1k 08054-084 Figure 43. CMRR vs. Frequency Figure 46. Forward Isolation vs. Frequency (ADA4891-3 Only) –10 1.0 Vs = 5V VS = 5V G = +1 0.9 G = –2 –20 V) E ( 0.8 G –30 OLTA 0.7 VVOOHH, ,+ +12255°°CC RR (dB) –40 +PSRR ATION V 00..56 VVVVOOOOL,HLL ,+,, +1––24425005°°°°CCCC PS –50 TUR 0.4 A S –60 –PSRR UT 0.3 P UT 0.2 –70 O 0.1 –80 0 0.01 0.1 FREQUEN1CY (MHz) 10 100 08054-054 0 10 20 30 40ILOAD50 (mA)60 70 80 90 100 08054-056 Figure 44. PSRR vs. Frequency Figure 47. Output Saturation Voltage vs. Load Current and Temperature 0 6.0 Vs = 5V VS = 5V –10 G = +2 –20 RVOL U=T 1 = k 2ΩV p-p mA) 5.5 T ( –30 EN K (dB) –40 CURR 5.0 L Y SSTA –50 UPPL 4.5 O –60 S CR NT 4.0 –70 E C S –80 QUIE 3.5 –90 –1000.1 1 FREQUE1N0CY (MHz) 100 1k 08054-072 3.0–40 –20 0 T2E0MPER4A0TURE6 (0ºC) 80 100 120 08054-057 Figure 45. All-Hostile Crosstalk (Output-to-Output) vs. Frequency Figure 48. Supply Current per Amplifier vs. Temperature Rev. F | Page 14 of 24

Data Sheet ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 4.4 A) 4.2 m T ( N 4.0 E R R U C 3.8 Y L P P U 3.6 S T N CE 3.4 S E UI Q 3.2 3.0 2.7 3.0 3.3 SUP3.P6LY VO3L.T9AGE (4V.)2 4.5 4.8 08054-058 Figure 49. Supply Current per Amplifier vs. Supply Voltage Rev. F | Page 15 of 24

ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Data Sheet APPLICATIONS INFORMATION USING THE ADA4891-1/ADA4891-2/ADA4891-3/ WIDEBAND, INVERTING GAIN OPERATION ADA4891-4 +VS Understanding the subtleties of the ADA4891-1/ADA4891-2/ 0.1µF 10µF ADA4891-3/ADA4891-4 family of amplifiers provides insight into how to extract the peak performance from the device. The following sections describe the effect of gain, component values, VO ADA4891 and parasitics on the performance of the ADA4891-1/ADA4891-2/ RL 50Ω ADA4891-3/ADA4891-4. The wideband, noninverting gain SOURCE configuration of the ADA4891-1/ADA4891-2/ADA4891-3/ VI RG RF ADA4891-4 is shown in Figure 50; the wideband, inverting gain RT configuration of the ADA4891-1/ADA4891-2/ADA4891-3/ 0.1µF 10µF WADIDA4E8B9A1-N4 Dis ,s hNoOwnN iInN FVigEuRreT 5IN1.G GAIN OPERATION –VS 08054-024 Figure 51. Inverting Gain Configuration +VS Figure 51 shows the inverting gain configuration. For the 0.1µF 10µF inverting gain configuration, set the parallel combination of 50Ω SOURCE R and R to match the input source impedance. T G VI VO Note that a bias current cancellation resistor is not required in RT ADA4891 the noninverting input of the amplifier because the input bias RL current of the ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 RF is very low (less than 2 pA). Therefore, the dc errors caused by RG the bias current are negligible. 0.1µF 10µF For both noninverting and inverting gain configurations, it is –VS 08054-023 ooufttepnu ut.s Ienfucrl etaos iinngcr tehaes eR tFh vea RluFe v iamluper otov edse hcraeramseo nthice dloisatdo rotnio tnh aet Figure 50. Noninverting Gain Configuration the expense of reducing the 0.1 dB bandwidth of the amplifier. This effect is discussed further in the Effect of R on 0.1 dB Gain In Figure 50, R and R denote the feedback and gain resistors, F F G Flatness section. respectively. Together, R and R determine the noise gain of the F G amplifier. The value of R defines the 0.1 dB bandwidth (for RECOMMENDED VALUES F more information, see the Effect of R on 0.1 dB Gain Flatness F Table 5 and Table 6 provide a quick reference for various configu- section). Typical R values range from 549 Ω to 698 Ω for the F rations and show the effect of gain on the −3 dB small-signal ADA4891-1/ADA4891-2. Typical R values range from 301 Ω F bandwidth, slew rate, and peaking of the ADA4891-1/ADA4891-2/ to 453 Ω for the ADA4891-3/ADA4891-4. ADA4891-3/ADA4891-4. Note that as the gain increases, the In a controlled impedance signal path, RT is used as the input small-signal bandwidth decreases, as is expected from the gain termination resistor designed to match the input source imped- bandwidth product relationship. In addition, the phase margin ance. Note that RT is not required for normal operation. RT is improves with higher gains, and the amplifier becomes more generally set to match the input source impedance. stable. As a result, the peaking in the frequency response is reduced (see Figure 7 and Figure 10). Table 5. Recommended Component Values and Effect of Gain on ADA4891-1/ADA4891-2 Performance (R = 1 kΩ) L Feedback Network Values −3 dB Small-Signal Bandwidth (MHz) Slew Rate (V/µs) Gain R (Ω) R (Ω) V = 200 mV p-p t t Peaking (dB) F G OUT R F −1 604 604 118 188 192 1.3 +1 0 Open 240 154 263 2.6 +2 604 604 120 170 210 1.4 +5 604 151 32.5 149 154 0 +10 604 67.1 12.7 71 72 0 Rev. F | Page 16 of 24

Data Sheet ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Table 6. Recommended Component Values and Effect of Gain on ADA4891-3/ADA4891-4 Performance (R = 1 kΩ) L Feedback Network Values −3 dB Small-Signal Bandwidth (MHz) Slew Rate (V/µs) Gain R (Ω) R (Ω) V = 200 mV p-p t t Peaking (dB) F G OUT R F −1 453 453 97 186 194 0.9 +1 0 Open 220 151 262 4.1 +2 453 453 97 181 223 0.9 +5 453 90.6 31 112 120 0 +10 453 45.3 13 68 67 0 EFFECT OF R ON 0.1 dB GAIN FLATNESS 0.3 F RG = RF = 453Ω Gain flatness is an important specification in video applications. B) 0.2 RG = RF = 402Ω d It represents the maximum allowable deviation in the signal N ( RG = RF = 357Ω AI 0.1 amplitude within the pass band. Tests have revealed that the P G O human eye is unable to distinguish brightness variations of O 0 L less than 1%, which translates into a 0.1 dB signal drop within SED- –0.1 RG = RF = 301Ω the pass band or, put simply, 0.1 dB gain flatness. O L C D –0.2 The PCB layout configuration and bond pads of the chip often E Z contribute to stray capacitance. The stray capacitance at the ALI –0.3 inverting input forms a pole with the feedback and gain resistors. RM VS = 5V This additional pole adds phase shift and reduces phase margin NO –0.4 GVO =U T+ 2= 2V p-p RL = 150Ω ianm tphleif cielor saendd- lpoeoapk pinhga sine rtehsep forneqseu,e cnacuys irnegsp inonstsaeb. i lity in the –0.50.1 1FREQUENCY (MHz)10 100 08054-085 Figure 52 and Figure 53 show the effect of using various values Figure 53. 0.1 dB Gain Flatness, Noninverting Gain Configuration, ADA4891-3/ADA4891-4 for Feedback Resistor R on the 0.1 dB gain flatness of the devices. F Figure 52 shows the effect for the ADA4891-1/ADA4891-2. To obtain the desired 0.1 dB bandwidth, adjust the feedback Figure 53 show the effect for the ADA4891-3/ADA4891-4. resistor, R, as shown in Figure 52 and Figure 53. If R cannot F F Note that a larger RF value causes more peaking because the be adjusted, a small capacitor can be placed in parallel with RF additional pole formed by RF and the input stray capacitance to reduce peaking. shifts down in frequency and interacts significantly with the The feedback capacitor, C, forms a zero with the feedback F internal poles of the amplifier. resistor, which cancels out the pole formed by the input stray 0.2 capacitance and the gain and feedback resistors. For a first pass RG = RF = 698Ω B) RG = RF = 649Ω in determining the CF value, use the following equation: AIN (d 0.1 RG = RF = 604Ω RG × CS = RF × CF G OP 0 where: O D-L RG = RF = 549Ω RG is the gain resistor. OSE –0.1 CS is the input stray capacitance. D CL RF is the feedback resistor. E –0.2 C is the feedback capacitor. Z F LI A M Using this equation, the original closed-loop frequency response of R –0.3 VS = 5V NO G = +2 the amplifier is restored, as if there is no stray input capacitance. VOUT = 2V p-p –0.40.1RL = 150Ω 1FREQUENCY (MHz)10 100 08054-022 MFcaigpousartce io t5fot4re sntho, o hrweodsw utehcveee erp,f efteahcketi onvfag ul.u sIeinn ogthf vCias rFc iioasus des, ev ttahelreum eAsi DnfoeArd 4t he8m9e 1fpe-i1erd/i cbaalclky. Figure 52. 0.1 dB Gain Flatness, Noninverting Gain Configuration, ADA4891-1/ADA4891-2 ADA4891-2 are used for demonstration purposes and RF = RG = 604 Ω. The input stray capacitance, together with the board parasitics, is approximately 2 pF. Rev. F | Page 17 of 24

ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Data Sheet 0.2 These four methods minimize the output capacitive loading effect. dB) CF = 0pF  Reducing the output resistive load. This pushes the pole N ( 0.1 further away and, therefore, improves the phase margin. AI P G CF = 1pF  Increasing the phase margin with higher noise gains. As O O 0 the closed-loop gain is increased, the larger phase margin L ED- allows for large capacitive loads with less peaking. S CLO –0.1 CF = 3.3pF  Adding a parallel capacitor (CF) with RF, from −IN to the D output. This adds a zero in the closed-loop frequency E Z LI response, which tends to cancel out the pole formed by the RMA –0.2 VGS = = + 52V capacitive load and the output impedance of the amplifier. NO RRFL == 610540ΩΩ See the Effect of RF on 0.1 DB Gain Flatness section for –0.3 VOUT = 2V p-p more information. 0.1 1FREQUENCY (MHz)10 100 08054-025  Ptol aicsionlagt ea tshmea llol avda lcuaep raecsiitsotro rfr (oRmS) tihne s oeuritepsu wt isttha gteh eo fo tuhtep ut Figure 54. 0.1 dB Gain Flatness vs. CF, VS = 5 V, ADA4891-1/ADA4891-2 amplifier. DRIVING CAPACITIVE LOADS Figure 57 shows the effect of using a snub resistor (R) on reducing S the peaking in the worst-case frequency response (gain of +1). A highly capacitive load reacts with the output impedance of Using R = 100 Ω reduces the peaking by 3 dB, with the trade-off the amplifiers, causing a loss of phase margin and subsequent S that the closed-loop gain is reduced by 0.9 dB due to attenuation peaking or even oscillation. The ADA4891-1/ADA4891-2 are at the output. R can be adjusted from 0 Ω to 100 Ω to maintain used to demonstrate this effect (see Figure 55 and Figure 56). S an acceptable level of peaking and closed-loop gain, as shown in 8 Figure 57. 6 8 VS = 5V 4 6 VGO =U T+ 1= 200mV p-p B) 2 4 CRLL == 16k.8ΩpF d E ( 0 UD B) 2 NIT –2 E (d 0 RS = 0Ω G D A U M –4 NIT –2 RS = 100Ω G –6 VS = 5V MA –4 –1–08F0i.g1GRVCuOLL r=e U== T+5 61 1=5.k8 .Ω2 pC0Fl0omsVed p1A--LDpoAo4Fp8R 9FE1rQe-1qU/uEAeNDnCA1cY0y4 ( 8RM9eH1sz-p2)o nse, CL1 0=0 6.8 pF, 08054-032 –1––0860.120S0TmVEIVPN 50Ω 1 FREQUERRNSLC1Y0 (MHCz)LOUT 100 08054-033 Figure 57. Closed-Loop Frequency Response with Snub Resistor, CL = 6.8 pF Figure 58 shows that the transient response is also much improved VS = 5V G = +1 by the snub resistor (R = 100 Ω) compared to that of Figure 56. RL = 1kΩ S CL = 6.8pF V) 100 VGS = = + 51V E (m RCLL == 16k.8ΩpF AG RS = 100Ω OLT 0 mV) 100 UTPUT V–100 OLTAGE ( 0 O V T U P 50mV/DIV 50ns/DIV 08054-034 OUT–100 Figure 56. 2A0D0A m4V89 S1t-e1p/ ARDesAp4o8n9s1e-2, C L = 6.8 pF, 50mV/DIV 50ns/DIV 08054-035 Figure 58. 200 mV Step Response, CL = 6.8 pF, RS = 100 Ω Rev. F | Page 18 of 24

Data Sheet ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 TERMINATING UNUSED AMPLIFIERS SINGLE-SUPPLY OPERATION Terminating unused amplifiers in a multiamplifier package is The ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 can also an important step in ensuring proper operation of the functional be operated from a single power supply. Figure 61 shows the amplifier. Unterminated amplifiers can oscillate and draw ADA4891-3 configured as a single 5 V supply video driver. excessive power. The recommended procedure for terminating  The input signal is ac-coupled into the amplifier via unused amplifiers is to connect any unused amplifiers in a Capacitor C1. unity-gain configuration and to connect the noninverting input  Resistor R2 and Resistor R4 establish the input midsupply to midsupply voltage. With symmetrical bipolar power supplies, reference for the amplifier. this means connecting the noninverting input to ground, as  Capacitor C5 prevents constant current from being drawn shown in Figure 59. through the gain set resistor (R ) and enables the ADA4891-3 G +VS at dc to provide unity gain to the input midsupply voltage, thereby establishing the output voltage at midsupply.  Capacitor C6 is the output coupling capacitor. ADA4891 The large-signal frequency response obtained with single- –VS 08054-064 s(Fuipgpulrye o 1p8e rsahtoiowns itsh ied leanrgtiec-asli gton athl efr beqipuoelnacr ys urepspplyo nospee)r. ation Figure 59. Terminating Unused Amplifier with Symmetrical Bipolar Power Supplies Four pairs of low frequency poles are formed by R2/2 and C2, R3 and C1, R and C5, and R and C6. With this configuration, In single power supply applications, a synthetic midsupply G L the −3 dB cutoff frequency at low frequency is 12 Hz. The source must be created. This can be accomplished with a simple values of C1, C2, C5, and C6 can be adjusted to change the low resistive voltage divider. Figure 60 shows the proper connection frequency −3 dB cutoff point to suit individual design needs. for terminating an unused amplifier in a single-supply configuration. For more information about single-supply operation of op amps, see the Analog Dialogue article “Avoiding Op Amp Instability +VS Problems in Single-Supply Applications” (Volume 35, Number 2) at www.analog.com. 2.5kΩ +5V 2.5kΩ ADA4891 1Cµ2F 1C0µ3F 08054-065 50Rk2Ω 50Rk4Ω 0.0C14µF Figure 60. Terminating Unused Amplifier with Single Power Supply +5V R3 DISABLE FEATURE (ADA4891-3 ONLY) 100kΩ C6 The ADA4891-3 includes a power-down feature that can be VIN 22µF R1 C1 VOUT used to save power when an amplifier is not in use. When an 50Ω 22µF RL amplifier is powered down, its output goes to a high impedance 150Ω state. The output impedance decreases as frequency increases; RG RF 453Ω 453Ω ADA4891-3 this effect can be observed in Figure 34. With the power-down f5u0n MctHiozn., Fai gfourrwe a4r6d s ihsoowlasti tohne ofof r−w4a0r ddB is coalnat iboen a vcsh.i efrveeqdu aetn cy 22CµF5 –VS 08054-086 Figure 61. Single-Supply Video Driver Schematic data. The power-down feature is asserted by pulling the PD1, PD2, or PD3 pin low. Table 7 summarizes the operation of the power-down feature. Table 7. Disable Function Power-Down Pin Connection (PDx) Amplifier Status >V or floating Enabled TH <V Disabled TH Rev. F | Page 19 of 24

ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Data Sheet VIDEO RECONSTRUCTION FILTER MULTIPLEXER A common application for active filters is at the output of video The ADA4891-3 has a disable pin used to power down the digital-to-analog converters (DACs)/encoders. The filter, or more amplifier to save power or to create a mux circuit. If two or appropriately, the video reconstruction filter, is used at the output more ADA4891-3 outputs are connected together and only one of a video DAC/encoder to eliminate the multiple images that output is enabled, then only the signal of the enabled amplifier are created during the sampling process within the DAC. For appears at the output. This configuration is used to select from portable video applications, the ADA4891-1/ADA4891-2/ various input signal sources. Additionally, the same input signal ADA4891-3/ADA4891-4 is an ideal choice due to its lower is applied to different gain stages, or differently tuned filters, to power requirements and high performance. make a gain-step amplifier or a selectable frequency amplifier. For active filters, a good rule of thumb is that the −3 dB band- Figure 64 shows a schematic of two ADA4891-3 devices used width of the amplifiers be at least 10 times higher than the corner to create a mux that selects between two inputs. One input is a frequency of the filter. This ensures that no initial roll-off is 1 V p-p, 3 MHz sine wave; the other input is a 2 V p-p, 1 MHz introduced by the amplifier and that the pass band is flat until sine wave. the cutoff frequency. +2.5V An example of a 15 MHz, 3-pole, Sallen-Key, low-pass video 0.1µF 10µF reconstruction filter is shown in Figure 62. This circuit features a gain of +2, a 0.1 dB bandwidth of 7.3 MHz, and over 17 dB 49.9Ω ADA4891-3 attenuation at 29.7 MHz (see Figure 63). The filter has three 1V p-p 3MHz poles: two poles are active, with a third passive pole (R6 and C4) 0.1µF 10µF 49.9Ω placed at the output. C3 improves the filter roll-off. R6, R7, and –2.5V R8 make up the video load of 150 Ω. Components R6, C4, R7, 453Ω R8, and the input termination of the network analyzer form a 453Ω VOUT 6 dB attenuator; therefore, the reference level is roughly 0 dB, +2.5V 49.9Ω as shown in Figure 63. 49.9Ω C2 0.1µF 10µF 51pF 2V p-p 49.9Ω ADA4891-3 4R72Ω 12R53Ω +5V R6 R7 1MHz 6.8Ω 68.1Ω VIN R1 51CpF1 C4 R8 VOUT 0.1µF 10µF R4 1nF 75Ω –2.5V 1kΩ 453Ω 453Ω R1k5Ω 1C5p3F 08054-062 FiguSreE L6E4C. TTwo-to-One MultiplexHerC UOs4ing Two ADA4891-3 Devices 08054-087 Figure 62. 15 MHz Video Reconstruction Filter Schematic The select signal and the output waveforms for this circuit are shown in Figure 65. 0 –3 1V/DIV 1µs/DIV –6 –9 OUTPUT –12 B) E (d –15 D –18 U NIT –21 G A –24 M SELECT –27 –30 –33 ––33960.03 0.1 FREQ1UENCY (MHz) 10 100 08054-059 F5iVg/DuIrVe 65. ADA4891-3 Mux Output1 µs/DIV 08054-088 Figure 63. Video Reconstruction Filter Frequency Performance Rev. F | Page 20 of 24

Data Sheet ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 LAYOUT, GROUNDING, AND BYPASSING POWER SUPPLY BYPASSING be kept at a distance of at least 0.05 mm from the input pins on all layers of the board. Power supply pins are additional op amp inputs, and care must INPUT-TO-OUTPUT COUPLING be taken so that a noise-free, stable dc voltage is applied. The purpose of bypass capacitors is to create a low impedance path To minimize capacitive coupling between the inputs and outputs from the supply to ground over a range of frequencies, thereby and to avoid any positive feedback, the input and output signal shunting or filtering the majority of the noise to ground. Bypassing traces should not be parallel. In addition, the input traces should is also critical for stability, frequency response, distortion, and not be close to each other. A minimum of 7 mils between the PSRR performance. two inputs is recommended. If traces are used between components and the package, chip LEAKAGE CURRENTS capacitors of 0.1 μF (X7R or NPO) are critical and should be In extremely low input bias current amplifier applications, stray placed as close as possible to the amplifier package. The 0508 leakage current paths must be kept to a minimum. Any voltage case size for such a capacitor is recommended because it offers differential between the amplifier inputs and nearby traces sets low series inductance and excellent high frequency performance. up a leakage path through the PCB. Consider a 1 V signal and Larger chip capacitors, such as 0.1 μF capacitors, can be shared 100 GΩ to ground present at the input of the amplifier. The among a few closely spaced active components in the same resultant leakage current is 10 pA; this is 5× the typical input signal path. A 10 μF tantalum capacitor is less critical for high bias current of the amplifier. Poor PCB layout, contamination, frequency bypassing, but it provides additional bypassing for and the board material can create large leakage currents. Common lower frequencies. contaminants on boards are skin oils, moisture, solder flux, and GROUNDING cleaning agents. Therefore, it is imperative that the board be thoroughly cleaned and that the board surface be free of When possible, ground and power planes should be used. Ground contaminants to take full advantage of the low input bias currents and power planes reduce the resistance and inductance of the of the ADA4891-1/ADA4891-2/ ADA4891-3/ADA4891-4. power supply feeds and ground returns. If multiple planes are used, they should be stitched together with multiple vias. The To significantly reduce leakage paths, a guard ring/shield should returns for the input, output terminations, bypass capacitors, be used around the inputs. The guard ring circles the input pins and RG should all be kept as close to the ADA4891-1/ADA4891-2/ and is driven to the same potential as the input signal, thereby ADA4891-3/ADA4891-4 as possible. Ground vias should be reducing the potential difference between pins. For the guard ring placed at the side or at the very end of the component mounting to be completely effective, it must be driven by a relatively low pads to provide a solid ground return. The output load ground impedance source and should completely surround the input and the bypass capacitor grounds should be returned to a leads on all sides, above and below, using a multilayer board common point on the ground plane to minimize parasitic (see Figure 66). inductance and to help improve distortion performance. GUARD RING INPUT AND OUTPUT CAPACITANCE Parasitic capacitance can cause peaking and instability and, GUARD RING tHhiegrhe fsopreee,d s hamouplldif ibeer sm arine ismeniszietdiv eto t oe npsaurarsei tsitca cbalpe aocpitearnacteio bne.t ween INVERTING NONINVERTING 08054-067 Figure 66. Guard Ring Configurations the inputs and ground. A few picofarads of capacitance reduce the input impedance at high frequencies, in turn increasing the The 5-lead SOT-23 package for the ADA4891-1 presents a gain of the amplifier and causing peaking of the frequency challenge in keeping the leakage paths to a minimum. The response or even oscillations, if severe enough. It is recommended pin spacing is very tight, so extra care must be used when that the external passive components that are connected to the constructing the guard ring (see Figure 67 for the recom- input pins be placed as close as possible to the inputs to avoid mended guard ring construction). parasitic capacitance. In addition, the ground and power planes under the pins of OUT ADA4891-1 +VS OUTADA4891-1+VS the ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 should be –VS –VS cleared of copper to prevent parasitic capacitance between the input and output pins to ground. This is because a single +IN –IN +IN –IN mcaopuacnittianngc pe atod gorno au nSdO iIfC t hfoeo gtrporuinntd c oanr paodwd ears pmlaunceh i sa sn 0o.t2 pF of INVERTING NONINVERTING 08054-068 cleared under the ADA4891-1/ADA4891-2/ADA4891-3/ Figure 67. Guard Ring Layout, 5-Lead SOT-23 ADA4891-4 pins. In fact, the ground and power planes should Rev. F | Page 21 of 24

ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Data Sheet OUTLINE DIMENSIONS 5.00(0.1968) 4.80(0.1890) 8 5 4.00(0.1574) 6.20(0.2441) 3.80(0.1497) 1 4 5.80(0.2284) 1.27B(0S.C0500) 1.75(0.0688) 00..5205((00..00109969)) 45° 0.25(0.0098) 1.35(0.0532) 8° 0.10(0.0040) 0° COPLANARITY 0.51(0.0201) 0.10 SEATING 0.31(0.0122) 0.25(0.0098) 10..2470((00..00510507)) PLANE 0.17(0.0067) COMPLIANTTOJEDECSTANDARDSMS-012-AA C(RINOEFNPEATRRREOENNLCLTEIHNEOGSNDELISYM)AEANNRDSEIAORRNOESUNANORDETEDAIN-POMPFRIFLOLMPIMIRLELIATIMTEEERTFSEO;RIRNECUQHSUEDIVIINMAELDENENSSTIIOGSNNFS.OR 012407-A Figure 68. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) 3.00 2.90 2.80 1.70 5 4 3.00 1.60 2.80 1.50 2.60 1 2 3 0.95BSC 1.90 BSC 1.30 1.15 0.90 1.45MAX 0.20MAX 0.95MIN 0.08MIN 0.55 0.15MAX 10° 0.45 0.05MIN 0.50MAX SPELAATNIENG 5° B0S.6C0 0.35 0.35MIN 0° COMPLIANTTOJEDECSTANDARDSMO-178-AA 11-01-2010-A Figure 69. 5-Lead Small Outline Transistor Package [SOT-23] (RJ-5) Dimensions shown in millimeters Rev. F | Page 22 of 24

Data Sheet ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 3.20 3.00 2.80 8 5 5.15 3.20 4.90 3.00 4.65 2.80 1 4 PIN 1 IDENTIFIER 0.65 BSC 0.95 15° MAX 0.85 1.10 MAX 0.75 0.80 0.15 0.40 6° 0.23 0.55 CO0P.0L50A.1N0ARICTOYMPLIANT0. 2T5O JEDEC STA0°NDARDS 0M.0O9-187-AA 0.40 10-07-2009-B Figure 70. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters 8.75 (0.3445) 8.55 (0.3366) 4.00 (0.1575) 14 8 6.20 (0.2441) 3.80 (0.1496) 1 7 5.80 (0.2283) 1.27 B(0S.C0500) 1.75 (0.0689) 00..5205 ((00..00109978)) 45° 0.25 (0.0098) 1.35 (0.0531) 8° 0.10 (0.0039) 0° COPL0A.1N0ARITY 0.51 (0.0201) SPLEAATNIENG 0.25 (0.0098) 1.27 (0.0500) 0.31 (0.0122) 0.17 (0.0067) 0.40 (0.0157) COMPLIANTTO JEDEC STANDARDS MS-012-AB C(RINEOFNPEATRRREOENNLCLTEIHN EOGSN EDLSIYM)AEANNRDSEI AORRNOESU NANORDEET DAIN-PO MPFRIFLO LMPIIMRLELIATIMTEEER TFSEO; RIRN ECUQHSU EDI VIINMA LEDENENSSTIIOGSN NFS.OR 060606-A Figure 71. 14-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-14) Dimensions shown in millimeters and (inches) 5.10 5.00 4.90 14 8 4.50 4.40 6.40 4.30 BSC 1 7 PIN 1 0.65 BSC 1.05 1.00 1M.A20X 0.20 0.80 0.09 0.75 0.15 8° 0.60 0.05 0.30 SPLEAATNIENG 0° 0.45 COPLANARITY 0.19 0.10 COMPLIANT TO JEDEC STANDARDS MO-153-AB-1 061908-A Figure 72. 14-Lead Thin Shrink Small Outline Package [TSSOP] (RU-14) Dimensions shown in millimeters Rev. F | Page 23 of 24

ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 Data Sheet ORDERING GUIDE Model1, 2 Temperature Range Package Description Package Option Branding ADA4891-1ARZ −40°C to +125°C 8-Lead SOIC_N R-8 ADA4891-1ARZ-RL −40°C to +125°C 8-Lead SOIC_N, 13” Tape and Reel R-8 ADA4891-1ARZ-R7 −40°C to +125°C 8-Lead SOIC_N, 7” Tape and Reel R-8 ADA4891-1ARJZ-R7 −40°C to +125°C 5-Lead SOT-23, 7” Tape and Reel RJ-5 H1W ADA4891-1ARJZ-RL −40°C to +125°C 5-Lead SOT-23, 13” Tape and Reel RJ-5 H1W ADA4891-1WARJZ-R7 −40°C to +125°C 5-Lead SOT-23, 7” Tape and Reel RJ-5 H2S ADA4891-2ARZ −40°C to +125°C 8-Lead SOIC_N R-8 ADA4891-2ARZ-RL −40°C to +125°C 8-Lead SOIC_N, 13” Tape and Reel R-8 ADA4891-2ARZ-R7 −40°C to +125°C 8-Lead SOIC_N, 7” Tape and Reel R-8 ADA4891-2ARMZ −40°C to +125°C 8-Lead MSOP RM-8 H1U ADA4891-2ARMZ-RL −40°C to +125°C 8-Lead MSOP, 13" Tape and Reel RM-8 H1U ADA4891-2ARMZ-R7 −40°C to +125°C 8-Lead MSOP, 7" Tape and Reel RM-8 H1U ADA4891-2WARMZ-R7 −40°C to +125°C 8-Lead MSOP, 7" Tape and Reel RM-8 H2T ADA4891-3ARUZ −40°C to +125°C 14-Lead TSSOP RU-14 ADA4891-3ARUZ-R7 −40°C to +125°C 14-Lead TSSOP, 7” Tape and Reel RU-14 ADA4891-3ARUZ-RL −40°C to +125°C 14-Lead TSSOP, 13” Tape and Reel RU-14 ADA4891-3WARUZ-R7 −40°C to +125°C 14-Lead TSSOP, 7” Tape and Reel RU-14 ADA4891-3ARZ −40°C to +125°C 14-Lead SOIC_N R-14 ADA4891-3ARZ-R7 −40°C to +125°C 14-Lead SOIC_N, 7” Tape and Reel R-14 ADA4891-3ARZ-RL −40°C to +125°C 14-Lead SOIC_N, 13” Tape and Reel R-14 ADA4891-4ARUZ −40°C to +125°C 14-Lead TSSOP RU-14 ADA4891-4ARUZ-R7 −40°C to +125°C 14-Lead TSSOP, 7” Tape and Reel RU-14 ADA4891-4ARUZ-RL −40°C to +125°C 14-Lead TSSOP, 13” Tape and Reel RU-14 ADA4891-4WARUZ-R7 −40°C to +125°C 14-Lead TSSOP, 7” Tape and Reel RU-14 ADA4891-4ARZ −40°C to +125°C 14-Lead SOIC_N R-14 ADA4891-4ARZ-R7 −40°C to +125°C 14-Lead SOIC_N, 7” Tape and Reel R-14 ADA4891-4ARZ-RL −40°C to +125°C 14-Lead SOIC_N, 13” Tape and Reel R-14 ADA4891-1AR-EBZ Evaluation Board for 8-Lead SOIC_N ADA4891-1ARJ-EBZ Evaluation Board for 5-Lead SOT-23 ADA4891-2AR-EBZ Evaluation Board for 8-Lead SOIC_N ADA4891-2ARM-EBZ Evaluation Board for 8-Lead MSOP ADA4891-3AR-EBZ Evaluation Board for 14-Lead SOIC_N ADA4891-3ARU-EBZ Evaluation Board for 14-Lead TSSOP ADA4891-4AR-EBZ Evaluation Board for 14-Lead SOIC_N ADA4891-4ARU-EBZ Evaluation Board for 14-Lead TSSOP 1 Z = RoHS Compliant Part. 2 W = Qualified for Automotive Applications. AUTOMOTIVE PRODUCTS The ADA4891-1W, ADA4891-2W, ADA4891-3W, and ADA4891-4W models are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. Note that these automotive models may have specifications that differ from the commercial models; therefore, designers should review the Specifications section of this data sheet carefully. Only the automotive grade products shown are available for use in automotive applications. Contact your local Analog Devices, Inc., account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models. ©2010–2015 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08054-0-9/15(F) Rev. F | Page 24 of 24

Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: A nalog Devices Inc.: ADA4891-3AR-EBZ ADA4891-1ARJZ-R7 ADA4891-1ARZ ADA4891-2ARMZ ADA4891-2ARZ ADA4891-3ARUZ ADA4891-4ARUZ ADA4891-4ARZ ADA4891-3ARUZ-R7 ADA4891-3ARUZ-RL ADA4891-3ARZ-R7 ADA4891-3ARZ- RL ADA4891-4ARUZ-R7 ADA4891-4ARUZ-RL ADA4891-4ARZ-R7 ADA4891-4ARZ-RL ADA4891-4WARUZ-R7 ADA4891-2ARZ-RL ADA4891-2ARMZ-RL ADA4891-2ARMZ-R7 ADA4891-1ARZ-R7 ADA4891-1ARJZ-RL ADA4891-3ARZ ADA4891-1ARZ-RL ADA4891-2ARZ-R7 ADA4891-1WARJZ-R7 ADA4891-2WARMZ-R7 ADA4891- 3WARUZ-R7