Low Noise, Precision CMOS Amplifier Data Sheet AD8655/AD8656 FEATURES PIN CONFIGURATIONS Low noise: 2.7 nV/√Hz at f = 10 kHz NC 1 8 NC OUT A 1 8 V+ Low offset voltage: 250 µV max over VCM –IN 2 AD8655 7 V+ –IN A 2 AD8656 7 OUT B OBRaaffinls-detwot v-irdoatlithla :i ng2pe8 u dMtr/iHoftzu: t0p.4u tµ V/°C typ and 2.3 µV/°C max +VIN– 34NC( N=T oNOtO Pto CV SOIEcNaWNleE)CT65 ONCUT 05304-048 +INV A– 34 (NToOt Pto V SIEcaWle) 65 –+IINN BB 05304-059 Unity gain stable Figure 1. AD8655 Figure 2. AD8656 2.7 V to 5.5 V operation 8-Lead MSOP (RM-8) 8-Lead MSOP (RM-8) −40°C to +125°C operation 8-Lead SOIC (R-8) 8-Lead SOIC (R-8) Qualified for automotive applications APPLICATIONS ADC and DAC buffers Audio Industrial controls Precision filters Digital scales Automotive collision avoidance PLL filters GENERAL DESCRIPTION The AD8655/AD8656 are the industry’s lowest noise, precision The high precision performance of the AD8655/AD8656 improves CMOS amplifiers. They leverage the Analog Devices DigiTrim® the resolution and dynamic range in low voltage applications. technology to achieve high dc accuracy. Audio applications, such as microphone pre-amps and audio mixing consoles, benefit from the low noise, low distortion, and The AD8655/AD8656 provide low noise (2.7 nV/√Hz at 10 kHz), high output current capability of the AD8655/AD8656 to reduce low THD + N (0.0007%), and high precision performance system level noise performance and maintain audio fidelity. The (250 µV max over V ) to low voltage applications. The ability CM high precision and rail-to-rail input and output of the AD8655/ to swing rail-to-rail at the input and output enables designers AD8656 benefit data acquisition, process controls, and PLL to buffer analog-to-digital converters (ADCs) and other wide filter applications. dynamic range devices in single-supply systems. The AD8655/AD8656 are fully specified over the −40°C to +125°C temperature range. The AD8655/AD8656 are available in Pb-free, 8-lead MSOP and SOIC packages. The AD8655/ AD8656 are both available for automotive applications. Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2005–2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com

AD8655/AD8656 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Input Overvoltage Protection ................................................... 16 Applications ....................................................................................... 1 Input Capacitance ...................................................................... 16 Pin Configurations ........................................................................... 1 Driving Capacitive Loads .......................................................... 16 General Description ......................................................................... 1 Layout, Grounding, and Bypassing Considerations .................. 18 Revision History ............................................................................... 2 Power Supply Bypassing ............................................................ 18 Specifications ..................................................................................... 3 Grounding ................................................................................... 18 Absolute Maximum Ratings ............................................................ 5 Leakage Currents ........................................................................ 18 ESD Caution .................................................................................. 5 Outline Dimensions ....................................................................... 19 Typical Performance Characteristics ............................................. 6 Ordering Guide ............................................................................... 19 Theory of Operation ...................................................................... 15 Automotive Products ................................................................. 19 Applications Information .............................................................. 16 REVISION HISTORY 10/13—Rev. D to Rev. E 6/05—Rev. 0 to Rev. A Changes to Figure 1 Caption and Figure 2 Caption .................... 1 Added AD8656 ................................................................... Universal Deleted Figure 3 and Figure 4; Renumbered Sequentially ......... 1 Added Figure 2 and Figure 4 ........................................................... 1 Change to General Description Section ........................................ 1 Changes to Specifications ................................................................. 3 Change to Figure 4 ........................................................................... 6 Changed Caption of Figure 12 and Added Figure 13 ................... 7 Change to Figure 32 ....................................................................... 10 Replaced Figure 16 ............................................................................ 7 Changes to Ordering Guide .......................................................... 19 Changed Caption of Figure 37 and Added Figure 38 ................ 11 Changes to Automotive Products Section ................................... 19 Replaced Figure 47 ......................................................................... 13 Added Figure 55 ............................................................................. 14 6/13—Rev. C to Rev. D Changes to Ordering Guide .......................................................... 18 Change to Figure 57 ....................................................................... 16 4/05—Revision 0: Initial Version 5/13—Rev. B to Rev. C Change to Figure 57 ....................................................................... 16 9/11—Rev. A to Rev. B Changes to Features Section............................................................ 1 Updated Outline Dimensions ....................................................... 19 Changes to Ordering Guide .......................................................... 19 Added Automotive Products Section .......................................... 19 Rev. E | Page 2 of 20

Data Sheet AD8655/AD8656 SPECIFICATIONS V = 5.0 V, V = V/2, T = 25°C, unless otherwise specified. S CM S A Table 1. Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage V V = 0 V to 5 V 50 250 µV OS CM −40°C ≤ T ≤ +125°C 550 µV A Offset Voltage Drift ΔV /ΔT −40°C ≤ T ≤ +125°C 0.4 2.3 µV/°C OS A Input Bias Current I 1 10 pA B −40°C ≤ T ≤ +125°C 500 pA A Input Offset Current I 10 pA OS −40°C ≤ T ≤ +125°C 500 pA A Input Voltage Range 0 5 V Common-Mode Rejection Ratio CMRR V = 0 V to 5 V 85 100 dB CM Large Signal Voltage Gain A V = 0.2 V to 4.8 V, R = 10 kΩ, V = 0 V 100 110 dB VO O L CM −40°C ≤ T ≤ +125°C 95 dB A OUTPUT CHARACTERISTICS Output Voltage High V I = 1 mA; −40°C ≤ T ≤ +125°C 4.97 4.991 V OH L A Output Voltage Low V I = 1 mA; −40°C ≤ T ≤ +125°C 8 30 mV OL L A Output Current I V = ±0.5 V ±220 mA OUT OUT POWER SUPPLY Power Supply Rejection Ratio PSRR V = 2.7 V to 5.0 V 88 105 dB S Supply Current/Amplifier I V = 0 V 3.7 4.5 mA SY O −40°C ≤ T ≤ +125°C 5.3 mA A INPUT CAPACITANCE C IN Differential 9.3 pF Common-Mode 16.7 pF NOISE PERFORMANCE Input Voltage Noise Density en f = 1 kHz 4 nV/√Hz f = 10 kHz 2.7 nV/√Hz Total Harmonic Distortion + Noise THD + N G = 1, R = 1 kΩ, f = 1 kHz, V = 2 V p-p 0.0007 % L IN FREQUENCY RESPONSE Gain Bandwidth Product GBP 28 MHz Slew Rate SR R = 10 kΩ 11 V/µs L Settling Time ts To 0.1%, V = 0 V to 2 V step, G = +1 370 ns IN Phase Margin C = 0 pF 69 degrees L Rev. E | Page 3 of 20

AD8655/AD8656 Data Sheet V = 2.7 V, V = V/2, T = 25°C, unless otherwise specified. S CM S A Table 2. Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage V V = 0 V to 2.7 V 44 250 µV OS CM −40°C ≤ T ≤ +125°C 550 µV A Offset Voltage Drift ΔV /ΔT −40°C ≤ T ≤ +125°C 0.4 2.0 µV/°C OS A Input Bias Current I 1 10 pA B −40°C ≤ T ≤ +125°C 500 pA A Input Offset Current I 10 pA OS −40°C ≤ T ≤ +125°C 500 pA A Input Voltage Range 0 2.7 V Common-Mode Rejection Ratio CMRR V = 0 V to 2.7 V 80 98 dB CM Large Signal Voltage Gain A V = 0.2 V to 2.5 V, R = 10 kΩ, V = 0 V 98 dB VO O L CM −40°C ≤ T ≤ +125°C 90 dB A OUTPUT CHARACTERISTICS Output Voltage High V I = 1 mA; −40°C ≤ T ≤ +125°C 2.67 2.688 V OH L A Output Voltage Low V I = 1 mA; −40°C ≤ T ≤ +125°C 10 30 mV OL L A Output Current I V = ±0.5 V ±75 mA OUT OUT POWER SUPPLY Power Supply Rejection Ratio PSRR V = 2.7 V to 5.0 V 88 105 dB S Supply Current/Amplifier I V = 0 V 3.7 4.5 mA SY O −40°C ≤ T ≤ +125°C 5.3 mA A INPUT CAPACITANCE C IN Differential 9.3 pF Common-Mode 16.7 pF NOISE PERFORMANCE Input Voltage Noise Density en f = 1 kHz 4.0 nV/√Hz f = 10 kHz 2.7 nV/√Hz Total Harmonic Distortion + Noise THD + N G = 1, R = 1kΩ, f = 1 kHz, V = 2 V p-p 0.0007 % L IN FREQUENCY RESPONSE Gain Bandwidth Product GBP 27 MHz Slew Rate SR R = 10 kΩ 8.5 V/µs L Settling Time ts To 0.1%, V = 0 to 1 V step, G = +1 370 ns IN Phase Margin C = 0 pF 54 degrees L Rev. E | Page 4 of 20

Data Sheet AD8655/AD8656 ABSOLUTE MAXIMUM RATINGS Table 4. Table 3. Package Type θ 1 θ Unit Parameter Rating JA JC 8-Lead MSOP (RM) 210 45 °C/W Supply Voltage 6 V 8-Lead SOIC (R) 158 43 °C/W Input Voltage VSS − 0.3 V to VDD + 0.3 V Differential Input Voltage ±6 V 1 θJA is specified for worst-case conditions; that is, θJA is specified for a device Output Short-Circuit Duration Indefinite soldered in the circuit board for surface-mount packages. to GND Electrostatic Discharge (HBM) 3.0 kV ESD CAUTION Storage Temperature Range −65°C to +150°C R, RM Packages Junction Temperature Range −65°C to +150°C R, RM Packages Lead Temperature 260°C (Soldering, 10 sec) Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. E | Page 5 of 20

AD8655/AD8656 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 60 20 VS =±2.5V VS =±2.5V 50 S 10 R E FI40 LI P M 0 A V) MBER OF 3200 µV (OS–10 U N 10 –20 0–150 –100 –50 0 50 100 150 05304-001 –30 05304-004 0 1 2 3 4 5 6 VOS (µV) COMMON-MODE VOLTAGE (V) Figure 3. Input Offset Voltage Distribution Figure 6. Input Offset Voltage vs. Common-Mode Voltage 250 250 200 VVSC M= =± 20.V5V VS =±2.5V 150 200 100 µV) 50 A)150 V (OS 0 IB (p –50 100 –100 –150 +3σ 50 ––220500 –T3YσPICAL 06304-004 0 05304-005 –50 –25 0 25 50 75 100 125 150 0 20 40 60 80 100 120 140 TEMPERATURE (°C) TEMPERATURE (°C) Figure 4. Input Offset Voltage vs. Temperature Figure 7. Input Bias Current vs. Temperature 60 4.0 VS =±2.5V VS =±2.5V 3.5 50 RS A)3.0 F AMPLIFIE4300 URRENT (m22..50 O C R Y MBE20 PPL1.5 U U N S1.0 10 0 05304-003 0.05 05304-006 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0 1 2 3 4 5 6 |TCVOS| (µV/°C) SUPPLY VOLTAGE (V) Figure 8. Supply Current vs. Supply Voltage Figure 5. |TCVOS | Distribution Rev. E | Page 6 of 20

Data Sheet AD8655/AD8656 4.5 4.996 VS =±2.5V VS =±2.5V 4.994 LOAD CURRENT = 1mA 4.0 A) 4.992 m T ( REN 3.5 V)4.990 Y CUR 3.0 V (OH4.988 L P P SU 4.986 2.5 4.984 2.0 05304-007 4.982 05304-009 –50 0 50 100 150 –50 0 50 100 150 TEMPERATURE (°C) TEMPERATURE (°C) Figure 9. Supply Current vs. Temperature Figure 12. Output Voltage Swing High vs. Temperature 2500 12 LOAD CURRENT = 1mA VS =±2.5V VS =±2.5V V) m2000 10 Y ( L P P U M S1500 V) 8 O m NG FR1000 VOH V (OL 6 WI A S VOL T EL 500 4 D 0 05304-008 2 05304-010 0 50 100 150 200 250 –50 0 50 100 150 CURRENT LOAD (mA) TEMPERATURE (°C) Figure 10. AD8655 Output Voltage to Supply Rail vs. Current Load Figure 13. Output Voltage Swing Low vs. Temperature 10000 120 VS =±2.5V VS =±2.5V VIN = 28mV mV) 100 RL = 1MΩ Y (1000 CL = 47pF L P P 80 U M S dB) RO 100 R (60 F R G M N C SWI 40 A LT 10 VOL E D 20 1 VOH 05304-056 0 05304-011 0.1 1 10 100 1000 100 1k 10k 100k 1M 10M CURRENT LOAD (mA) FREQUENCY (Hz) Figure 11. AD8656 Output Swing vs. Current Load Figure 14. CMRR vs. Frequency Rev. E | Page 7 of 20

AD8655/AD8656 Data Sheet 110.00 100 VVSC M= =± 20.V5V 2) VS =±2.5V 107.00 1/ Hz √V/ 104.00 Y (n MRR (dB)101.00 E DENSIT 10 C S OI 98.00 N E G A T L 95.00 O 92.00 05304-012 V 1 05304-019 –50 0 50 100 150 1 10 100 1k 10k 100k TEMPERATURE (°C) FREQUENCY (Hz) Figure 15. Large Signal CMRR vs. Temperature Figure 18. Voltage Noise Density vs. Frequency 100 +PSRR VVSIN == ±520.5mVV VVSn =(p±-p2).5 =V 1.23µV 80 RL = 1MΩ –PSRR CL = 47pF B) 60 DIV R (d nV/ 1 PSR 40 500 20 0 05304-013 05304-020 100 1k 10k 100k 1M 10M 100M 1s/DIV FREQUENCY (Hz) Figure 16. Small Signal PSSR vs. Frequency Figure 19. Low Frequency Noise (0.1 Hz to 10 Hz). 110.00 VS =±2.5V VIN T VCSL == ±520.p5FV GAIN = +1 108.00 VOUT RR (dB)106.00 1V/DIV 2 S P104.00 102.00 100.00 05304-014 20µs/DIV 05304-021 –50 0 50 100 150 TEMPERATURE (°C) Figure 17. Large Signal PSSR vs. Temperature Figure 20. No Phase Reversal Rev. E | Page 8 of 20

Data Sheet AD8655/AD8656 120 –45 6 VS =±2.5V VS =±2.5V 100 CLOAD = 11.5pF VIN = 5V PHASE MARGIN = 69° 5 G = +1 80 –90 s) e e 4 GAIN (dB)264000 –135SE SHIFT (Degr OUTPUT (V)3 A 2 H P 0 –180 1 ––240010k 100k 1M 10M 100M–225 05304-015 010k 100k 1M 10M05304-018 FREQUENCY (Hz) FREQUENCY (Hz) Figure 21. Open-Loop Gain and Phase vs. Frequency Figure 24. Maximum Output Swing vs. Frequency 140.00 T VRSL == ±120.k5ΩV VCGSLA I==N ±1 =20 .0+5p1VF 130.00 VIN = 4V V) (dB)VO120.00 (1V/DIUT 2 A O 110.00 V 100.00 90.00–50 0 50 100 15005304-016 TIME (10µs/DIV) 05304-022 TEMPERATURE (°C) Figure 22. Large Signal Open-Loop Gain vs. Temperature Figure 25. Large Signal Response 50 T VS =±2.5V VS =±2.5V 40 RL = 1MΩ CL = 100pF CL = 47pF G = +1 OP GAIN (dB) 3200 00mV/DIV) 2 O 1 D-L 10 (UT SE VO O L 0 C ––1200 05304-017 05304-023 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) TIME (1µs/DIV) Figure 23. Closed-Loop Gain vs. Frequency Figure 26. Small Signal Response Rev. E | Page 9 of 20

AD8655/AD8656 Data Sheet 30 100 VS =±2.5V VS =±2.5V 25 VIN = 200mV Ω) G = +100 G = +10 G = +1 %20 CE ( 10 OVERSHOOT 1150 –OS TPUT IMPEDAN 1 U O +OS 5 0 05304-024 0.1 05304-027 0 50 100 150 200 250 300 350 100 1k 10k 100k 1M 10M 100M CAPACITANCE (pF) FREQUENCY (Hz) Figure 27. Small Signal Overshoot vs. Load Capacitance Figure 30. Output Impedance vs. Frequency T 80 300mV VS =±1.35V VIN 70 0V 1 S60 R E FI LI50 P M 0V 2 F A40 O VOUT VS =±2.5V BER 30 VIN = 300mV M GAIN =–10 NU20 –2.5V RECOVERY TIME = 240ns 05304-025 100 05304-028 400ns/DIV –150–125–100–75 –50 –25 0 25 50 75 100 125 150 VOS (µV) Figure 28. Negative Overload Recovery Time Figure 31. Input Offset Voltage Distribution T 250 0V 1 VIN 200 VVCS M= =± 10.V35V VS =±2.5V 150 –300mV GVIAN I=N 3=0–01m0V 100 RECOVERY TIME = 240ns 50 V) 2.5V VOUT (µOS 0 V –50 –100 0V 2 –150 +3σ 05304-026 ––220500 –T3YσPICAL 06304-032 400ns/DIV –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) Figure 29. Positive Overload Recovery Time Figure 32. Input Offset Voltage vs. Temperature Rev. E | Page 10 of 20

Data Sheet AD8655/AD8656 80 10000 VS =±1.35V VS =±1.35V 70 V) m FIERS60 UPPLY (1000 PLI50 M S M O F A40 FR 100 O T R U NUMBE3200 TA OUTP 10 VOL L E D 100 05304-030 1 VOH 05304-057 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0.1 1 10 100 |TCVOS| (µV/°C) CURRENT LOAD (mA) Figure 33. |TCVOS| Distribution Figure 36. AD8656 Output Swing vs. Current Load 4.5 VS =±1.35V 2.698 VS =±1.35V LOAD CURRENT = 1mA 4.0 2.694 A) m T ( 2.690 EN 3.5 V) RR (H U O2.686 C V LY 3.0 P P 2.682 U S 2.5 2.678 2.0 05304-031 2.674 05304-032 –50 0 50 100 150 –50 0 50 100 150 TEMPERATURE (°C) TEMPERATURE (°C) Figure 34. Supply Current vs. Temperature Figure 37. Output Voltage Swing High vs. Temperature 1400 14 VS =±1.35V VLOS A=D± 1C.3U5RVRENT = 1mA 1200 12 1000 10 V) VOH m ) (T 800 mV) OU (L 8 V O -Y 600 V S V ( VOL 6 400 4 2000 05304-050 2 05304-033 0 20 40 60 80 100 120 –50 0 50 100 150 LOAD CURRENT (mA) TEMPERATURE (°C) Figure 35. AD8655 Output Voltage to Supply Rail vs. Load Current Figure 38. Output Voltage Swing Low vs. Temperature Rev. E | Page 11 of 20

AD8655/AD8656 Data Sheet T 35 VS =±1.35V G = +1 VS =±1.35V VIN CL = 50pF 30 VIN = 200mV –OS 25 VOUT % T V O20 1V/DI2 RSHO E15 V O +OS 10 05304-047 50 05304-044 20µs/DIV 0 50 100 150 200 250 300 350 CAPACITANCE (pF) Figure 39. No Phase Reversal Figure 42. Small Signal Overshoot vs. Load Capacitance T T VS =±1.35V CL = 50pF 200mV GAIN = +1 VIN 0V 1 V) DI V/ m 00 2 5 (T 0V 2 U O V VOUT –1.35V VS =±1.35V VIN = 200mV 05304-042 GREACINO =VE–1R0Y TIME = 180ns 05304-045 TIME (10µs/DIV) 400ns/DIV Figure 40. Large Signal Response Figure 43. Negative Overload Recovery Time T T VS =±1.35V CL = 100pF 0V 1 GAIN = +1 VIN –200mV VS =±1.35V VIN = 200mV V) GAIN =–10 DI RECOVERY TIME = 200ns V/ m 0 2 0 1 (T 1.35V U O V VOUT 0V 2 05304-043 05304-046 TIME (1µs/DIV) 400ns/DIV Figure 41. Small Signal Response Figure 44. Positive Overload Recovery Time Rev. E | Page 12 of 20

Data Sheet AD8655/AD8656 120 120 –45 VS =±1.35V VS =±1.35V VIN = 28mV 100 CLOAD = 11.5pF 100 RL = 1MΩ PHASE MARGIN = 54° CL = 47pF 80 –90 s) e 80 e 60 gr B) B) De R (d60 N (d 40 –135 FT ( CMR GAI 20 SE SHI 40 A H 0 –180 P 20 0100 1k 10k 100k 1M05304-034 ––240010k 100k 1M 10M 100M–225 05304-036 FREQUENCY (Hz) FREQUENCY (Hz) Figure 45. CMRR vs. Frequency Figure 48. Open-Loop Gain and Phase vs. Frequency 102.00 130.00 VS =±1.35V VS =±1.35V RL = 10kΩ 120.00 98.00 dB) B)110.00 CMRR (94.00 A (dVO100.00 90.00 90.00 86.00 05304-035 80.00 05304-037 –50 0 50 100 150 –50 0 50 100 150 TEMPERATURE (°C) TEMPERATURE (°C) Figure 46. Large Signal CMRR vs. Temperature Figure 49. Large Signal Open-Loop Gain vs. Temperature 100 50 VS =±1.35V VS =±1.35V 80 –PSRR +PSRR VRCILLN === 4157M0pmΩFV dB) 4300 CRLL == 14M7pΩF N ( B) 60 GAI 20 R (d OP R O PS 40 D-L 10 E S O L 0 C 20 0 05304-040 ––1200 05304-038 100 1k 10k 100k 1M 10M 100M 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) Figure 47. Small Signal PSSR vs. Frequency Figure 50. Closed-Loop Gain vs. Frequency Rev. E | Page 13 of 20

AD8655/AD8656 Data Sheet 3.0 0 22..50 VVGSI N= = =+ 112..375VV ON (dB) ––4200 50mV pV-IpN –+ +–A22..55VVVV–+ VOUTVV–+1B0Rk1Ω10R02Ω VVSIN == ±520.5mVV OUTPUT (V)1.5 NO LOAD L SEPERATI ––6800 E 1.0 NN A–100 H C 0.5 0 05304-039 ––114200 05304-058 10k 100k 1M 10M 10 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) Figure 51. Maximum Output Swing vs. Frequency Figure 53. Channel Separation vs. Frequency 1000 VS =±1.35V Ω) 100 E ( C N A G = +100 D G = +10 PE 10 G = +1 M T I U P T U O 1 0.1 05304-041 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) Figure 52. Output Impedance vs. Frequency Rev. E | Page 14 of 20

Data Sheet AD8655/AD8656 THEORY OF OPERATION The AD8655/AD8656 amplifiers are voltage feedback, rail-to-rail The AD8655/AD8656 can be used in any precision op amp input and output precision CMOS amplifiers, which operate application. The amplifier does not exhibit phase reversal for from 2.7 V to 5.0 V of power supply voltage. These amplifiers common-mode voltages within the power supply. The AD8655/ use the Analog Devices DigiTrim technology to achieve a higher AD8656 are great choices for high resolution data acquisition degree of precision than is available from most CMOS amplifiers. systems with voltage noise of 2.7 nV/√Hz and THD + Noise of DigiTrim technology, used in a number of Analog Devices –103 dB for a 2 V p-p signal at 10 kHz. Their low noise, sub-pA amplifiers, is a method of trimming the offset voltage of the input bias current, precision offset, and high speed make them amplifier after it is packaged. The advantage of post-package superb preamps for fast filter applications. The speed and output trimming is that it corrects any offset voltages caused by the drive capability of the AD8655/AD8656 also make them useful mechanical stresses of assembly. in video applications. The AD8655/AD8656 are available in standard op amp pinouts, making DigiTrim completely transparent to the user. The input stage of the amplifiers is a true rail-to-rail architecture, allowing the input common-mode voltage range of the amplifiers to extend to both positive and negative supply rails. The open- loop gain of the AD8655/AD8656 with a load of 10 kΩ is typically 110 dB. Rev. E | Page 15 of 20

AD8655/AD8656 Data Sheet APPLICATIONS INFORMATION INPUT OVERVOLTAGE PROTECTION One simple technique for compensation is a snubber that consists of a simple RC network. With this circuit in place, The internal protective circuitry of the AD8655/AD8656 allows output swing is maintained, and the amplifier is stable at all voltages exceeding the supply to be applied at the input. It is gains. Figure 55 shows the implementation of a snubber, which recommended, however, not to apply voltages that exceed the reduces overshoot by more than 30% and eliminates ringing. supplies by more than 0.3 V at either input of the amplifier. If a Using a snubber does not recover the loss of bandwidth higher input voltage is applied, series resistors should be used to incurred from a heavy capacitive load. limit the current flowing into the inputs. The input current should be limited to less than 5 mA. VS =±2.5V AV = 1 The extremely low input bias current allows the use of larger CL = 500pF resistors, which allows the user to apply higher voltages at the V) inputs. The use of these resistors adds thermal noise, which DI V/ contributes to the overall output voltage noise of the amplifier. 0m 0 For example, a 10 kΩ resistor has less than 12.6 nV/√Hz of E (1 G thermal noise and less than 10 nV of error voltage at room A T L temperature. O V INPUT CAPACITANCE Along with bypassing and ground, high speed amplifiers can be sFeonrs citirivceu ittos wpaitrha srietsicis ctiavpea fceietdanbcaeck b netewtweeonrk t,h teh ein tpoutatls caanpda cgirtaonucned, . TIME (2µs/DIV) 05304-051 whether it is the source capacitance, stray capacitance on the Figure 54. Driving Heavy Capacitive Loads Without Compensation input pin, or the input capacitance of the amplifier, causes a breakpoint in the noise gain of the circuit. As a result, a VCC capacitor must be added in parallel with the gain resistor to –IN obtain stability. The noise gain is a function of frequency and – peaks at the higher frequencies, assuming the feedback capaci- +IN + tor is selected to make the second-order system critically damped. 200Ω 500pF Aim fpeewd paniccoef aart ahdisg ho ff rceaqpuaecnitcainecse, wath tihche iinnpcureta rseedsu tchee tahme pinlipfiuetr ’s +– 200mV VEE 500pF 05304-052 gain, causing peaking in the frequency response or oscillations. Figure 55. Snubber Network With the AD8655/AD8656, additional input damping is required for stability with capacitive loads greater than 200 pF with VS =±2.5V direct input to output feedback. See the Driving Capacitive AV = 1 RS = 200Ω Loads section. CS = 500pF V) CL = 500pF DRIVING CAPACITIVE LOADS DI V/ m Although the AD8655/AD8656 can drive capacitive loads up to 0 0 1 500 pF without oscillating, a large amount of ringing is present E ( G when operating the part with input frequencies above 100 kHz. TA L This is especially true when the amplifiers are configured in VO positive unity gain (worst case). When such large capacitive loads are required, the use of external compensation is highly recommended. This reduces the overshoot and minimizes ringing, which, in turn, improves the stability of the AD8655/ TIME (10µs/DIV) 05304-053 AD8656 when driving large capacitive loads. Figure 56. Driving Heavy Capacitive Loads Using a Snubber Network Rev. E | Page 16 of 20

Data Sheet AD8655/AD8656 THD Readings vs. Common-Mode Voltage 1.0 0.5 SWEEP 1: SWEEP 2: Total harmonic distortion of the AD8655/AD8656 is well below VIN = 2V p-p VIN = 2V p-p 0.0007% with a load of 1 kΩ. This distortion is a function of the 0.2 RL = 10kΩ RL = 1kΩ 0.1 circuit configuration, the voltage applied, and the layout, in 0.05 addition to other factors. 0.02 +2.5V % 0.01 0.005 – VOUT AD8655 0.002 0.001 + RL SWEEP 2 0.0005 VIN –2.5V 05304-054 00..00000012 SWEEP 1 05304-055 20 50 100 200 500 1k 2k 5k 10k 20k 50k 80k Figure 57. THD + N Test Circuit Hz Figure 58. THD + Noise vs. Frequency Rev. E | Page 17 of 20

AD8655/AD8656 Data Sheet LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS POWER SUPPLY BYPASSING LEAKAGE CURRENTS Power supply pins can act as inputs for noise, so care must be Poor PC board layout, contaminants, and the board insulator taken to apply a noise-free, stable dc voltage. The purpose of material can create leakage currents that are much larger than bypass capacitors is to create low impedances from the supply the input bias current of the AD8655/AD8656. Any voltage to ground at all frequencies, thereby shunting or filtering most differential between the inputs and nearby traces creates leakage of the noise. Bypassing schemes are designed to minimize the currents through the PC board insulator, for example, 1 V/100 supply impedance at all frequencies with a parallel combination GΩ = 10 pA. Similarly, any contaminants on the board can create significant leakage (skin oils are a common problem). of capacitors with values of 0.1 µF and 4.7 µF. Chip capacitors of 0.1 µF (X7R or NPO) are critical and should be as close as To significantly reduce leakage, put a guard ring (shield) around possible to the amplifier package. The 4.7 µF tantalum capacitor the inputs and input leads that are driven to the same voltage is less critical for high frequency bypassing, and, in most cases, potential as the inputs. This ensures there is no voltage potential only one is needed per board at the supply inputs. between the inputs and the surrounding area to create any GROUNDING leakage currents. To be effective, the guard ring must be driven by a relatively low impedance source and should completely A ground plane layer is important for densely packed PC surround the input leads on all sides, above and below, by using boards to minimize parasitic inductances. This minimizes a multilayer board. voltage drops with changes in current. However, an under- The charge absorption of the insulator material itself can also standing of where the current flows in a circuit is critical to cause leakage currents. Minimizing the amount of material implementing effective high speed circuit design. The length between the input leads and the guard ring helps to reduce the of the current path is directly proportional to the magnitude absorption. Also, using low absorption materials, such as of parasitic inductances, and, therefore, the high frequency Teflon® or ceramic, may be necessary in some instances. impedance of the path. Large changes in currents in an inductive ground return create unwanted voltage noise. The length of the high frequency bypass capacitor leads is critical, and, therefore, surface-mount capacitors are recom- mended. A parasitic inductance in the bypass ground trace works against the low impedance created by the bypass capacitor. Because load currents flow from the supplies, the ground for the load impedance should be at the same physical location as the bypass capacitor grounds. For larger value capacitors intended to be effective at lower frequencies, the current return path distance is less critical. Rev. E | Page 18 of 20

Data Sheet AD8655/AD8656 OUTLINE DIMENSIONS 5.00(0.1968) 3.20 4.80(0.1890) 3.00 2.80 8 5 4.00(0.1574) 6.20(0.2441) 8 5 5.15 3.80(0.1497) 1 4 5.80(0.2284) 3.20 4.90 3.00 4.65 2.80 1 4 1.27(0.0500) 0.50(0.0196) BSC 1.75(0.0688) 0.25(0.0099) 45° PIN1 IDENTIFIER 0.25(0.0098) 1.35(0.0532) 8° 0.10(0.0040) 0° 0.65BSC COPL0A.1N0ARITSYEATING 00..5311((00..00210212)) 0.25(0.0098) 10..2470((00..00510507)) 00..9855 1.10MAX 15°MAX PLANE 0.17(0.0067) 0.75 0.80 COMPLIANTTOJEDECSTANDARDSMS-012-AA 0.15 0.40 6° 0.23 0.55 C(RINEOFNPEATRRREOENNLCLTEIHNEOGSNDELISYM)AEANNRDSEIAORRNOESUNANORDETEDAIN-POMPFRIFLOLMPIMIRLELIATIMTEEERTFSEO;RIRNECUQHSUEDIVIINMAELDENENSSTIIOGSNNFS.OR 012407-A CO0P.0L50A.1N0ARICTOYMPLIANT0.T25OJEDECSTA0°NDARDS0M.0O9-187-AA 0.40 10-07-2009-B Figure 59. 8-Lead Standard Small Outline Package [SOIC_N] Figure 60. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Narrow Body (R-8) Dimensions shown in millimeters and (inches) Dimensions shown in millimeters ORDERING GUIDE Model1, 2 Temperature Range Package Description Package Option Branding AD8655ARZ −40°C to +125°C 8-Lead SOIC_N R-8 AD8655ARZ-REEL −40°C to +125°C 8-Lead SOIC_N R-8 AD8655ARZ-REEL7 −40°C to +125°C 8-Lead SOIC_N R-8 AD8655ARMZ-REEL −40°C to +125°C 8-Lead MSOP RM-8 A0D AD8655ARMZ −40°C to +125°C 8-Lead MSOP RM-8 A0D AD8655WARMZ-RL −40°C to +125°C 8-Lead MSOP RM-8 A0D AD8656ARZ −40°C to +125°C 8-Lead SOIC_N R-8 AD8656ARZ-REEL −40°C to +125°C 8-Lead SOIC_N R-8 AD8656ARZ-REEL7 −40°C to +125°C 8-Lead SOIC_N R-8 AD8656ARMZ −40°C to +125°C 8-Lead MSOP RM-8 A0S AD8656ARMZ-REEL −40°C to +125°C 8-Lead MSOP RM-8 A0S AD8656WARMZ-REEL −40°C to +125°C 8-Lead MSOP RM-8 A0S 1 Z = RoHS Compliant Part. 2 W = Qualified for Automotive Applications. AUTOMOTIVE PRODUCTS The AD8655W model and the AD8656W model are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. Note that these automotive models may have specifications that differ from the commercial models; therefore, designers should review the Specifications section of this data sheet carefully. Only the automotive grade products shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for this model. Rev. E | Page 19 of 20

AD8655/AD8656 Data Sheet NOTES ©2005–2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05304-0-10/13(E) Rev. E | Page 20 of 20

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