a (cid:1) 1 GHz, 5,500 V/ s Low Distortion Amplifier AD8009 FEATURES FUNCTIONAL BLOCK DIAGRAMS Ultrahigh Speed 8-Lead Plastic SOIC (R-8) 5-Lead SOT-23 (RT-5) 5,500 V/(cid:1)s Slew Rate, 4 V Step, G = +2 545 ps Rise Time, 2 V Step, G = +2 NC 1 AD8009 8 NC AD8009 La4rg40e MSiHgnz,a Gl B =a n+d2width –IN 2 7 +VS VOUT 1 5 +VS 320 MHz, G = +10 +IN 3 6 OUT –VS 2 Small Signal Bandwidth (–3 dB) –VS 4 5 NC +IN 3 4 –IN 1 GHz, G = +1 NC = NO CONNECT 700 MHz, G = +2 Settling Time 10 ns to 0.1%, 2 V Step, G = +2 PRODUCT DESCRIPTION Low Distortion over Wide Bandwidth The AD8009 is an ultrahigh speed current feedback amplifier SFDR with a phenomenal 5,500 V/µs slew rate that results in a rise –66 dBc @ 20 MHz, Second Harmonic time of 545 ps, making it ideal as a pulse amplifier. –75 dBc @ 20 MHz, Third Harmonic The high slew rate reduces the effect of slew rate limiting and Third Order Intercept (3IP) results in the large signal bandwidth of 440 MHz required for 26 dBm @ 70 MHz, G = +10 high resolution video graphic systems. Signal quality is main- Good Video Specifications tained over a wide bandwidth with worst-case distortion of Gain Flatness 0.1 dB to 75 MHz –40dBc @ 250 MHz (G = +10, 1 V p-p). For applications with 0.01% Differential Gain Error, R = 150 (cid:2) L multitone signals, such as IF signal chains, the third order 0.01(cid:3) Differential Phase Error, R = 150 (cid:2) L intercept (3IP) of 12 dBm is achieved at the same frequency. This High Output Drive distortion performance coupled with the current feedback 175 mA Output Load Drive architecture make the AD8009 a flexible component for a gain 10 dBm with –38 dBc SFDR @ 70 MHz, G = +10 stage amplifier in IF/RF signal chains. Supply Operation +5 V to (cid:4)5 V Voltage Supply The AD8009 is capable of delivering over 175 mA of load current 14 mA (Typ) Supply Current and will drive four back terminated video loads while maintaining low differential gain and phase error of 0.02% and 0.04°, APPLICATIONS respectively. The high drive capability is also reflected in the Pulse Amplifier ability to deliver 10 dBm of output power @ 70 MHz with IF/RF Gain Stage/Amplifiers –38dBc SFDR. High Resolution Video Graphics High Speed Instrumentations The AD8009 is available in a small SOIC package and will CCD Imaging Amplifier operate over the industrial temperature range –40°C to +85°C. The AD8009 is also available in an SOT-23-5 and will operate 2 over the commercial temperature range of 0°C to 70°C. G = +2 1 RF = 301(cid:2) RL = 150(cid:2) 0 –30 G = 2 B) –1 RF = 301(cid:2) ZED GAIN (d ––23 VO = 2V p-p GRRFL = == + 21100000(cid:2)(cid:2) Bc) ––4500 VO = 2V p-p 100S(cid:2)E CLOOANDD ORMALI ––45 TION (d–60 150S(cid:2)E CLOOANDD N R O–70 –6 ST DI THIRD –7 –80 100(cid:2) LOAD –8 1 10 100 1000 –90 THIRD FREQUENCY RESPONSE (MHz) 150(cid:2) LOAD Figure 1.Large Signal Frequency Response; G = +2 and +10 –100 1 10 70 REV.F FREQUENCY RESPONSE (MHz) Figure 2.Distortion vs. Frequency; G = +2 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. under any patent or patent rights of Analog Devices. Trademarks and Tel: 781/329-4700 www.analog.com registered trademarks are the property of their respective owners. Fax: 781/326-8703 © 2004 Analog Devices, Inc. All rights reserved.

IMPORTANT LINKS for the AD8009* Last content update 08/17/2013 12:33 pm PARAMETRIC SELECTION TABLES DESIGN COLLABORATION COMMUNITY Find Similar Products By Operating Parameters High Speed Amplifiers Selection Table Collaborate Online with the ADI support team and other designers about select ADI products. Follow us on Twitter: www.twitter.com/ADI_News DOCUMENTATION Like us on Facebook: www.facebook.com/AnalogDevicesInc AN-692: Universal Precision Op Amp Evaluation Board AN-649: Using the Analog Devices Active Filter Design Tool AN-214: Ground Rules for High Speed Circuits AN-356: User’s Guide to Applying and Measuring Operational Amplifier Specifications DESIGN SUPPORT MT-057: High Speed Current Feedback Op Amps Submit your support request here: MT-051: Current Feedback Op Amp Noise Considerations Linear and Data Converters Embedded Processing and DSP MT-034: Current Feedback (CFB) Op Amps MT-059: Compensating for the Effects of Input Capacitance on VFB Telephone our Customer Interaction Centers toll free: and CFB Op Amps Used in Current-to-Voltage Converters Americas: 1-800-262-5643 Europe: 00800-266-822-82 A Stress-Free Method for Choosing High-Speed Op Amps China: 4006-100-006 UG-127: Universal Evaluation Board for High Speed Op Amps in India: 1800-419-0108 SOT-23-5/SOT-23-6 Packages Russia: 8-800-555-45-90 UG-101: Evaluation Board User Guide Quality and Reliability Lead(Pb)-Free Data Two-Stage Current-Feedback Amplifier (Analog Dialogue, Vol. 29, No. 2, 1995) Current Feedback Amplifiers Part 1: Ask The Applications Engineer-22 (Analog Dialogue, Vol. 30, No. 3, 1996) Current Feedback Amplifiers Part 2: Ask The Applications Engineer-23 SAMPLE & BUY (Analog Dialogue, Vol. 30, No. 4, 1996) AD8009 View Price & Packaging Request Evaluation Board Request Samples Check Inventory & Purchase DESIGN TOOLS, MODELS, DRIVERS & SOFTWARE Analog Filter Wizard 2.0 Find Local Distributors AD8009 SPICE Macro-Model Rev B SMR/ADI, 8/97 EVALUATION KITS & SYMBOLS & FOOTPRINTS View the Evaluation Boards and Kits page for documentation and purchasing Symbols and Footprints * This page was dynamically generated by Analo g Devices, Inc. and inserted into this data sheet. Note: Dynamic changes to the content on this page (labeled 'Important Links') does not constitute a change to the revision number of the product data sheet. This content may be frequently modified. Powered by TCPDF (www.tcpdf.org)

AD8009–SPECIFICATIONS (@ T = 25(cid:3)C, V = (cid:4)5 V, R = 100 (cid:2); for R Package: R = 301 (cid:2) for G = +1, +2, A S L F R = 200 (cid:2) for G = +10; for RT Package: R = 332 (cid:2) for G = +1, R = 226 (cid:2) for G = +2 and R = 191(cid:2) for G = +10, unless otherwise noted.) F F F F AD8009AR/JRT Model Conditions Min Typ Max Unit DYNAMIC PERFORMANCE –3 dB Small Signal Bandwidth, V = 0.2 V p-p O R Package G = +1, R = 301 Ω 1,000 MHz F RT Package G = +1, R = 332 Ω 845 MHz F G = +2 480 700 MHz G = +10 300 350 MHz Large Signal Bandwidth, V = 2 V p-p G = +2 390 440 MHz O G = +10 235 320 MHz Gain Flatness 0.1 dB, V = 0.2 V p-p G = +2, R = 150 Ω 45 75 MHz O L Slew Rate G = +2, R = 150 Ω, 4 V Step 4,500 5,500 V/µs L Settling Time to 0.1% G = +2, R = 150 Ω, 2 V Step 10 ns L G = +10, 2 V Step 25 ns Rise and Fall Time G = +2, R = 150 Ω, 4 V Step 0.725 ns L HARMONIC/NOISE PERFORMANCE Second Harmonic G = +2, V = 2 V p-p 10 MHz –73 dBc O 20 MHz –66 dBc 70 MHz –56 dBc Third Harmonic 10 MHz –77 dBc 20 MHz –75 dBc 70 MHz –58 dBc Third Order Intercept (3IP) 70 MHz 26 dBm W.R.T. Output, G = +10 150 MHz 18 dBm 250 MHz 12 dBm Input Voltage Noise f = 10 MHz 1.9 nV/√Hz Input Current Noise f = 10 MHz, +In 46 pA/√Hz f = 10 MHz, –In 41 pA/√Hz Differential Gain Error NTSC, G = +2, R = 150 Ω 0.01 0.03 % L NTSC, G = +2, R = 37.5 Ω 0.02 0.05 % L Differential Phase Error NTSC, G = +2, R = 150 Ω 0.01 0.03 Degrees L NTSC, G = +2, R = 37.5 Ω 0.04 0.08 Degrees L DC PERFORMANCE Input Offset Voltage 2 5 mV T to T 7 mV MIN MAX Offset Voltage Drift 4 µV/°C –Input Bias Current 50 150 ±µA T to T 75 ±µA MIN MAX +Input Bias Voltage 50 150 ±µA T to T 75 ±µA MIN MAX Open-Loop Transresistance 90 250 kΩ T to T 170 kΩ MIN MAX INPUT CHARACTERISTICS Input Resistance +Input 110 kΩ –Input 8 Ω Input Capacitance +Input 2.6 pF Input Common-Mode Voltage Range 3.8 ±V Common-Mode Rejection Ratio V = ±2.5 50 52 dB CM OUTPUT CHARACTERISTICS Output Voltage Swing ±3.7 ±3.8 V Output Current R = 10 Ω, P Package = 0.7 W 150 175 mA L D Short-Circuit Current 330 mA POWER SUPPLY Operating Range +5 ±6 V Quiescent Current 14 16 mA T to T 18 mA MIN MAX Power Supply Rejection Ratio V = ±4 V to ±6 V 64 70 dB S Specifications subject to change without notice. –2– REV. F

AD8009 SPECIFICATIONS (@ T = 25(cid:3)C, V = (cid:5)5 V, R = 100 (cid:2), for R Package: R = 301 (cid:2) for G = +1, +2, A S L F R = 200 (cid:2) for G = +10). F AD8009AR/JRT Model Conditions Min Typ Max Unit DYNAMIC PERFORMANCE –3 dB Small Signal Bandwidth, V = 0.2 V p-p O G = +1, R = 301 Ω 630 MHz F G = +2 430 MHz G = +10 300 MHz Large Signal Bandwidth, V = 2 V p-p G = +2 365 MHz O G = +10 250 MHz Gain Flatness 0.1 dB, V = 0.2 V p-p G = +2, R = 150 Ω 65 MHz O L Slew Rate G = +2, R = 150 Ω, 4 V Step 2,100 V/µs L Settling Time to 0.1% G = +2, R = 150 Ω, 2 V Step 10 ns L G = +10, 2 V Step 25 ns Rise and Fall Time G = +2, R = 150 Ω, 4 V Step 0.725 ns L HARMONIC/NOISE PERFORMANCE Second Harmonic G = +2, V = 2 V p-p 10 MHz –74 dBc O 20 MHz –67 dBc 70 MHz –48 dBc Third Harmonic 10 MHz –76 dBc 20 MHz –72 dBc 70 MHz –44 dBc Input Voltage Noise f = 10 MHz 1.9 nV/√Hz Input Current Noise f = 10 MHz, +In 46 pA/√Hz f = 10 MHz, –In 41 pA/√Hz DC PERFORMANCE Input Offset Voltage 1 4 mV –Input Bias Current 50 150 ±µA +Input Bias Voltage 50 150 ±µA INPUT CHARACTERISTICS Input Resistance +Input 110 kΩ –Input 8 Ω Input Capacitance +Input 2.6 pF Input Common-Mode Voltage Range 1.2 to 3.8 V Common-Mode Rejection Ratio V = 1.5 V to 3.5 V 50 52 dB CM OUTPUT CHARACTERISTICS Output Voltage Swing 1.1 to 3.9 V Output Current R = 10 Ω, P Package = 0.7 W 175 mA L D Short-Circuit Current 330 mA POWER SUPPLY Operating Range +5 ±6 V Quiescent Current 10 12 mA Power Supply Rejection Ratio V = 4.5 V to 5.5 V 64 70 dB S Specifications subject to change without notice. REV. F –3–

AD8009 ABSOLUTE MAXIMUM RATINGS1 MAXIMUM POWER DISSIPATION Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6 V The maximum power that can be safely dissipated by the AD8009 Internal Power Dissipation2 is limited by the associated rise in junction temperature. The maxi- Small Outline Package (R) . . . . . . . . . . . . . . . . . . . . . . .0.75 W mum safe junction temperature for plastic encapsulated devices Input Voltage (Common-Mode) . . . . . . . . . . . . . . . . . . . . ±V is determined by the glass transition temperature of the plastic, S Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . .±3.5 V approximately 150°C. Exceeding this limit temporarily may cause Output Short-Circuit Duration a shift in parametric performance due to a change in the stresses . . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves exerted on the die by the package. Exceeding a junction tempera- Storage Temperature Range R Package . . . . –65°C to +125°C ture of 175°C for an extended period can result in device failure. Operating Temperature Range (A Grade) . . . –40°C to +85°C While the AD8009 is internally short circuit protected, this may Operating Temperature Range (J Grade) . . . . . . . 0°C to 70°C not be sufficient to guarantee that the maximum junction tempera- Lead Temperature Range (Soldering 10 sec) . . . . . . . . . 300°C ture (150°C) is not exceeded under all conditions. To ensure NOTES proper operation, it is necessary to observe the maximum power 1Stresses above those listed under Absolute Maximum Ratings may cause perma- derating curves. nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating 2.0 conditions for extended periods may affect device reliability. TJ = 150C 2Specification is for device in free air: 8-Lead SOIC Package: θ = 155°C/W. W) 5-Lead SOT-23 Package:J Aθ = 240°C/W. N (1.5 JA O TI A P 8-LEAD SOIC PACKAGE SI S DI1.0 R E W O P M U0.5 M AXI 5-LEAD SOT-23 PACKAGE M 0 –50–40–30–20 –10 0 10 20 30 40 50 60 70 80 90 AMBIENT TEMPERATURE ((cid:1)C) Figure 3.Plot of Maximum Power Dissipation vs. Temperature ORDERING GUIDE Temperature Package Package Model Range Description Option Branding AD8009AR –40°C to +85°C 8-Lead SOIC R-8 AD8009AR-REEL –40°C to +85°C 8-Lead SOIC R-8 AD8009AR-REEL7 –40°C to +85°C 8-Lead SOIC R-8 AD8009ARZ* –40°C to +85°C 8-Lead SOIC R-8 AD8009ARZ-REEL* –40°C to +85°C 8-Lead SOIC R-8 AD8009ARZ-REEL7* –40°C to +85°C 8-Lead SOIC R-8 AD8009JRT-R2 0°C to 70°C 5-Lead SOT-23 RT-5 HKJ AD8009JRT-REEL 0°C to 70°C 5-Lead SOT-23 RT-5 HKJ AD8009JRT-REEL7 0°C to 70°C 5-Lead SOT-23 RT-5 HKJ AD8009JRTZ-REEL* 0°C to 70°C 5-Lead SOT-23 RT-5 HKJ AD8009JRTZ-REEL7* 0°C to 70°C 5-Lead SOT-23 RT-5 HKJ AD8009ACHIPS Die *Z = Pb-free part. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8009 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. –4– REV. F

Typical Performance Characteristics–AD8009 3 6.2 2 6.1 G = +1, RT G = +1, R 1 6.0 NORMALIZED GAIN (dB) ––––12340 RGGRGRVO TL P=== ==P A+++ A1C21110C0:,0K 00:+RKA (cid:1)m2RFAG: FV G=ER = Ep:3F – 23:=p02 (cid:1)03(cid:1)01(cid:1) GG = = + +21, 0R, ARN ADN RDT RT GAIN FLATNESS (dB) 55555.....98765 GRVROFL = === + 3122050100(cid:1)(cid:1)mV p-p –5 G = +2: RF = 226(cid:1) 5.4 G = +10: RF = 191(cid:1) –6 5.3 5.2 –7 1 10 100 1000 1 10 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) TPC 1.Frequency Response; G = +1, +2, +10, TPC 4.Gain Flatness; G = +2 Rand RT Packages 8 0.4 G = +2 76 0.3 RRFL == 310510(cid:1)(cid:1) VO = 200mV p-p 5 0.2 VS = 5V GAIN (dB) 432 GRVROFL = =A =+ S 1235 0S01H(cid:1)(cid:1)OWN 4V p2-pV p-p TNESS (dB) 0.01 A L 1 AIN F–0.1 0 G –1 –0.2 –2 1 10 100 1000 –0.3 1 10 100 1000 10000 FREQUENCY (MHz) FREQUENCY (MHz) TPC 2.Large Signal Frequency Response; G = +2 TPC 5.Gain Flatness; G = +2; V = 5 V S 8 22 7 21 +85(cid:2)C 6 20 –40(cid:2)C 5 –40(cid:2)C 19 G = +10 2V p-p GAIN (dB) 432 GRVROFL = == =+ 12235V00 1p(cid:1)(cid:1)–p +85(cid:2)C GAIN (dB) 111876 RRVOFL =A= S 120 0S00H(cid:1)(cid:1)OWN 4V p-p 1 15 0 14 –1 13 –2 12 1 10 100 1000 1 10 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) TPC 3.Large Signal Frequency Response vs. TPC 6.Large Signal Frequency Response; G = +10 Temperature; G = +2 REV. F –5–

AD8009 22 –35 21 –40 250MHz 20 –45 70MHz –50 19 AIN (dB)1187 G RRVOFL = === + 212100V000 p(cid:1)(cid:1)-p +85(cid:2)C –40(cid:2)C ORTION (dBc)–––656550 5MHz G16 ST 200(cid:1) 15 DI–70 22.1(cid:1) 50(cid:1) –75 POUT 14 50(cid:1) 50(cid:1) –80 13 –85 12 –10 –8 –6 –4 –2 0 2 4 6 8 10 12 14 1 10 100 1000 FREQUENCY (MHz) POUT (dBm) TPC 7.Large Signal Frequency Response vs. TPC 10.Second Harmonic Distortion vs. P ; (G = +10) OUT Temperature; G = +10 –30 0.02 G = +2 TION (dBc) –––456000 GRVFO = == 2 320V1 p(cid:1)-1p50S(cid:1)E CLOONADD,10S0(cid:1)EC LOONADD, DIFF GAIN (%) ––0000....00001201 0 RF = 301(cid:1) IRERL = 37.5(cid:1) RL = 1501(cid:1)00 R DISTO––8700 T10H0IR(cid:1)D L,OAD egrees) 00..1005 GRF = = + 3201(cid:1) RL = 37.5(cid:1) D –90 T15H0IR(cid:1)D L,OAD PHASE ( ––00..0005 RL = 150(cid:1) F –1001 10 70 DIF –0.10 0 100 FREQUENCY RESPONSE (MHz) IRE TPC 8.Distortion vs. Frequency; G = +2 TPC 11.Differential Gain and Phase –20 –30 G = +2 –35 G = +10 –30 RVRVOSFL ==== 5312V00V10 p(cid:1)(cid:1)-p THIRD ––4405 RRVFLO === 21200V 00 p(cid:1)(cid:1)-p SECOND DISTORTION (dBc) –––456000 SECOND DISTORTION (dBc) –––556050 –65 THIRD –70 –70 –75 –80 –80 1 10 100 200 5 10 70 FREQUENCY (MHz) FREQUENCY (MHz) TPC 9.Distortion vs. Frequency; G = +2; V = 5 V TPC 12.Distortion vs. Frequency; G = +10 S –6– REV. F

AD8009 10 –35 G = +2 –40 0 RF = 301(cid:1) –45 RL = 100(cid:1) –50 250MHz –10 100m V p-p ON TOP OF VS 70MHz c) –55 –20 B TORTION (d –––667500 5MHz PSRR (dB)––3400 –PSRR +PSRR S DI –75 ––8805 22.1(cid:1) 200(cid:1) 50(cid:1)POUT ––5600 –90 50(cid:1) 50(cid:1) –70 –9–510 –8 –6 –4 –2 0 2 4 6 8 10 12 14 0.03 0.1 1 10 100 500 POUT (dBm) FREQUENCY (MHz) TPC 13.Third Harmonic Distortion vs. P ; (G = +10) TPC 16.PSRR vs. Frequency OUT 50 300 200(cid:1) 45 22.1(cid:1) 250 m) 40 5500(cid:1)(cid:1)POUT Hz) ERCEPT POINT (dB 332505 50(cid:1) T CURRENT (pA/211050000 T U IN 20 NP NONINVERTING CURRENT I 50 15 INVERTING CURRENT 10 0 10 100 250 10 100 1k 10k 100k 1M 10M 100M250M FREQUENCY (MHz) FREQUENCY (Hz) TPC 14.Two Tone, Third Order IMD Intercept vs. TPC 17.Current Noise vs. Frequency Frequency; G = +10 1M 0 –10 301(cid:1) –15 301(cid:1) –20 200mVVI Np -=p VO (cid:1)) 100k GAIN –40 154(cid:1) 154(cid:1) 100(cid:1) NSRESISTANCE ( 10k RL = 100(cid:1) PHASE –80 HASE (Degrees) CMRR (dB)––––23345050 A P TR 1k –120 –45 –50 –55 100 –160 0.01 0.1 1 10 100 1000 –60 1 10 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) TPC 15.Transresistance and Phase vs. Frequency TPC 18.CMRR vs. Frequency REV. F –7–

AD8009 2.0 100 G = +2 RF = 301(cid:1) 1.8 (cid:1)) E ( 10 C 1.6 N A T RESIST 1 (VSWR) 1.4 U P T 0.1 1.2 U O 1.0 0.01 0 0.03 0.1 1 10 100 500 0.1 1 10 100 500 FREQUENCY (MHz) FREQUENCY (MHz) TPC 19.Output Resistance vs. Frequency TPC 22.Input VSWR; G = +10 10 20 18 Hz) 8 16 nV/ m) 14 GRF = = + 3201(cid:1) OISE ( 6 X (dB 12 N A INPUT VOLTAGE 42 P MOUT18640 R50G(cid:1) RF 5500(cid:1)(cid:1) POUT GRF = = + 21000(cid:1) 2 0 0 10 100 1k 10k 100k 1M 10M 100M250M 5 10 100 250 FREQUENCY (Hz) FREQUENCY (MHz) TPC 20.Voltage Noise vs. Frequency TPC 23.Maximum Output Power vs. Frequency 25 –20 –30 G = +10 20 –40 RF = 200(cid:1) B) E (d 15 –50 OISE FIGUR 10 GRRFL = == + 31100010(cid:1)(cid:1) S (dB)12––7600 N –80 5 –90 0 1 10 100 500 1 10 100 1000 SOURCE RESISTANCE ((cid:1)) FREQUENCY (MHz) TPC 21.Noise Figure TPC 24.Reverse Isolation (S ); G = +10 12 –8– REV. F

AD8009 2.2 G = +2 2.0 CCOMP RRFL == 135001(cid:2)(cid:2) 49.9(cid:2) 49.9(cid:2) VO = 2V p-p 1.8 200(cid:2) WR)1.6 22.1(cid:2) S V (1.4 C = 0pF COMP 1.2 C = 3pF COMP 1.0 500mV 1ns 0 0.1 1 10 100 500 FREQUENCY (MHz) TPC 25.Output VSWR; G = +10 TPC 28.2 V Transient Response; G = +2 G = +2 19000 VOUT GRRFL = == + 21100000(cid:2)(cid:2) RRVOFL === 1435V00 1p(cid:2)(cid:2)-p VIN = 2VSTEP 10 0% 2V 2V 250ns 1V 1.5ns TPC 26.Overdrive Recovery; G = +10 TPC 29.4 V Transient Response; G = +2 G = +2 G = +10 RF = 301(cid:2) RF = 200(cid:2) RL = 150(cid:2) RL = 100(cid:2) VO = 200mV p-p VO = 200mV p-p 50mV 1ns 50mV 2ns TPC 27.2 V Transient Response; G = +2 TPC 30.Small Signal Transient Response; G = +10 REV. F –9–

AD8009 G = +10 RF = 200(cid:1) RL = 100(cid:1) VO = 2V p-p OV VS = 5V G = +2 RF = 301(cid:1) RL = 150(cid:1) 500mV 2ns 50mV VO = 200mV p-p 1ns TPC 31.2 V Transient Response; G = +10 TPC 34.2 V Transient Response; V = 5 V; G = +2 S 8 12 GRF = =+ 12000(cid:1) 7 C3Ad =B 2/dpiFv 9 RL = 100(cid:1) 6 6 VO = 4V p-p 5 CA = 1pF 3 1dB/div dB) 4 C A = 0pF 0 dB) (N 3 1dB/div –3 N ( AI AI G 2 –6 G VOUT = 200mV p–p 1 VIN 50(cid:1) VOUT –9 0 499(cid:1) 100(cid:1) –12 1V 3ns CA 499(cid:1) –1 –15 1 10 100 1000 FREQUENCY (MHz) TPC 32.4 V Transient Response; G = +10 TPC 35.Small Signal Frequency Response vs. Parasitic Capacitance CA = 2pF 5V0I(cid:1)N 499(cid:1)V1O0U0T(cid:1) OV CA = 1pF CA 499(cid:1) VOUT = 200mV p–p VS = (cid:2)5V CA = 0pF VS = 5V G = +2 RF = 301(cid:1) RL = 150(cid:1) 50mV VO = 200mV p-p 1ns 40mV 1.5ns TPC 33.Small Signal Transient Response; TPC 36.Small Signal Pulse Response vs. V = 5 V; G = +2 ParasiticCapacitance S –10– REV. F

AD8009 0 HP8753D AD8009 –10 G = 2 RF = RG= 301(cid:2) ZOUT = 50(cid:2) ZIN = 50(cid:2) –20 DRIVING WAVETEK 5201 +5V –30 TUNABLE BPF 0.001(cid:1)F 0.1(cid:1)F +10(cid:1)F N (dB) –40 fC = 50MHz 7 TIO –50 3 AD8009 49.9(cid:2) WAVETEK 5201 EJEC –60 49.9(cid:2) 2 4 6 BPF R –70 301(cid:2) –80 301(cid:2) –90 0.001(cid:1)F 0.1(cid:1)F 10(cid:1)F + –5V CENTER 50.000 MHz SPAN 80.000 MHz TPC 37.AD8009 Driving a Band-Pass RF Filter TPC 38.Frequency Response of Band-Pass Filter Circuit APPLICATIONS TPC 37 shows a circuit for driving and measuring the frequency All current feedback op amps are affected by stray capacitance response of a filter, a Wavetek 5201 tunable band-pass filter that on their –INPUT. TPCs 35 and 36 illustrate the AD8009’s is tuned to a 50 MHz center frequency. The HP8753D network response to such capacitance. provides a stimulus signal for the measurement. The analyzer has a 50 Ω source impedance that drives a cable that is terminated in TPC 35 shows the bandwidth can be extended by placing a 50 Ω at the high impedance noninverting input of the AD8009. capacitor in parallel with the gain resistor. The small signal pulse response corresponding to such an increase in capacitance/band- The AD8009 is set at a gain of +2. The series 50 Ω resistor at the width is shown in TPC 36. output, along with the 50 Ω termination provided by the filter and its termination, yield an overall unity gain for the measured As a practical consideration, the higher the capacitance on the path. The frequency response plot of TPC 38 shows the circuit –INPUT to GND, the higher R needs to be to minimize F to have an insertion loss of 1.3 dB in the pass band and about peaking/ringing. 75dB rejection in the stop band. RF Filter Driver The output drive capability, wide bandwidth, and low distortion of the AD8009 are well suited for creating gain blocks that can drive RF filters. Many of these filters require that the input be driven by a 50 Ω source, while the output must be terminated in 50 Ω for the filters to exhibit their specified frequency response. REV. F –11–

AD8009 75(cid:2) COAX PRIMARY MONITOR IOUTR 75(cid:2) RED 75(cid:2) ADV7160/ ADV7162 IOUTG 75(cid:2) GREEN 75(cid:2) IOUTB 75(cid:2) BLUE 75(cid:2) 5V + 0.1(cid:1)F 10(cid:1)F 7 3 75(cid:2) COAX ADDITIONAL MONITOR 6 75(cid:2) AD8009 2 4 RED 75(cid:2) 301(cid:2) 301(cid:2) 0.1(cid:1)F 10(cid:1)F + –5V 3 6 75(cid:2) AD8009 2 GREEN 75(cid:2) 301(cid:2) 301(cid:2) 3 6 75(cid:2) AD8009 2 BLUE 75(cid:2) 301(cid:2) 301(cid:2) Figure 4.Driving an Additional High Resolution Monitor Using Three AD8009s RGB Monitor Driver The primary monitor is connected in the conventional fashion High resolution computer monitors require very high full power with a 75 Ω termination to ground at each end of the 75 Ω bandwidth signals to maximize their display resolution. The cable. Sometimes this configuration is called “doubly termi- RGB signals that drive these monitors are generally provided by nated” and is used when the driver is a high output impedance a current-out RAMDAC that can directly drive a 75 Ω doubly current source. terminated line. For the additional monitor, each of the RGB signals close to the There are times when the same output wants to be delivered to RAMDAC output is applied to a high input impedance, noninvert- additional monitors. The termination provided internally by ing input of an AD8009 that is configured for a gain of +2. The each monitor prohibits the ability to simply connect a second outputs each drive a series 75 Ω resistor, cable, and termination monitor in parallel with the first. Additional buffering must be resistor in the monitor that divides the output signal by two, thus provided. providing an overall unity gain. This scheme is referred to as “back termination” and is used when the driver is a low output Figure 4 shows a connection diagram for two high resolution impedance voltage source. Back termination requires that the monitors being driven by an ADV7160 or ADV7162, a 220 MHz voltage of the signal be double the value that the monitor sees. (Megapixel per second) triple RAMDAC. This pixel rate Double termination requires that the output current be double the requires a driver whose full power bandwidth is at least half the value that flows in the monitor termination. pixel rate or 110 MHz. This is to provide good resolution for a worst-case signal that swings between zero scale and full scale on adjacent pixels. –12– REV. F

AD8009 Driving a Capacitive Load Figure 5 shows such a circuit with an AD8009 driving a 50 pF A capacitive load, like that presented by some A/D converters, load. With R = 0, the AD8009 circuit will be unstable. For a S can sometimes be a challenge for an op amp to drive depending gain of +2 and +10, it was found experimentally that setting R S on the architecture of the op amp. Most of the problem is caused to 42.2 Ω will minimize the 0.1% settling time with a 2 V step at by the pole created by the output impedance of the opamp and the output. The 0.1% settling time was measured to be 40 ns with the capacitor that is driven. This creates extra phase shift that this circuit. can eventually cause the op amp to become unstable. For smaller capacitive loads, a smaller R will yield optimal S One way to prevent instability and improve settling time when settling time, while a larger R will be required for larger capacitive S driving a capacitor is to insert a resistor in series between the loads. Of course, a larger capacitance will always require more opamp output and the capacitor. The feedback resistor is still time for settling to a given accuracy than a smaller one, and this connected directly to the output of the op amp, while the series will be lengthened by the increase in R required. At best, a S resistor provides some isolation of the capacitive load from the given RC combination will require about seven time constants op amp output. by itself to settle to 0.1%, so a limit will be reached where too large a capacitance cannot be driven by a given op amp and still +5V meet the system’s required settling time specification. G = +2: RF = 301(cid:2) = RG G = +10: RF = 200(cid:2), RG = 22.1(cid:2) 0.001(cid:1)F 0.1(cid:1)F +10(cid:1)F 3 7 6 2VSTEP RS RT 49.9(cid:2) 2 AD80094 CL 50pF RG RF 0.001(cid:1)F 0.1(cid:1)F 10(cid:1)F + –5V Figure 5.Capacitive Load Drive Circuit REV. F –13–

AD8009 OUTLINE DIMENSIONS 8-Lead Standard Small Outline Package [SOIC] (R-8) Dimensions shown in millimeters and (inches) 5.00 (0.1968) 4.80 (0.1890) 8 5 4.00 (0.1574) 6.20 (0.2440) 3.80 (0.1497) 1 4 5.80 (0.2284) 1.27B (0S.C0500) 1.75 (0.0688) 00..5205 ((00..00109969))(cid:6) 45(cid:3) 0.25 (0.0098) 1.35 (0.0532) 0.10 (0.0040) 0.51 (0.0201) 8(cid:3) COPLANARITY 0.31 (0.0122) 0.25 (0.0098)0(cid:3) 1.27 (0.0500) 0.10 SEPALTAINNGE 0.17 (0.0067) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN 5-Lead Small Outline Transistor Package [SOT-23] (RT-5) Dimensions shown in millimeters 2.90 BSC 5 4 1.60 BSC 2.80 BSC 1 2 3 PIN 1 0.95 BSC 1.90 1.30 BSC 1.15 0.90 1.45 MAX 0.22 0.08 10(cid:3) 0.15 MAX 0.50 SEATING 5(cid:3) 0.60 0.30 PLANE 0(cid:3) 0.45 0.30 COMPLIANT TO JEDEC STANDARDS MO-178AA –14– REV. F

AD8009 Revision History Location Page 9/04—Data Sheet changed from REV. E to REV. F. Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 Change to TPC 37 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 3/03—Data Sheet changed from REV. D to REV. E. Updated Data Sheet Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Universal Changes to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Changes to Figure 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Changes to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 Deleted AD8009EB from ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 Inserted new TPC 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Inserted new TPC 9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Inserted new TPC 12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Inserted new TPCs 33 and 34 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 REV. F –15–

F) 4( 0 9/ – 0 – 1 1 0 1 0 C –16–

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